Advanced OPAMP Design

Transcription

1 Advanced OPAMP Design

2 Two Stage OPAMP with Cascoding To increase the gain, the idea of cascoding can be combined with the idea of cascading. A two stage amplifier with one stage being cascode is possible. The choice is to make either the input stage or the output stage cascode.

3 Two Stage Cascode Amplifier VDD Q7 Q8 Vb3 Q5 Q6 Vb2 Q9 Q10 Q3 Q4 Vout1 Vb1 Vout2 Q1 Q2 Q11 Q12 Vb4 Vin1 Vin2 Vb4 I1

4 Two Stage Cascode Amplifiers Note that if the gate of M1 is shorted to V out2 to form a unity gain buffer, then the minimum output level is V GS1 V CS, severely limijng the output swing. Another opjon is to leave the input stage as is and to cascode the output stage.

5 Two Stage Cascode Amplifiers One final alternajve is to improve the cascoding by using gain boosjng. Gain boosjng was discussed earlier. Remember that, R out = A 1 g m2 r 02 r 01 where r 02 represents the second transistor of the cascode.

6 Gain BoosJng VDD VDD M2a I1b M2b I1c M2c M3b M3c M1c Vin

7 Gain BoosJng In Figure c, the gain is approximately given by g m1 r 01 g m2 r 02 g m3 r 03. Thus, we have obtained a gain as if it were a triple cascode stage without stacking more transistors. The output voltage is now limited from the bosom by V GS3 V ov2 (rather than V ov2 V ov1 if it had been a simple cascode).

8 Gain BoosJng Q3 Q4 - - Q1 Q2 Vin1 Vin2 I1

9 Gain BoosJng Q3 Q4 Q1 - Q2 Vin1 Vin2 I1

10 Gain BoosJng I3 I4 Q3 Q4 Q6 Q5 Q1 I2 Q2 Vin1 Vin2 I1

11 Gain BoosJng Now, apply this idea to the telescopic cascode and folded cascode circuits. Draw these circuits yourselves. Note that these are sjll approximately single stage amplifiers. The error amplifiers only amplify the error and most of the signal passes through the cascode devices. Thus, the poles of the error amplifiers are not very important.

12 Single Stage Class AB Amplifier The limit to slewing in an OPAMP is typically due to the current source driving the differenjal amplifier. Even if the input difference is excessive, the output current cannot exceed the bias current. One can unfold the differenjal amplifier as shown:

13 Single Stage Class AB Amplifier Q3 Q1 Q2 A Q4 I1 B

14 Single Stage Class AB Amplifier For the unfolded configurajon, we have V AB,0 = V t,n V t,p Thus, the V AB and the current I Q are related to each other. 2I Q C ox L n µ n W n For V AB higher than V t,n V t,p, we have 2I out C ox µ n 1 µ = pw p L n µ n W n L p 2I Q C ox µ n 1 µ ΔV pw p L AB n µ n W n L p L p µ p W p 2

15 Single Stage Class AB Amplifier Note that any increase of V AB is shared between the overdrive voltages of the n and p transistors. Thus, we can write ΔV AB = ΔV ov,n ΔV ov,p ΔV ov,n ΔV ov,p = µ p W p L n µ n W n L p For equal spli\ng of voltage, transistor aspect rajos have to be chosen accordingly.

16 Single Stage Class AB Amplifier For small signals, one can write, i out = g m,n v gs,n = g m,p v gs,p v in,d = v gs,n v gs,p i out = g m,ng m,p g m,n g m,p v in,d = g eq v in,d Thus, this circuit operates exactly like the differenjal pair if g m,n and g m,p are equal. Using this idea, one arrives at the following circuit:

17 Single Stage Class AB Amplifier VDD M8 M9 M10 M1 M3 M4 M2 Vin- Vin Vout M7 M5 M6

18 Single Stage Class AB Amplifier This circuit uses two unfolded pairs, M1- M2 and M3- M4. The currents are mirrored by Wilson Current Mirrors and summed up at the output. If there is an input imbalance, (V in > V in- ), the current in the pair M1- M2 diminishes whereas the current in the pair M3- M4 increases. Thus the circuit accomplishes push- pull operajon.

19 Single Stage Class AB Amplifier When the two inputs are equal, the basery voltages control the quiescent currents. There is a linear relajonship between the output current and the input voltage difference. This is caused by a cancellajon of the quadrajc terms. This circuit in essence takes the difference of two differenjal amplifiers.

20 Micropower OTA s Many applicajons require very low power consumpjons. It may be a good idea to use designs based on transistors operajng in the subthreshold region for these. Since the g m and r 0 of these devices are large, one can obtain large gains with only one or two stages. These designs have limited bandwidths and small slew rates.

21 Micropower OTA s The bandwidth is typically not a big problem, but the slew rate is. To solve the slew rate problem, Dynamic biasing of the current tail Dynamic voltage biasing in push pull stages Dynamic biasing of the tail is shown in the next slide.

22 Dynamic Biasing M3,1 M3,2 M3 M4 M4,1 M4,2 M1 M2 M6,1 M7,1 M8,1 M9,1 M6,2 M7,2 M8,2 M9,2 M5

23 Dynamic Biasing The circuit consisjng of M 3,1 M 8,1 senses I 2 - I 1 and the circuit consisjng of M 3,2 M 8,2 senses I 1 - I 2. The combinajon of the two currents is reflected as an aid to the bias current with a factor of B through M 9,1 and M 9,2. Thus, current is boosted by B when needed.

24 Dynamic Biasing We can write the analyjcal equajons as, v I 1 I 2 = ( I D I B1 I B 2 )tan 1 in nv T I B1 I B 2 = B I 1 I 2 v I D tan 1 in nv T I 1 I 2 = v 1 Btan 1 in nv T Note that the OPAMP will probably be used in a feedback configurajon such that the input voltage difference is mostly very small.

25 Dynamic Biasing M4B M7 M8 M4A M3B M3A Bias-p M9 M2 M3 M10 Bias-p OUT In In- OUT- M11 M1 M4 M12 M2B M2A M1B Bias-n I1 M5 M6 I2 Bias-n M1A

26 Dynamic Biasing The figure shows a fully differenjal class AB amplifier. The Bias- n and Bias- p values are chosen as close to the rails as possible for high swing operajon. However, during slewing large currents, these transistors go into the resisjve region, thus limijng the current. The bias voltages should be dynamically adjusted. The bias of M2A can be provided through some circuitry from the drain of M7.

27 High Frequency OPAMPs At the other end of the design spectrum, one may need to design high frequency OPAMPs. One way of extending the bandwidth may be to select the compensajon resistor such that it does not only asack the posijve zero, but by making it into a negajve zero and using this zero to cancel the first non- dominant pole. This is a trick applicable to all OPAMPS using compensajon.

28 High Frequency OPAMPs Obviously, increasing the currents and overdrive voltages as much as possible will increase the bandwidth at the expense of power. Another alternajve is to use current feedback. i o = A I ( ) = A I s ( s) i 1 i 2 ( ) ( ) i o = A I s i in 1 A I s ( ) ( ) i in i out

29 High Frequency OPAMPs Using the above relajons, v out = i or 2 = R 2 A I ( s) v in i in R 1 1 A I ( s) v out R 1 ( ) ( ) = R 2 A 0 ω A 1 A 0 v in R 1 1 A 0 s ω A 1 A 0 A v 0 ( ) = R 2A 0 ( ) ( ) R 1 1 A 0 ω 3dB = ω A 1 A 0 GBW = A v 0 ( )ω 3dB = R 2A 0 ω A R 1 = R 2 R 1 GBW I By changing R 2 and R 1, one can increase the GBW without sacrificing anything.

30 High Frequency OPAMPs However, R 1 has to be greater than the input resistance of the current amplifier and R 2 has to be less than the output resistance of the current amplifier. Also, current amplifiers do not suppress noise. Hence, their noise performance is quite bad. Finally, it is difficult to design current amplifiers in CMOS technology.

31 High Frequency OPAMPs Another technique to obtain high frequency OPAMPs is to use two OPAMPS in parallel. The first OPAMP should have high BW, but low gain and the second one should have high gain, but low BW. This technique introduces more poles and will cause stability issues.

32 MulJstage OPAMPs Having more than two stages is generally avoided since the stability analysis is more complex. However, with small r 0, each stage gives small gains. For low V DD, cascoding is difficult if not possible. For driving R L, an output stage is necessary.

33 MulJstage OPAMPs IB Q2 VOUT1 VBIAS IB1 IB2 Q1 Q3 Q4 VOUT2 Vin1 Vin2

34 MulJstage OPAMPs The cascode will have A v = g m1 r 01 g m2 r 02. The cascade will have A v = g m1 r 01 g m2 r 02. The cascode will have GBW = g m1 2πC L The cascade will have GBW = g m1 2πC C < g m2 2πC L One should choose f nd1 = 3GBW.

35 MulJstage OPAMPs I1 I2 I3 Cc CD M1 M2 M3 Vin

36 MulJstage OPAMPs This is called nested Miller CompensaJon. The following equajons are valid: GBW = g m1 2πC C f nd1 = g m 2 2πC D f nd 2 = g m 3 2πC L For 60 phase margin, choose f nd1 = 3GBW, f nd2 = 5GBW.

37 MulJstage OPAMPs These are not the only solujons for 60. You can choose 3.5 and 4 Jmes GBW as well. Another alternajve is 2.5 and 7. You can try a phase margin of 50. Then, the numbers are 2 and 4. Try plo\ng some of these values in excel. For a phase margin of 50, the poles become complex.

38 MulJstage OPAMPs There is a fundamental problem with the muljstage amplifier drawn. Can you find it? The C C is causing a posijve feedback. The second amplifier should be non- inverjng. You should use differenjal amplifiers or current mirroring.

39 Low Voltage OPAMPs We have already studied various output stages with rail- to- rail capabilijes. However, we know that a PMOS differenjal amplifier input stage can work all the way to the negajve supply, but cannot work to the posijve supply. A similar situajon exists for the NMOS input. So, why not combine them?

40 Low Voltage OPAMPs Q6 Q1 Q4 Q5 Q2 Q3

41 Low Voltage OPAMPs Transistors M1 and M2 form an NMOS differenjal amplifier with a tail current provided by M3. Transistors M4 and M5 form a PMOS differenjal amplifier with a tail current provided by M6. For very small CM voltages, the PMOS pair is acjve. For very large CM voltages, the NMOS pair is acjve.

42 Low Voltage OPAMPs The currents of the two diff- amps are combined to form the output. The problem with this circuit is that G m increases in moderate CM signals. There are solujons to this problem involving sensing the input CM voltage level and modifying tail currents accordingly. These solujons are not simple circuits.

43 Low Voltage OPAMPs

44 Fully DifferenJal OPAMPs Fully differenjal OPAMPs have a larger output swing. They are less suscepjble to CM noise. Even- order nonlinearijes are not present in fully differenjal OPAMPs. They have beser noise behavior.

45 Fully DifferenJal OPAMPs Take a simple inverjng amplifier. 2 (s.e.) = R 3 v on v on R 1 2 (diff ) = 2 R 3 SNR = 2 V sig( peak) 2 2 v on 2 R 1 4kTR 1 ( BW ) N ( ) = 2SNR( s.e. ) SNR diff 2 4kTR 1 ( BW ) N

46 Fully DifferenJal OPAMPs VDD M3 M4 VBIAS Vo1 M1 M2 Vo2 Vi1 Vi2 M5 Vcmc VSS

47 Fully DifferenJal OPAMPs To set V OCM to a desired voltage, either V BIAS or V G5 must be adjusted. This can be done through feedback. As discussed earlier, a CM detector, and differenjal amplifier are necessary for this. V cms = a ( cms V oc V ) CM V CSBIAS Here, V cms is the CM control voltage, V oc is the output CM voltage, V CM is the desired CM voltage and V CMBIAS is a dc voltage to be added.

48 Fully DifferenJal OPAMPs This V cms forms the common mode control voltage V cmc which consists of a dc value V CMC and a small signal value v cmc. The gain from V cmc to V oc (a cmc ) is typically quite large. Thus, a cms can have a low gain and hence a wide bandwidth. One can easily write, v oc = a cm v ic a cmc v cmc

49 Fully DifferenJal OPAMPs For the circuit above, a dm = v od = g v m1 ( r 01 r 03 ) id a cmc = g m 5h ( R o( down) r ) 03 ( ) R o( down) r 01 g m1 r 05h a cm = v oc v ic 1 r 05h ( R o( down) r ) 03 We observe with typical values that a cmc is much larger than a cm.

50 Fully DifferenJal OPAMPs The CMFB loop uses negajve feedback to make V oc equal to V CM. If V CM changes by a small amount due to parameter variajons, V oc should track V CM. A CMFB = ΔV oc ΔV CM ( ) ( ) = v oc = a a cms cmc v cm 1 a cms a cmc Id a cms (- a cmc )>>1, A CMFB becomes 1

51 Fully DifferenJal OPAMPs The CM gain from v ic to v oc is also affected by the CMFB. v cms = a cms v oc v oc = a cm v ic a cmc v cmc v cms = v cmc a ʹ cm = v oc = v ic withcmfb a cm ( ) 1 a cms a cmc

52 Fully DifferenJal OPAMPs Considering the stability of the CMFB loop, a cmc ( ( ) r ) 03 ( s) = g R m5h o down 1 s( R o( down) r 03 )C Lc The pole is readily observed. Far beyond the pole, we have a cmc ( jω) g m5h jωc Lc GBW = g m 5h C Lc

53 Fully DifferenJal OPAMPs Non- dominant poles also exist in the CMFB loop. Thus, the loop gain can be decreased to increase the phase margin. Thee may be even more poles in the CMFB loop than in the actual DM circuit. Thus, asaining stability may even be harder. One solujon may be to decrease g m5 as much as possible by the following:

54 Fully DifferenJal OPAMPs VDD M3 M4 VBIAS Vo1 M1 M2 Vo2 Vi1 Vi2 M52 M51 VBIAS2 Vcmc VSS

55 Fully DifferenJal OPAMPs The disadvantage of this approach is that it reduces the GBW by reducing the gain. In other words, it reduces a cmc at dc. Now, let us study some real CMFB circuits.

56 Fully DifferenJal OPAMPs The simplest sense circuit is by using two resistors. A simple amplifier can be designed by using a diode connected load differenjal amplifier. Then, V oc = V o1 V o2 2 a cms = 1 2 g m21 g m23

57 Fully DifferenJal OPAMPs VDD M25 M21 M22 VCM Voc Vcmc=Vcms M23 M24 VSS

58 Fully DifferenJal OPAMPs The major problem of this circuit is with the resisjve sense block. The sense resistors and the input capacitance of the sense amplifier create a pole. Another disadvantage is that the sense resistors load the amplifier, reducing the voltage gain. These two disadvantages bring contradictory requirements on the values of the sense resistors. One solujon is to use voltage buffers.

59 Fully DifferenJal OPAMPs VDD Q1 Vo1 I1 VSS Voc-VGS Q2 VDD Vo2 Q3 I2 VCM Vcms I3 VSS

60 Fully DifferenJal OPAMPs The major problem with this configurajon is that the V GS offsets limit the output swing since the CMFB buffers must remain in the acjve state during the whole operajon. However, this is sjll the first pracjcal CMFB circuit that we have seen. The feedback part does not have to be applied to the current source transistor M5, though.

61 Fully DifferenJal OPAMPs VDD Q3 Q2 I1 M21a M21B M22 VBIAS Vo2 3 CM Detect VCM Vo1 Q1 Q4 Vi1 Vi2 Q5 VSS VBIAS2 VSS

62 Fully DifferenJal OPAMPs This configurajon avoids the pole associated with the M5- M23 current mirror. However, M21A and M21B add resisjve and capacijve loading to the OPAMP outputs. For a cascode amplifier, they can be connected to the low impedance intermediate nodes so that their effect will be limited.

63 Fully DifferenJal OPAMPs VDD I20 I20 Vo1 M21 M22 VCM M23 M24 Vo2 M25 Vcmc VSS

64 Fully DifferenJal OPAMPs This CMFB circuit uses two differenjal pairs. I d 22 = I 20 2 g V o2 V CM m 22 2 I d 23 = I 20 2 g V o1 V CM m 23 2 I cms = I d 25 = I d 22 I d 23 = I 20 g m22 V o1 V o2 2 V CM = I 20 g m22 V oc V CM ( ) Even if we consider large signals, the nonlinearijes cancel each other and the results is sjll approximately linear. (See book)

65 Fully DifferenJal OPAMPs M3 M4 VDD M36 VBIAS Vo1 M1 M2 Vo2 Vi1 Vi2 M30 M33 M31 M32 M34 M35 VCM VCM

66 Fully DifferenJal OPAMPs In this circuit, M36 has twice the size of M3 and M4. Transistors M31- M34 operate in the resisjve region. W I cms = I d 31 I d 32 = k ʹ n L W I cms = 2k ʹ n L Applying KVL, ( V o1 V SS V t 31 )V ds31 V 2 ds31 W k ʹ 2 n L V oc V SS V tn V ds31 V 2 ds31 V ds31 = V ds35 V gs33 V gs30 32 ( V o2 V SS V t 32 )V ds32 V 2 ds32 2

67 Fully DifferenJal OPAMPs Assuming that I d30 = I d33, V gs30 = V gs33. Then, V ds31 = V ds35. V ds35 = W ʹ L k n 35 I 1 V CM V SS V tn V ds35 2 W 2k ʹ n V L oc V SS V tn V ds35 V 35 2 oc V SS V tn V ds35 2 I cms I 1 W k ʹ n V L CM V SS V tn V = 2I 1 ds35 V 2 CM V SS V tn V ds V CM V SS V tn V ds35 2 V I cms = 2I 1 V CM V SS V tn V 2I oc V CM 1 ds35 V 2 CM V SS V tn V ds35 2 V I cms = 2I 1 2I oc V CM 1 V CM V SS V tn V ds35 2

68 Fully DifferenJal OPAMPs There are several limitajons to this scheme. The output swing is limited by the CMFB circuit. The small signal gain is in the CMFB is small due to the devices in the resisjve region. The bandwidth of the CMFB loop is also lower due to the low transconductances. Another CMFB scheme is using switched capacitors. This will be studied later.

69 Fully DifferenJal OPAMPs VDD M10 M5 M7 VB1 Vcmc VB1 M1 M2 Vo2 Vi1 Vi2 Vo1 C C M9 M3 VB2 M4 M6 -VSS

70 Fully DifferenJal OPAMPs This is a fully differenjal two- stage Miller compensated amplifier. The two Miller compensajon capacitors compensate both the differenjal and common mode half- circuits. Also, a resistor could be added to compensate the posijve zero.

71 Fully DifferenJal OPAMPs The relajonships below are sjll valid for the differenjal mode. g m2 2πC c = GBW f nd g m6 2πC L For the common mode, we have g m 5h 2πC c GBW f nd g m 6 2πC Lc

72 Fully DifferenJal OPAMPs These two equajons have two different requirements. One should choose to compensate the differenjal gain properly and thus overcompensate the CM loop. Since the CMFB operates mostly off DC signals, this is not a problem. The reverse case is more problemajc.

73 Fully DifferenJal OPAMPs One solujon is to adjust g m5h. This cannot be done directly as it affects the performance of the circuit, but it can be done by spli\ng the transistor into two as explained earlier. This will effect the strength of the CMFB loop, on the other hand.

74 Fully DifferenJal OPAMPs It is quite easy to draw fully differenjal telescopic OPAMP circuits and fully differenjal folded cascode circuits as well. It is also possible to design differenjal difference amplifiers as well. The governing equajon is: v od = a dm (v id1 v id2 )

75 Fully DifferenJal OPAMPs I3 I1 I1 I3 M1 M2 M1X M2X Vo2 Vo1 Cc Cc M9 M6 I2 I2

76 Fully DifferenJal OPAMPs In a fully differenjal amplifier, capacijve neutralizajon can be used to reduce the component of the OPAMP input capacitance due to the Miller effect. Thus, it is possible to increase input impedance. NeutralizaJon is shown in the figure.

77 Fully DifferenJal OPAMPs I1 VDD I1 Vo1 Vo2 M3 VB M4 Cn Cn Cgd1 Cgd2 M1 M2 Vi1 Vi2 I2 -VSS

78 Fully DifferenJal OPAMPs Without the neutralizajon capacitors, C n, Including the capacitors, If C n = C gd1, ( ) C idh = C gs1 C gd1 1 a dm1 C idh = C gs1 C ( gd1 1 a ) dm1 C ( n 1 a ) dm1 C idh = C gs1 2C gd1 The disadvantage of this approach is that the C n will load the output, bringing the nondominant poles to lower frequencies.