Lecture 13 Date:

Transcription

1 Lecture 13 Date: Common Mode Rejection Ratio NonIdealities in Differential mplifier

2 Common Mode Rejection Ratio (CMRR) Differential input amplifiers are devices/circuits that can input and amplify differential signals and suppress commonmode signals This includes operational amplifiers, instrumentation amplifiers, and difference amplifiers Instrumentation mplifiers Operational mplifier Difference mplifier

3 For a differential input amplifier, commonmode voltage is defined as the average of the two input voltages. V cm = V p V n Vn Vp Vo

4 For a differential amplifier, commonmode voltage is defined as the average of the two input voltages. Vid/ Vid Vid/ Vcm IOP1 V p V n V cm = w here V p =V cm V id Vout V where out dm cm dm V V id Differenti Common cm al mode mode cm gain gain CommonMode Rejection Ratio is defined as the ratio of the differential gain to the commonmode gain. V id V n =V cm CMRR dm cm CMR is defined as: CMRdB 0log 10 CMRR

5 Ideally a differential input amplifier only responds to a differential input voltage, not a commonmode voltage. V V V Vs 5 Vs 5 Vid 0V V V OP1 6 Vo 0V Vid Vb uV Va 1m V OP1 6 Vo V Vb 0 Va 0 V Vcm 0 Vid 0V V OP1 6 Vo 0V Vcm 1 Vb 0 Va 0 Vcm 1

6 What is the CMRR of an ideal differential input amplifier (e.g. opamp)? Recall that the ideal commonmode gain of a differential input amplifier is ZERO Voltage mplifier Model: Source mplifier Load Rs Ro Vs Vi Ri Vi VCVS Vo Rload dm >Infinity lso recall that the differential gain of an ideal opamp is some high value. Therefore: CMRR dm dm idealo cm cm

7 Real Opmp CMRR There will be a commonmode gain due to the following symmetry in the circuit Mismatched source and drain resistors Signal source resistances Gatedrain capacitances transconductances Gate leakage currents Finite output impedance of the tail current source Changes with frequency due to tail current source s shunt capacitance These issues will manifest themselves through converting commonmode variations to differential components at the output and variation of the output commonmode level

8 Modeling CMRR Now that we understand what CMRR is and what affects it in operational amplifiers, let s see how it can affect a circuit. First, however, we need to understand the model To be useful, CMRR needs to be referredtoinput (RTI) We can then represent it as a voltage source (aka offset voltage) in series with an input. The magnitude (RTI) is V cm /CMRR. Vcm/CMRR Vo Vn Vp

9 O CMRR Error Example: noninverting buffer V V V O p n V n V O Vcm CMRR Note that Vcm V p Vn Vcm/CMRR Vp Vo Vp VO Vp VO CMRR V V O p 1 1 CMRR 1 s V V O p 1 1 CMRR Clearly this factor should be as small as possible

10 CMRR of Difference mplifiers difference amplifier is made up of a differential amplifier (operational amplifier) and a resistor network as shown below The circuit meets our definition of a differential amplifier The output is proportional to the difference between the input signals R i1 R1 R V1 R o R i Vo R3 R4 V

11 CMRR of Difference mplifiers Let s replace V 1 and V with our alternate definition of the inputs (in terms of differentialmode and commonmode signals). Vcm Vdm/ Vdm/ R1 R1 R R Vo R V V 1 V V cm cm Vo V V1 R1 1 V V R Vdm Vdm Vo Vcm Vcm R 1 R Vo Vdm R It is readily apparent that an ideal difference amplifier s output should only amplify the differentialmode signal not the commonmode signal. dm dm

12 CMRR of Difference mplifiers The last expression is based on the premise that the operational amplifier is ideal and that the resistors are balanced Keeping the assumption that the operational amplifier is ideal, let s see what happens when an imbalance factor (ε) is introduced R1 Vdm/ R(1 ) Vcm Vdm/ R1 R Vo

13 CMRR of Difference mplifiers Using superposition we find that: 1 R 1 dm 1 R R R R R Vdm R V R Vo Vcm Vcm fter simplification we find that: V V V o dm dm cm cm where 1 dm 1 cm R R R R1 R1 R R R R 1 s expected, an imbalance affects the differential and commonmode gains, which will affect CMRR! s the error (ε) 0, dm R /R 1 and cm 0

14 CMRR of Difference mplifiers Since we have equations for cm and dm, let s look at CMR: R R1 R 1 R1 R1 R dm CMR( db) 0log10 0log 10 R cm R1 R If the imbalance is sufficiently small we can neglect its effect on dm With that and some algebra we find: R This equation shows two very 1 R important relationships 1 CMR( db) 0log10 s the gain of a difference amplifier increases (R /R 1 ), CMR increases s the mismatch (ε) increases, CMR decreases Please remember that this just shows the effects of the resistor network and assumes an ideal amplifier

15 CMRR of Difference mplifiers nother possible source for CMRR degradation is the impedance at the reference pin. So far we have connected this pin to lowimpedance ground. Vdm/ R1 R Vcm Vdm/ R1 R Vo Placing an impedance here will disturb the voltage divider we come across during superposition analysis. This will negatively affect CMR

16 CMRR of Difference mplifiers Pros: Difference amplifiers amplify differential signals and reject commonmode signals The commonmode rejection is based mainly on resistor matching Difference amplifiers can be used to protect against ground disturbances Cons: Externally changing the gain of a difference amplifier is not worthwhile The input impedance is finite This means that a difference amplifier will load the input signals If the input signal source s impedances are not balanced, CMR could be degraded Is there a way we can amplify differential signals, change the gain, retain high CMR, and not load our source? Yes! Buffer the inputs this creates an Instrumentation mplifier (I).

17 Instrumentation mplifiers There are common types of instrumentation amplifiers opamp (e.g. IN1) 3 opamp (e.g. IN333)

18 Instrumentation mplifiers Notice both have gain equations so you can vary the gain. Notice the input impedance is that of the noninverting terminal of a noninverting amplifier. HighZ Nodes This varies gain Variable Gain

19 Instrumentation mplifiers Difference mp HighZ Nodes Variable Gain

20 Instrumentation mplifiers So, what is the CMRR of an instrumentation amplifier? Instrumentation amplifiers reject commonmode signals ( cm 0) Recall: CMRR dm cm CMRR is directly related to differential gain. Since we can change the differential gain of an I, we also change the CMRR.

21 Nonideal Characteristics of Differential mplifier DC Offset Problems Due to mismatch in load resistances, mismatch in W/L, and mismatch in V T Mismatch in R D R D1 R D R ISS R Vou1 VDD RD ISS R Vout VDD RD D D D R D R D R D Therefore differential output: I V V V R SS o out out1 D Nonzero Unwanted polarity unknown a priori Offset signal appears due to mismatch differential can overcome this offset problem

22 Differential mplifier with ctive Load However most systems are singleended require single ended signal what is the solution? Differential pair with current mirror v id / No. Why? Gain reduces to half lthough this solves the problem but any mismatch in Q 3 and Q 4 will cause variations in the eventual output

23 Differential Pair with ctive Loads It can help in mitigating the commonmode to differential conversion arising out from R D mismatch. Its easier to define output CM level as M 3 /M 4 are in saturation by default M 3 /M 4 are not in saturation by default & therefore output CM level not well defined

24 Differential Pair with ctive Loads (contd.) Differential pair with ideal current source: v 1 g 1 g mp mn g g Precision comes but with a price. What is that? Reduced voltage swings mn mp Dependence on scaling factor and process parameters to increase gain reduce (W/L) P as a consequence V ov of M 3 /M 4 reduces eventually lowers the CM level at the nodes X and Y clipping in the negative cycle

25 Differential Pair with ctive Loads (contd.) Diodeconnected Load: The output swing can be improved IF part of bias current to M 1 and M can be provided by PMOS current sources The trick here is to reduce the g m of M 3 and M 4 by lowering their drain currents instead of their aspect ratios Here, M 5 and M 6 carry 80% of M 1 and M the current through M 3 and M 4 is reduced by a factor of 5 For a given V GSP V TP, this allows reduction in g m of M 3 and M 4 by a factor of 5 potentially enhances the gain by a factor of 5

26 Differential Pair with ctive Loads (contd.) Constant Current Sources: The small signal gain of differential pair with current source load is usually in the range of How to increase the gain? Use Cascode structure both for NFET and PFET Cascode will definitely enhance the small signal gain BUT at the cost of reduced voltage headroom By now we know, the load resistors in differential pair can be replaced by diodeconnected or sourceconnected loads. It can help in mitigating the commonmode to differential conversion arising out from R D mismatch.

27 Differential Pair with ctive Load Using halfcircuit approach: Differential pair with ideal current source g g 1 r r v mn mp on op g n W / L mn v g W / L mp P P N g r r v mn on op