Designing Bipolar Transistor Radio Frequency Integrated Circuits
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1 Designing Bipolar Transistor Radio Frequency Integrated Circuits Allen A. Sweet ARTECH H O U S E BOSTON LONDON artechhouse.com
2 Acknowledgments CHAPTER 1 Introduction CHAPTER 2 Applications 2.1 Cellular/PCS Handsets 2.2 Cellular/PCS Infrastructure 2.3 WLANs 2.4 Bluetooth 2.5 UWB 2.6 WiMax 2.7 Digital TV and Set-Top Boxes 2.8 Cognitive Radio 2.9 Spectrum AUocation in the United States (All Frequencies in Megahertz) 2.10 Physical Layer Standards Refere nces CHAPTER 3 RFIC Architec tu res 3.1 I/Q Receivers 3.2 I/Q Modulators 3.3 Nonzero IF Receivers 3.4 Zero IF Receivers 3.5 Differential versus Single-Ended Topologies CHAPTER 4 InGaP/GaAs 1 HBT Fabrication Technology 4.1 Transistor Structures 4.2 Device Models 4.3 Passive Structures, Their Electrical Models, and Layout Design Rules Microstrip Lines ' ITR Resistors xi VII
![VIII Contents 4.3.3 ] Ml-to-M2 Vias 4.3.4 MIM Capacitors 4.3.5 Substrate Vias 4.3.6 Bonding Pads 4.3.7 Crossover Capacitances 4.3.8 Spiral Inductors 4.3.9 Transistor Dummy Cells 4.3.10 Significant Layout Parasitic Elements 4.](/docs-images/83/88618013/images/3-0.jpg "3.11 Simple Layout Example 4.4 Maximum Electrical Ratings 4.5 CAD Layout Tools References CHAPTER 5 SiGe HBT Fabrication Technology 5.1 SiGe HBT Transistor Structures 5.2 Transistor Device Models 5.")
3 VIII Contents ] Ml-to-M2 Vias MIM Capacitors Substrate Vias Bonding Pads Crossover Capacitances Spiral Inductors Transistor Dummy Cells Significant Layout Parasitic Elements Simple Layout Example 4.4 Maximum Electrical Ratings 4.5 CAD Layout Tools References CHAPTER 5 SiGe HBT Fabrication Technology 5.1 SiGe HBT Transistor Structures 5.2 Transistor Device Models 5.3 Passive Device Structures and Models 5.4 Design Rules 5.5 CAD Layout CHAPTER 6 Passive Circu t Design 6.1 Low-Pass Filters 6.2 High-Pass Filters 6.3 Band-Pass Filters 6.4 Differential Filters 6.5 Technology and Substrates 6.6 Splitters/Dividers 6.1 Phase Shifters and Baluns CHAPTER 7 Amplifier De«iign Basics 7.1 Matching Techniques 7.2 Gain Compensation 7.3 Fano's Limit 7.4 Stability 7.5 Noise Match 7.6 Differential Amplifiers 7.7 Cascode Amplifiers CHAPTER 8 Low-Noise Amplifier Design Noise Figure Concepts 115
4 ix 8.2 Noise Temperature Front-end Attenuation and LNAs Multistage Noise Figure Contributions Circuit Topologies for Low Noise Design Example 1: Single-Ended PCS LNA Design Example 2: Three-Transistor Hybrid Darlington Differential LNA Using SiGe Technology, 127 References 132 CHAPTER 9 Power Amplifier Design Loadline Concepts Maximum Power and Efficiency Class AB Power Amplifiers Definitions of Nonlinear Performance Metrics Adjacent Channel Power Ratio Error Vector Magnitude Circuit Topologies for PAs Matching Circuit Options Stability Bias Circuits Design Example 3: Wideband Gain Block Darlington Amplifier Design Example 4: Feedback Power Amplifier Design 164 References 171 CHAPTER 10 Designing Multistage Amplifiers Multistage LNAs Multistage Power Amplifiers Gain and Power Allocations Active Device Sizing Design Example 5: A Differential PCS PA 181 References 194 CHAPTER 11 Mixer/Modulator Design Mixer Basics Diode Mixers Single-Balanced Active Multiplying Mixers Fully Balanced Active Multiplying Mixers (Gilbert Cell) I/Q Mixers I/Q Modulators Design Example 6: Cellular/PCS Downconverting Mixer RFIC 221 References 230 CHAPTER 12 Frequency Multiplier Design 231
5 12.1 Frequency Doublers Frequency Triplers Frequency Translators 235 References 239 CHAPTER13 Voltage-Controlled Oscillator Design Varactor Diode Basics Negative-Resistance Concepts Types of Resonators Feedback Circuit Topologies for Producing Negative Resistance Negative-Resistance Oscillator Circuits The Colpitts Oscillator Circuit Frequency-Temperature Stability Phase Noise Quadrature Phase-Shifting Networks Ring Oscillators Design Example 7: a (Wi-Fi A) Differential VCO Figure of Merit Electronic Tuning and a Differential VCO Topology 279 References 281 CHAPTER 14 Layout Design Strategies Minimum Area "On-Chip" versus "Off-Chip" Component Decisions Minimizing Parasitics Testability Types of CAD Systems Foundry Comparison Reticle Assembly 289 CHAPTER 15 RFIC Economics Levels of Integration Single-Ended versus Differential Topologies Process Technology Choices Area versus Performance Trade-offs Electrical Yield Prototype Costs Production Costs Acronyms About the Author Index
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