VALLIAMMAI ENGINEERING COLLEGE

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VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur 603 203 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK II SEMESTER/ M.

1 VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK II SEMESTER/ M.E COMMUNICATION SYSTEMS CU 5201 MIC and RF System Design Regulation 2017 Academic Year (Even) Prepared by Mr. D. Murugesan, Assistant Professor/ECE

2 UNIT I CMOS PHYSICS, TRANSCEIVER SPECIFICATIONSAND ARCHITECTURES CMOS: Introduction to MOSFET Physics Noise: Thermal, shot, flicker, popcorn noise transceiver Specifications: Two port Noise theory, Noise Figure, THD, IP2, IP3, Sensitivity, SFDR, Phase noise. Transceiver Architectures: Receiver: Homodyne, Heterodyne, Image reject, Low IF Architectures Transmitter: Direct up conversion, two step up conversion schemes. PART A Q. BT Level Domain Questions No 1. Give expressions for Substrate and Gate current. 2. Relate Direct up conversion and 2 step conversion 3. Write short notes on available and Insertion Power gain 4. How heterodyne reception is superior to homodyne reception 5. What is popcorn noise? How do you control it? 6. Define IP2 and IP3. 7. Explain common gate Amplifier Configuration 8. Show the formula to calculate sensitivity 9. State two port noise theory with expression 10. Classify the different types of noise in MOSFET. 11. Identify the advantages and applications of Heterodyne detection. 12. With expression explain Transducer Power Gain. 13. Demonstrate the ways to reduce threshold voltage in CMOS circuits (threshold reduction) 14. Examine phase noise and its effects 15. List out the Effects of non linearity in amplifiers 16. Differentiate power Match and Noise Match of an amplifier. 17. Recommend the choice of an ideal substrate material for integrated circuits. 18. Compare homodyne and heterodyne receiver

3 19. Elaborate the noise effects on MOSFET devices 20. Discuss about Injection locking mechanism used in transceiver architecture. PART B 1. Describe the following (i) Thermal (ii) Shot (iii) Flicker and Popcorn noise and its effects on MOSFET (13) 2. i). Point out the expression for Noise Figure (5) ii). Give short notes on (a) Phase noise (b) Image rejection (c). Limitations of homodyne rejection (8) 3. What do you infer from different types of transmitter architectures and explain briefly? (13) 4. i) Demonstrate MOS device physics in the short channel regime. (8) ii) Derive Intrinsic MOSFET two-port Noise parameters. (5) 5. i) Illustrate Transceiver Specification distributed over a link.(5) ii) Outline the direct up conversion and two step up conversion process. (8) 6. i) Design a simple RC-CR quadrature generator for a 1 KHz centre frequency. First select the capacitance so that the kt/c noise is ^-11 V 2, and then determine the necessary resistance from the centre frequency specification. Is this resistance value reasonable? Explain. (5) ii) The low pass filter in the image reject mixer would appear to be superfluous because even the sum frequency components are theoretically rejected by the architecture. Explain why the filter s nonetheless important in practical mixers of this type. (5) iii) Identify the need of THD and SFDR (3) 7. i) Suppose that the only limitation in making resistor noise measurements were the ever present stray capacitance of any physical setup. Build the expression for the mean square noise for a network consisting of a resistor R shunted by a capacitor C. (6) ii) Inspect the effect of thermal noise in MOSFETs (7) 8. i) Examine the two port noise theory in detail (5) ii) Distinguish Homodyne detection from heterodyne detection. Explain the principle of a typical heterodyne receiver with a neat diagram (8)

4 9. Evaluate the expression for Drain Current in Linear and Saturated region of MOSFET. (13) 10. Discuss about various Receiver Architectures and compare the performance metrics. (13) 11. Classify the features of any two transceiver architectures with necessary diagrams (13) 12. Elaborate few performance metrics commonly used to evaluate the transceiver architecture (13) 13. Briefly explain about Phase Noise and evaluate the expression for carrier to noise ratio. (13) 14. How the half IF problem be overcome by dual IF architecture. Explain in detail? (13) PART C 1. i) Construct RC-CR network to generate 90ᵒ phase shifted signals? (8) ii) Discuss about principle drawback of Heartly architecture and how can it be overcome? Give reasons. (7) 2. Why lossy stages lower the output P 1dB of a transmitter but raise its input P 1dB. Justify the answer with illustrations. (15) 3. Explain in detail the following second order effects of MOSFET (i) Body Effect (8) (ii) Sub threshold conduction (7) 4. (i) With illustrations explain how MOSFET act as a switch. (5) (ii) Formulate the I/V characteristics of MOSFET with necessary diagram (10) BTL5 BTL5 UNIT II IMPEDANCE MATCHING AND AMPLIFIERS Review of S-parameters with Smith chart Passive IC components - Impedance matching networks Amplifiers: Common Gate, Common Source Amplifiers OC Time constants in bandwidth estimation and enhancement High frequency amplifier design, Low Noise Amplifiers: Power match and Noise match Single ended and Differential schemes. PART A Q. No Questions BT Level Domain 1. Why matching is essential? What is impedance matching? 2. What is phase noise? 3. Define transducer gain of an amplifier.

5 4. Show the Noise Figure equation and give its significance 5. List the importance of open circuit time constant in designing amplifiers. 6. Relate bandwidth, rise time and delay with the aid of equation 7. Explain 2 port BW Enhancement 8. Summarize different LNA topologies with its merits and demerits 9. Illustrate Q point and load line concepts. 10. Outline the bandwidth estimation methods 11. Apply S parameters on a sample two port network and give input and output relations. 12. Identify the procedures to solve impedance matching problems of smith chart? 13. Demonstrate how reconfigurability done in antennas? 14. Examine the characteristics and applications of smith chart 15. Distinguish single ended and differential ended LNA 16. List out different types of passive IC components. 17. Evaluate the role of stability circles plotted on a smith chart in the amplifier design? 18. Compare power match and noise match with respect to LNA topology 19. Generate the formula to calculate the amplifier gain 20. Discuss the applications of Impedance matching networks PART B 1. i) Name any three properties of S parameters and prove it. (5) ii) Give the significance of impedance matching in RF ICs with an example? (8) 2. i) Why High Frequency Amplifier Design is always challenging. (5). ii) What are the techniques used to analyze phase and gain margin (8) 3. i) Identify the properties of constant gain circles in detail (8) ii) Write a detailed note on matching technique (5) 4. i) Illustrate the shunt series amplifier and discuss its design (5) ii) Interpret the working of differential LNAs with suitable analysis(8)

6 5. A microwave transistor has the following S parameters at 10 GHz, with a50ω impedance. S11= degree, S12= degree, S21= degree and S22= degree. The source impedance is Z s =20Ω, Z L =30Ω.Estimate the power gain and available gain. (13) 6. Distinguish Single ended and Differential LNAs and compare its performance metrics. (13) 7. Examine various stability analysis performed to improve system efficiency. (13) 8. i) Describe the impact of OC time constants in bandwidth estimation (5) ii) Can one plot a smith chart locus for a lossy transmission line? Justify. If it is possible plot an example (8) 9. Consider a common gate broadband LNA. Determine the expression for NF of this amplifier in the absence of gate noise. Recalculate NF by taking gate noise into account. (13) 10. Design a L match to match 10Ω source to a 75Ω load. Assume the center frequency is 200MHz. (13) 11. i) Summarize the steps involved to design a low noise amplifier (7) ii) Outline the significance of impedance matching and its design steps in RFICs. (6) 12. Explain the high frequency amplifier design with necessary diagrams. (13) 13. i) List out the steps involved in computing the bandwidth of an arbitrary network? (7) ii) What about the accuracy of OC time constants (6) 14. Describe in detail the bandwidth enhancement techniques. (13) PART C 1. Suppose a quadrature up conversion mixer in a GSM transmitter operate with a peak baseband swing of 0.3V. If the transmitter delivers an output power of 1 W, determine the maximum tolerable input referred noise of mixers such that transmitted noise in the GSM RX band does not exceed -155dBm (15) 2. Design a Pi network to match a source impedance of 5-j30 Ω to a 50 Ω resistive load. If Q of the network is 100 what is the current in each element of a matching network when 1 W is delivered to load. (15)

7 3. Investigate the stability regions of a transistor whose S parameters are recorded as follows: S 11 = ᵒ, S 12 = ᵒ, S 21 = ᵒ, S 22 = ᵒ (15) 4. Design a T type matching network that transforms a load impedance Z L = (60-j30) Ω into a Z in = (10+j20) Ω input impedance and that has a maximum nodal quality factor of 3 at 1 GHz. (15) UNIT III FEEDBACK SYSTEMS AND POWER AMPLIFIERS Feedback Systems: Stability of feedback systems: Gain and phase margin, Root-locus techniques Time and Frequency domain considerations Compensation Power Amplifiers: General model Class A, AB, B, C, D, E and F amplifiers Linearization Techniques Efficiency boosting techniques ACPR metric Design considerations. PART A Q. Questions BT Domain No Level 1. Define ACPR Metric 2. What are the different types of linearization techniques? 3. Choose the efficient gain boosting technique and show how it works? 4. Relate stability with linearity? 5. Why root locus technique is necessary? 6. Give the advantages and disadvantages of class C power amplifier? 7. Summarize the steps in finding root locus. 8. Illustrate Inverse Class F Amplifier 9. Demonstrate how the stability of an amplifier is ensured by Nyquist test. 10. Outline the efficiency boosting techniques and their features 11. Apply root locus techniques for positive feedback systems and give inference. 12. Show the time domain and frequency domain characteristics of first order and second order systems. 13. Develop the expression for amplifier power gain

8 14. List the types of feedback systems with example 15. Classify power amplifier along with its performance parameters 16. Compare and contrast gain margin and phase margin 17. Justify the importance of negative feedback system with example 18. Explain Lag and Lead Compensation 19. Discuss the effects of nonlinearity in power amplifier 20. Estimate the conversion efficiency of power amplifiers. PART B 1. What is the importance of ACPR metrics explain it with suitable examples. (13) 2. List and explain the techniques used to analyze phase and gain margin. (13) 3. i) Describe the principles of class E and F amplifiers with neat diagrams (8) ii) Write a note on linearization technique (5) 4. i) Explain the stability feedback systems in detail (5) ii) Illustrate class A power amplifier and explain. Derive its efficiency (8) 5. Catagorize the different Efficiency Boosting Techniques and give comment on its efficiency. (13) 6. For a 200 MHz oscillation frequency, a colpitts BJT oscillator in common-emitter configuration has to be designed. For the bias point of V ce =3v and I c =3mA, the following circuit parameters are given at room temperature of 25 degree Celsius: C BC =0.1fF, r BE =2kohms, r CE =10kohms C BE =100fF. If inductance should not exceed L 3 =50nH, Calculate values for the capacitances in the feedback loop. (13) 7. Examine various stability analyses performed to improve system efficiency. (13) 8. Compare various power amplifiers with its performances? (13) 9. i) Design a linear amplifier for use in a 1 GHz communication system. The requirements are to supply 1W into 50 ohms. Assume that a 3.3 V DC power supply is available. Specify important device parameters compute all component values and estimate drain efficiency (8) ii) Describe any one linearization technique. (5)

9 10. Consider a 500μm 0.5μm transistor used as a power amplifier in which drain is allowed to swing from ground to 5V. Plot Cgd and Cgb as a function of drain voltage over the range of gate voltage 0V, 2.5V, 5V. Explain and justify how it affects the performance of the power amplifier. (13) 11. i) Outline the rules of Root locus techniques. (7) ii) Interpret the role played by gain and noise margin as stability measures. (6) 12. Identify and explain the following statements. i) Negative feedback amplifier extends bandwidth. (7) ii) Negative feedback reduces noise. (6) 13. What is the need for compensation technique in amplifiers? Explain any one in brief. (13) 14. Give short notes on the following i) Envelope feedback (5) ii) Feed forward (4) iii) Pre and post distortion (4) PART C 1. An analog transmitter employs a two stage power amplifier having a gain of 15 db. Can a quadrature up converter directly drive this PA? Justify and give reasons. (15) 2. i) Determine the required synthesizer phase noise for an IEEE 11a receiver such that reciprocal mixing is negligible. (8) ii) Elaborate on gain/power boosting methods. (7) 3. Recommend few solutions to improve the efficiency of the amplifier at low power levels i) Adaptive bias (8) ii) Doherty and woodyard composite amplifier (7) 4. A unit feedback system has an input-output transfer function as follows V out =a 0 [g 1 v in +g 2 v in 2 +g 3 v in 3 ] Assume the system is weakly nonlinear. i) Derive a cubic polynomial approximation for the overall inputoutput transfer characteristic. Verify that your equation collapses to a 0 g 1 /(1+a 0 g 1 ) in the linear limit. (8) ii) By approximately what factor do the quadratic and cubic terms decrease as the linear loop transmission magnitude increases?(7)

10 UNIT IV RF FILTER DESIGN, OSILLATOR, MIXER Overview-basic resonator and filter configuration-special filter realizations-filter implementation. Basic oscillator model-high frequency oscillator configuration-basic characteristics of mixers-phase locked loops-rf directional couplers hybrid couplersdetector and demodulator circuits. PART A Q. No Questions BT Level Domain 1. Define rejection factor, ripple factor and B.W factor? 2. Give different types of filter with respect to cut-off frequency? 3. Show Unit elements and Kuroda s Identities 4. Recall shape factor, insertion loss. 5. What do you meant by linearized PLL circuit? 6. Why are ideal filter characteristics not realized in practice? 7. Contrast linear and non-linear mixer. 8. Outline few CAD tools for RF circuit design 9. Compare the types of mixer based on conversion efficiency 10. Summarize various approximation techniques to perform filter design? 11. Construct a basic dielectric resonator with its equivalent circuit 12. Draw the basic PLL architecture? 13. Sketch the Leeson s model. 14. Distinguish between oscillator and Mixer? 15. List out the basic characteristics of mixer? 16. Classify different types of Special Filters? 17. Explain basic filter configuration and performance metrics 18. Justify your answer for the following context. Does conversion gain of mixer in excess of unity, necessarily follows that sensitivity? 19. Discuss about kuroda s identity and state their applications? 20. Design the building blocks of a second order and third order PLL?

11 PART B 1. i) What is the problem with purely linear oscillator? Explain (4) ii) Describe RF directional couplers (4) iii) Summarize the important requirements of mixers (5) 2. i) List out various types of mixers in detail (5) ii) State and prove II and III kuroda identity. Explain the steps.(8) 3. i) Write in detail about MMIC-VCO and mixers (7) ii) Can a diode act as a variable capacitor for frequency agility? Give reasons. (6) 4. i) Illustrate second order PLL with its characteristics (7) ii) Describe the realization of any one special filter (6) 5. Explain the following microwave components i) directional couplers (5) ii) hybrid couplers and detectors (4+4) 6. i) Construct a band pass filter having a 0.5dB equi ripple response with N=3. The center frequency is 1 GHz, the bandwidth is 10% and the impedance is 50Ω (7) ii) Describe the importance of loop filter in PLL architecture (6) 7. i) Analyze an image reject mixer using small signal approximation (7) ii) Explain the parameters of Conversion gain, Linearity, Isolation for Mixers (6) 8. i) Examine the condition for oscillation in LC tank based microwave oscillator. (7) ii) Explain the schematic of Hartley and Colpitts oscillator (6) 9 i) The input to a multiplying PLL is a sinusoidal with two small close-in FM sidebands, i.e., the modulation frequency is relatively low. Determine the output spectrum of the PLL (8) ii) What is the need for frequency synthesis? (5) 10 i) Design a micro strip low pass filter with cut off frequency 2 GHz, 30 db attenuation at frequency 3.5 GHz for chebyshev attenuation response with 0.2dB ripple. Use alumina substrate of thickness 0.63 mm (8) ii) Elaborate on negative resistance oscillator. Give an example? (5) 11 i) Explain the concept of simple PLL with a neat diagram (7) ii) Prove I and IV kuroda identies. Explain in the steps. (6)

12 12 i) How frequency multiplication and synthesis can be done by modifying the PLL. (8) ii) Explain briefly on mixer linearity parameters. (5) 13 Analyze how the lock acquisition problem can be overcome with charge pump PLL. (13) 14 Give the mathematical expressions of a voltage controlled oscillator. (13) PART C 1 i) Demonstrate the basic microwave oscillator model and explain it in detail (8) ii) Explain the various resonator configurations with neat diagrams (7) 2 The input to a multiplying PLL is a sinusoidal with two small close-in FM sidebands, i.e., the modulation frequency is relatively low. Determine the output spectrum of the PLL (15) 3 Design a 2 port oscillator at 10 GHz using a GaAS FET in the common source configuration with the following S parameters. 4 (15) i) An N=3 Chebyshev bandpass filter is to be designed with a 3 db passband ripple for a communication link. The center frequency is at 2.4 GHz and the filter has to meet a bandwidth requirement of 20%. The filter has to be inserted into a 50Ω characteristic line impedance. Find the inductive and capacitive elements and plot the attenuation response in the frequency range 1 to 4 GHz. (10) ii) Realize any one special filter with its cut off frequency expressions. (5) UNIT V MIC COMPONENTS, ANTENNAS AND MEASUREMENT TECHNIQUES Introduction to MICs-Fabrication Technology, Advantages and applications, MIC components- Micro strip components, Coplanar circuits, Transistors, switches, active filters. Coplanar microwave amplifiers: LNA design and Medium power amplifiers. PART A Q.No Questions BT Domain Level 1. List the steps involved in probe station measurement? 2. Which is the best measurement technique for micro fabricated materials

13 3. Give the dielectric material features used in MIC 4. Define-LNA? 5. What are micro strip component of MIC. 6. Why is micromachining essential for passive components? 7. Demonstrate the conditions for oscillations 8. Outline the advantages of MIC over traditional circuits using printed circuit technology. 9. Explain the principle behind LNA design? 10. Distinguish betwen microwave integrated circuits over conventional circuits. 11. Develop the gain formulas to calculate the gain of amplifier circuit? 12. Identify different techniques used for bonding active devices in HMICs? 13. Show the equivalent circuit of inductor and capacitor? 14. Categorize the passive MIC components 15. List out 4 substrates along with their dielectric values 16. Classify microwave integrated circuits 17. Justify your answer for the context lumped components are not realizable at microwave frequencies? 18. Explain about Medium power amplifiers? 19. Discuss about the advantages and disadvantages of Coplanar Microwave amplifiers. 20. Explain the advantages for conjunctively matched network PART B 1. Write short notes on i. Integrated antennas ii. Test fixture measurements? (13) 2. i) How a coplanar circuit is used in real time applications? (8) ii) How a coplanar microwave amplifiers are classified? (5) 3. i)what is micro machining? Why is micro machining essential for antennas? (8) ii) How do you select integrated antennas? (5)

14 4. Describe in detail the various MIC materials used. (13) 5. i) What is multichip module technology (8) ii) Demonstrate active device technologies applicable to MICs. (5) 6. i) An inter digitized capacitor fabricated on a GaAs substrate has following parameters. N=8 relative dielectric constant=13.10, substrate height=0.254cm, finger length= cm, Compute the capacitance (8) ii) Identify the choice of substrates for MIC fabrications (5) 7. For a 200 MHz oscillation frequency, a colpitts BJT oscillator in common-emitter configuration has to be designed. For the bias point of Vce=3v and Ic=3mA, the following circuit parameters are given at room temperature of 25 degree Celsius: CBC =0.1fF, rbe=2kohms, rce=10kohms CBE =100fF. If inductance should not exceed L3=50nH, calculate values for the capacitances in the feedback loop. (13) 8. i) Explain the design aspects of Low noise amplifiers with neat diagrams (8) ii) Examine the use of medium power amplifiers. (5) 9. Explain the following i) Micro strip components and coplanar circuits (8) ii) Integrated antennas (5) 10. Discuss in detail about lumped elements of MIC components (13) 11. i) List text fixure design consideration guidelines (7) ii) Explain the passive microwave probe design (6) 12. i) What are the requirements of integrated antennas (7) ii) Give the applications of integrated antennas (6) 13. With neat sketch realize all types of directional couplers and explain (13) 14. i) Catagorize various design approaches in MMIC design (8) ii) Summarize the applications of MMIC technology. (5) PART C 1. Design a 7.3nH inductor. You have at your disposal a total of 6mm bond wire 900μm 2 of die area. Assume that the bond wire length can be controlled to no better than 10%. Maximize the Q of the resulting inductor by considering that the resultant value has 5% tolerance. (15) 2. Determine the resistance of interconnect as a function of temperature for the two cases. i) Skin depth is large compared to conductor thickness. (7) ii) How much variation in Q would you expect for a square spiral inductor between -55ᶿC to +155ᶿC (8)

15 3. i) Critically examine the thermal and cryogenic measurements. (7) ii)justify the need of SOLT calibration procedures. (8) 4. i) Explain MMIC fabrication technique with relevant diagrams. (7) ii)access the advantages and applications of MIC components. (8)

Session 3. CMOS RF IC Design Principles

Session 3. CMOS RF IC Design Principles Session 3 CMOS RF IC Design Principles Session Delivered by: D. Varun 1 Session Topics Standards RF wireless communications Multi standard RF transceivers RF front end architectures Frequency down conversion