Introduction to Surface Acoustic Wave (SAW) Devices
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1 May 31, 2018 Introduction to Surface Acoustic Wave (SAW) Devices Part 7: Basics of RF Circuits Ken-ya Hashimoto Chiba University
2 Contents Noise Figure and Non-Linearities RF Amplifiers Low Noise Amplifier Design Example
3 Contents Noise Figure and Non-Linearities RF Amplifiers Low Noise Amplifier Design Example
4 Signal to Noise Ratio (SNR) Spectrum Spectrum frequency frequency (a) Signal +Noise (b) After Front End Filtering Spectrum frequency (c) After Front End Amplifying
5 Noise Figure, NF F S i, N i S S i i 1 o / N / N N o N N A Cascade Connection i [Power Ratio] S o, N o NF 10log F N i : Input Noise Power N o : Output Noise Power N: Thermal Noise A: Power Gain S i, N i A 1 A 2 A 3 S o, N o N 1 N 2 N 3 P output F 1 A N N ( A2 ( A1 ( Si Ni N1) N2) N3) 3 1 N2 N3 F2 1 F3 1 F1 i Ni A1 Ni A1 A2 A1 A1 A2 Most Significant!
6 3rd order Intercept Point (IP3) Output Power Level (dbm) Generation of Jammer signals by Intermodulation Intercept Point Input Power Level (dbm) Linear Output (f 1 ) 1dB Compression Point (P 1dB ) IMD3 Output (2f 1 -f 2 ) Noise Level IIP3P 1dB +9.6 [db]
7 3rd order Intercept Point (IP3) P 2f1-f2 [dbm] = 2P f1 [dbm] + P f2 [dbm] 2 IP3 [dbm] P 2f2-f1 [dbm] = 2P f2 [dbm] + P f1 [dbm] 2 IP3 [dbm] Output Power Level (dbm) P 2f1-f2 2f 1 -f 2 P f1 P f2 f 1 f 2 P 2f2-f1 2f 2 -f 1 Frequency [Hz]
8 Spectrum Regrowth in PA and DPX = Self Mixing of Tx Signals 2f 1 -f 2 f 1 f 2 2f2 -f 1 Frequency Jammer Signal Emission to Adjacent Channels
9 2nd order Intercept Point (IP2) P f2f1 [dbm] = P f2 [dbm] + P f1 [dbm] IP2 [dbm] Output Power Level (dbm) P f2-f1 f 2 -f 1 P f1 P f2 f 1 f 2 P f2+f1 f 2 +f 1 Frequency [Hz]
10 Blocking Test Example (W-CDMA Band II) -15 dbm -30 dbm -44 dbm 25M 45M 15M 60M 15M Thermal Noise Level -100 dbm /3.84 MHz -110 dbm /3.84 MHz
11 Inter Modulation Distortion in Nonlinear Circuit for WCDMA System Signal intensity Jammer Tx filter f b -f a 2f a -f b (2 nd order) (3 rd order) f a Rx filter f b Rx signal + Nonlinear distortion product Jammer f b +f a 2f a +f b (2 nd order) (3 rd order) Band1 190 MHz Tx: MHz MHz MHz Rx: MHz MHz Band2 Tx: MHz Rx: MHz Jammer Frequency 80 MHz MHz MHz MHz Jammer Frequency
12 IP2 Suppression by Balanced Topology LNA Mixer Filter Oscillator LNA Mixer Filter + - Oscillator Output Output Input Input Unbalanced Topology Balanced Topology
13 Contents Noise Figures and Non-Linearities RF Amplifier Low Noise Amplifier Design Example
14 Capacitor Coupled LF Amplifier e in R B1 C c1 R C V cc C c2 e out DC Cut Bias Setting R B2 R E Output 50 Adequate for Impedance Matching? 50 Power Dissipation Noise Generation 0 V B Vias Voltage Input
15 RF Amplifier Configuration e in Transmitting specific frequencies V DD L D Matching Matching + Filter + Filter R L e out Transmitting specific frequencies RF Choke (DC Through) V GS RF Choke (DC Through) Measurement of Transistor S Parameters Signal Source Bias-T Bias-T Load Small Signal Measurement for Given Bias Condition (For R 0 =50 ) V GS V DS
16 Common Source Amplifier V DD L D e out L G, L S Impedance Matching e in L G M 1 L D RF Choke C GS L S Large Voltage Gain Z in il LS g C GS G m 50 1 ic GS i( L G g ils 1 ic 1 LS ) ic GS m GS 0
17 C Noise Generation B i b r b i b Thermal Noise (Resistance Origin) + Shot Noise (Junction Origin) B E - v + n + i n - E Small Signal Model (Linearize) C S 11 S 12 S 21 S 22 E Input Referred Noise i i i n c u i c : correlated with v n (Y c v n ) i u : not-correlated with v n v 2 n i 2 u 4kTBR n 4kTBG u B: Frequency Bandwidth
18 Rollet Stability (K) Factor Unconditionally Stable When K>1 K 1 S S22 S 2 S S S S 12 S 21 2
19 Matching Circuit Design Using Smith Chart Stability Circle S12S21 S 1 S 22 S Constant G Plot 2 Element (2) Element (1) 5 10 (2) Design Point Constant NF Circle -0.2 S 11 S (1) -0.5 Finding Target Point -1.0 Designing Input Matching Circuit Designing Output Matching Circuit Verification (Often S 11 and S 22 are NOT acceptable -2 Gain and NF are Dependent on Bias Current (Voltage)
20 Power Efficiency of Class A Amplifier V cc V L e in V L V cc V cc /2 1 R L 1 R 1 T L T 0 1 T V cc T V sin(2t / T ) dt 2 o V 2 cc V o sin(2t / T ) dt Maximum 25% (at V o =V cc /2) V V o cc t
21 Power Efficiency of Class B Amplifier +V cc V L +V cc V L e in 0 1 R 1 R L L 2 T 2 T T 0 T / 2 0 / 2 V V cc o o -V cc t -V cc Output sin(2t / T ) V 2 dt sin(2t / T ) dt Maximum 78.5% (at V o =V cc ) V 4 V o cc 0 Class B Class A Input
22 V DS V DD t Efficiency Distortion Class A max =50% for RF I D t Class B max =78.5% I D t Class C max =100% (At P=0) I D t Good Bad
23 Power Amplifier DC Cut Capacitor RF Choke Rejecting RF Leakage V DD L 2 e in L 1 C 1 M 1 C 2 C 1 R eout L Harmonics Suppression V b Z Matching + Z Conversion e in V DD L D M 1 M 2 V DD L D R L Driver + Main Amplifier V b
24 Linear High Efficiency PA Pre-distortion Feedback Compensation Waveform Generation Power Amp. Detector Memory Effect (Hysteresis) Problem Feed-Forward PA Power Amp. Delay ATT Delay + - Amplifier Error Detection and Compensation + -
25 Linear Amplifier with Non-linear Components (LINC) E( t) A( t)sin( t ( t)) A 2 max where (t)=cos -1 (A(t)/A max ) c [cos( t ( t) ( t)) cos( t ( t) ( t))] c Constant Amplitude c Non-Linear PA Applicable Waveform Generation PA-1 PA-2 + -
26 Contents Noise Figures and Non-Linearities RF Amplifiers Low Noise Amplifier Design Example
27 Use of High Speed Transistor BFP620 Design Low Noise Amplifier at GHz. V cc =1.5 V and I c =5 ma. Low NF and Return Suppression Mandatory. How High Gain Achievable?
28 Step 1 Bias Circuit Design
29 Step 2 S Parameter Simulation Caution!
30 S Simulation Result S 21 NF S 11 NF min S 22 NF min : Achievable minimum NF at the given frequency
31 Impact of Emitter Degeneration Inductor
32 Simulation Results L=0 nh L=1 nh L=2 nh L=3 nh
33 Simulation Results L=0 nh L=1 nh L=2 nh L=3 nh
34 Step 3 Design Matching Circuits
35 Procedure
36 After Adding Designed Matching Circuit
37 Simulated Results S 11 and S 22 Suppression Astable?
38 Step 4 Stabilization Z Increase Z Increase Q Reduction
39 Simulation Results Stabilized
40 Step 5 Transient Analysis
41 Simulation Results Pin=-10 dbm Pin=-5 dbm
42 Step 6 Two Tone Analysis
43 Two Tone Test Result P 2ab [dbm]=2 P a [dbm] + P b [dbm] - 2 OIP3 [dbm] -40.1=2 (-4.39) + (-4.5) - 2 OIP3 OIP3 =13.4 [dbm]
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