Session 3. CMOS RF IC Design Principles

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1 Session 3 CMOS RF IC Design Principles Session Delivered by: D. Varun 1

2 Session Topics Standards RF wireless communications Multi standard RF transceivers RF front end architectures Frequency down conversion Synthesis of a generic front end architectures Single and two path front end architectures RF building block specifications 2

3 Session Objectives Learn principles of wireless digital communication transceivers Gain knowledge of RF front-end circuits Learn basic design methods and techniques for RF circuit design Understand the related possibilities and limitations 3

4 WHAT IS RF? Frequency spectrum: Lumped parameters models failed Kirchoff's to Maxwell s Equation Failure of two port circuit parameter (Z, Y,ABCD) Scattering parameter( S-parameter) on the basis of Maxwell equation 4

5 Application Area of RF-IC Design Wireless communication Radar Navigation Remote sensing RF identification Automobile and Highways Sensors: Medical Radio- astronomy and space exploration 5

6 Comparison of Analog and RF/MW 6

7 Comparison of Analog and RF/MW Performance Based ( Analog [Low frequency<100mhz] ) ( RF/MW [High frequency>100mhz] ) Small signal AC equivalent circuit analysis Linearity Stability Noise (on few cases) Small signal AC equivalent circuit analysis with parasitic i.e. Good circuit Modelling Matching Noise Stability Linearity Sensitivity Dynamic range 7

8 Comparison of MMIC/RFIC Parameter MMIC( Discrete) RFIC ( integrated) Development Cost Moderate Very high Modifications Relatively easy & inexpensive Expensive,generally one or more new mask BOM cost Low Depends on volume, die sized and process used Mixing Technologies Optimum device technology can be used through out ( combined GaAs, BJT, MOS) Limited scope Parts Count High Low to very low Size Small to medium Smallest Matched transistor Difficult to implement Very good, used extensively 8

9 Wireless Communication Systems Today 9

10 Overview of PCS Standards 10

11 RF communication channel Tx s convert BB to RF signals using modulation Tx s must not corrupt one another division of RF band Rx s select wanted RF signals and retrieve BB by demodulation Rx s must suppress unwanted signals and noise 11

12 Digital transmitter at glance 12

13 Digital receiver at glance 13

14 Ultimate objective of RFIC Single-chip transceiver Minimum external components Inductors and capacitors integrated on chip 14

15 Why CMOS Technology Submicron MOSFETs, 180, 130, 90 nm today, very fast, fmax>100ghz, perform well up to 10 GHz or more Good linearity for higher signal swing With multiple metal layers good capacitors and inductors (QL up to 20) can be integrated on a chip Upper metal layers far from Si substrate reduce substrate losses Lower substrate doping helps to isolate RF blocks and reduce losses Large digital bocks (DSP & control) can be integrated on one chip CMOS cheaper from other technologies (BiCMOS, GaAs,.. ) Many successful RF CMOS designs performed recently 15

16 Early and today RF circuits All receiver functions in one simple passive circuit RF band selection Demodulation Low pass filtering, (channel selection) Advanced RF/BB signal processing for performance and reliability Receiver functions distributed, digital part gives flexibility (SDR) Most processing digital at BB, still high requirements for the RF frontend 16

17 Filtering in front-end In most cases BP (or LP) filters needed Bandwidth of RF system determined by filters Unwanted signals must be suppressed (interferers, images) Selectivity of BPF is of big concern /but high Q tough to obtain BW = f0/q so for given Q, BW~ f0 Filter of same Q more effective at lower frequency (e.g. at IF or BB) than at RF (in Rx only partial suppression at RF) Ultimate filtering in Rx always at low frequency 17

18 Up/down conversion 18

19 In-band interferers Band selection filtering in Rx front-end Corruption of a signal due to intermodulation between two in-band interferers (linear LNA needed) 19

20 In-band interferers (cont d) Desensitzation and blocking 20

21 Image problem If ω IF too low this can be an in-band image, otherwise it is suppressed partly by filters before the mixer. Also harmonics of LO produce image frequencies and also can combine with harmonics of other interferers 21

22 Spurious Emission Higher harmonics can be suppressed by the output filter, but IM distortions are difficult to remove Some modulation schemes allow more nonlinear PA. In FSK or MSK no abrupt changes in phase and have constant amplitude: 22

23 Heterodyne Receiver Intermediate frequency fixed /IF Easy tuning to channel Good sensitivity and selectivity interferers suppressed Heterodyne still appreciated All filters usually off-chip (ceramic or SAW) require low impedance matching 23

24 Choice of LO Frequency in Heterodyne Rx 24

25 Trade-off in Heterodyne Rx Out-of-band image can be suppressed before mixing, ω IF should be large enough to relax the requirements for BPF2 The heterodyne architecture reflects the trade-off between image rejection and band selection. Larger ω IF allows Q2 be lower, but then Q3 must be larger and vice versa. This can be alleviated in double-if topology. 25

26 Dual Heterodyne with Digital 2 nd Stage Tough requirements for ADC linearity, dynamic range (interferers) and speed. Can be relaxed by AGC amplifier. Still high power consumption. Down conversion to zero by quadrature mixing needed 26

27 RF Transmitters Function Performance Specification Modulation Accuracy Frequency Translation Power Amplification Spectral Emission Output Power Level

28 Transmitter Architectures Mixer-Based Direct Conversion (Homodyne) 2-Stage Conversion (Heterodyne) Both architectures can operate with constant and nonconstant envelope modulation Well-suited for multi-standard operation PLL-Based Show promise with respect to elimination of discrete components Fundamentally limited to constant-envelope modulation schemes not suitable for multi-standard operation

29 Transmitter Architectures Direct Conversion Attractive due to simplicity of the signal path suitable for high levels of integration Output carrier frequency = local oscillator (LO) frequency Important drawback: LO disturbance by PA output

30 Transmitter Architectures Direct Conversion LO Pulling Noisy output of PA corrupts VCO spectrum - injection pulling or injection locking VCO frequency shifts toward frequency of external stimulus If injected noise frequency close to oscillator natural frequency, then LO output eventually locks onto noise frequency as noise level increases

31 Transmitter Architectures Direct Conversion LO Frequency Offset Technique LO pulling can be alleviated by moving the PA output spectrum sufficiently far from the LO frequency LO offset can be achieved by mixing 2 VCO outputs ω1 and ω2 and filtering the result; leading to a carrier frequency of ω1+ ω2, far from either ω1 or ω2 BPF1 must have high selectivity to suppress spurs of the form mω1+mω2 to avoid degradation in quadrature generation and spurs in the up-converted signal

32 Transmitter Architectures 2-Stage Up-Conversion Another approach to solving the LO pulling problem Up-convert in 2 stages so PA output spectrum is far from VCO frequency Quadrature modulation at IF (ω1), up-convert to ω1+ ω2 by mixing and filtering BPF1 suppresses the IF harmonics, while BPF2 removes the unwanted sideband ω1- ω2 Advantages: no LO pulling; better I/Q matching (less crosstalk between the 2 bit streams)

33 Current Trends in Integrated Transceivers Both direct and 2-stage architectures are used (with modifications for better integration and multistandard operation) Direct architecture achieves a low-cost solution with a high level of integration [3],[4],[6],[8] 2-stage results in better performance (ie. reduced LO pulling) at the expense of increased complexity and hence higher cost of implementation [5],[7],[9],[10],[11] Transmitter and receiver designed concurrently to enable hardware and possibly power sharing

34 Direct Conversion Example A 5-GHz CMOS transceiver frontend chipset [6] Homodyne architecture for better integration, lower cost and lower power consumption Uses on-chip quadrature VCO and buffers to improve frequency purity On-chip VCO minimizes radiation leakage from strong PA output back to core oscillator Buffers isolate sensitive VCO circuit from highpower, large voltage or current swing circuit blocks

35 2-Stage Conversion Example A Dual Band (GSM 900-MHz/DCS GHz) CMOS Transmitter [7] Exploits similarities of GSM and DCS1800 standards (modulation, channel spacing, antenna duplexing) to reduce hardware 2 quadrature upconverters driven by 450MHz LO to generate quadrature phases of IF signal IF signal routed to single-sideband mixers driven by a 1350MHz LO, producing either 900MHz or 1800MHz signal

36 2-Stage Conversion Example (#2) Harmonic rejection mixer for IF up-conversion relaxes on-chip filtering requirements and even eliminates discrete IF filter better integration! 1.75GHz Integrated Narrow-Band CMOS Transmitter with Harmonic-Rejection Mixers [5] HRM not only does frequency translation, but also attenuates the 3 rd and 5 th IF harmonics by multiplying the baseband signal by a 3-bit, amplitude-quantized sinusoid

37 Future Challenges Implementation of highly integrated radio transceivers will remain as one of the greatest challenges in IC technology New architectures and circuit techniques should be investigated for higher flexibility in CMOS transmitters Further improvement needed in the design of on-chip inductors, filters and oscillators in a standard CMOS process Continued improvement in high frequency CMOS device modeling and simulation

38 Summary Application Area of RF-IC Design Digital transmitter and receiver blocks Up/down conversion In-band interferers Spurious Emission RF Transmitter and Receiver Architectures 38