VALLIAMMAI ENGINEERING COLLEGE

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1 VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK IV SEMESTER EC6401 ELECTRONICS CIRCUITS-II Regulation 2013 Academic Year Prepared by Mr.S.Marirajan,, Assistant Professor/ECE Mrs.S.Subbulakshmi, Assistant Professor/ECE Mr.A.Pandian, Assistant Professor/ECE Mr.T.V.Sudhir, Assistant Professor/ECE

2 VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING SUBJECT QUESTION BANK : EC6401 ELECTRONICS CIRCUITS-II SEM / YEAR: IV / II year B.E. UNIT I FEEDBACK AMPLIFIERS General Feedback Structure Properties of negative feedback Basic Feedback Topologies Feedback amplifiers Series Shunt, Series Series, Shunt Shunt and Shunt Series Feedback Determining the Loop Gain Stability Problem Nyquist Plot Effect of feedback on amplifier poles Frequency Compensation. Q. No Questions PART A BT Level Competence 1. Define positive and negative feedback. i ng 2. List out the three networks that are connected around the basic amplifier to implement feedback concept. 3. Outline the advantages of negative feedback in amplifiers. 4. Demonstrate the loop gain or return ratio of feedback amplifier. 5. Write the gain with feedback for the amplifier with open loop gain of 300 and feedback factor of Describe the effect of gain in amplifier when voltage shunt & series feedback is employed. 7. Tabulate the input and output resistances of a negative feedback amplifier. 8. Illustrate the current series & current shunt feedback. 9. Summarize the effect of negative feedback on amplifier characteristics.

3 10. Show the reason for negative feedback which increases bandwidth. 11. The voltage gain without negative feedback is 40dB. What is the new voltage gain if 3% negative feedback is introduced? 12. Identify the impact of negative feedback on noise and distortion in amplifier circuits. 13. Calculate the percentage of negative feedback if a feedback is used to reduce the distortion of an amplifier by 80 %. The voltage gain of the amplifier is the equivalent circuit of Trans-conductance amplifier. 15. Explain the decrease in output impedance in feedback amplifiers. 16. Define sensitivity and de-sensitivity of gain in feedback amplifiers. 17. Differentiate Phase margin and Gain margin. 18. A multipole amplifier having a first pole at 1MHz and an open loop gain of 100dB is to be compensated for closed loop gains as low as 20 db by an introduction of a non-dominant pole. Inspect at what frequency must the pole be placed? 19. the Nyquist criterion for stability of feedback amplifiers. 20. Compose the stability condition using Nyquist criterion. PART B 1. Define the expressions for gain with positive and negative feedback. 2. List the effects of negative feedback on stability, distortion, noise, input and output impedance of a feedback amplifier. 3. (i) Recall the effect of negative feedback on the bandwidth and harmonic distortion of an amplifier. (7) (ii) A negative feedback amplifier has an open loop gain of and a closed loop gain of 300. If the open loop upper cut off frequency is 15KHz, Choose the closed loop upper cutoff frequency. Also, calculate the total harmonic distortion with feedback if there is 10% harmonic distortion without feedback (6)

4 4. (i) A voltage-series negative feedback amplifier has a voltage gain without feedback of A = 500, input resistance Ri = 3kΩ, output resistance Ro = 20kΩ and feedback ratio β = Find the voltage gain Af, input resistance Rif and output resistance Rof of the amplifier with feedback. (7) (ii) The current-series feedback types of transistor amplifier for the given circuit diagram has the following parameters such as Rs=1KΩ, RL = 1KΩ, Re = 100Ω hfe = 80 and hie = 2kΩ. show G M, β, G Mf, Rif, R of. (6) 5. An amplifier, without feedback, has a voltage gain of 500, lower cutoff frequency f1 = 100 Hz, upper cut-off frequency f2 = 250 KHz and a distortion of 10%. Identify the amplifier voltage gain, lower cutoff frequency and upper cut-off frequency and distortion, sensitivity, de-sensitivity and bandwidth when a negative feedback is applied with feedback ratio of Explain the effect of a current series feedback on input and output resistance of a BJT amplifier. Explain the same, with necessary circuit, equivalent circuit and equations. 7. Illustrate the current shunt feedback connection and derive the expressions for Rif and Rof. 8. (i) Outline the voltage series amplifier with block diagram and derive for Rif and Rof. Draw a two stage amplifier with voltage series feedback. (10) (ii) Demonstrate for bandwidth with feedback. (3) 9. Explain the current series feedback amplifier with neat block diagram and derive the expressions for Rif and Rof. 10. (i) Build the circuit diagram of voltage shunt feedback amplifier (5) (ii) Develop the expressions for Rif and Rof. (8) 11. (i) An amplifier, with feedback has voltage gain of 100. If the gain without feedback changes by 20 % and the gain with feedback should not vary more than 2 %. If so, analyze the values of open loop gain A and feedback ratio β. (7) (ii) For the given emitter follower circuit, test for Ai, Ri, Av, Ro & Rof if Rs = 600Ω, RL = 2kΩ, hfe = 80 and hie = 5kΩ. (6)

5 12. Examine the nature of feedback in figure. Let R c1 =3KΩ R c2 =500Ω R E =50Ω R s =R f =1.2KΩ h fe = 50, h ie = 1.1KΩ, h re = h ce = 0.Determine overall voltage gain A vf,overall current gain A if,input impedance R if and output impedance R of 13. Sketch the circuit of a single stage CE amplifier that uses emitter current feedback. Model the circuit and derive the equations for gain, input and output impedance with feedback 14. With an example Circuit, Determine the method of identifying the feedback topology. Also determine the feedback factor. PART C 1. Explain the effect of series-shunt feedback on output resistance. 2. The circuit of fig.shown has R c =4KΩ,R =40KΩ, R s =10KΩ, h fe = 50, h ie = 1.1KΩ. R Mf, A vf, R if, R of, R of by identifying the topology

6 3. (i) Estimate Nyquist criterion to analyze the stability of feedback amplifiers (8) (ii) An amplifier with negative feedback has a voltage gain of 120. It is found that without feedback an input signal of 60mV is required to produce a particular output, whereas with feedback the input signal must be 0.5V to get the same output. Find Av and β of the amplifier. (7) 4. (i) An amplifier has a voltage gain of 1000 with f l = 50Hz, f H = 50KHz if 5 % feedback is amplified,solve the gain with the feedback and the lower and upper cutoff frequencies with the feedback (8) (ii) An amplifier has a midband gain of 125 and a bandwidth of 250 khz. 1.If 4% negative feedback is introduced discuss the new bandwidth and gain. 2.If the bandwidth is to be restricted to 1 MHz, discuss the feedback ratio (7) UNIT II OSCILLATORS

7 Classification, Barkhausen Criterion - Mechanism for start of oscillation and stabilization of amplitude,general form of an Oscillator, Analysis of LC oscillators - Hartley, Colpitts,Clapp, Franklin, Armstrong,Tuned collector oscillators, RC oscillators - phase shift Wienbridge - Twin-T Oscillators, Frequency range of RC and LC Oscillators, Quartz Crystal Construction, Electrical equivalent circuit of Crystal,Miller and Pierce Crystal oscillators, frequency stability of oscillators.. PART A Q. No Questions BT Level Competence 1. Define an oscillator and show why the oscillator is called as sinusoidal or harmonic oscillator? 2. Recall amplifier and oscillator. 3. State the Barkhausen criterion for an oscillator. 4. Mention the Oscillator classification by their frequency generated. 5. Write the general equation for an oscillator. 6. Draw the block diagram of an oscillator. 7. Outline the equivalent circuit of an oscillator. 8. Summarize any two examples for high frequency and low frequency oscillators. 9. Compare Hartley and Colpitts oscillator. 10. If L1 = 1 mh, L2 = 2 mh and C = 0.1 nf, Estimate the frequency of oscillation for Hartley oscillator. 11. A Colpitts Oscillator circuit having two capacitors of 24nF and 240nF respectively are connected in parallel with an inductor of 10mH. Identify the frequency of oscillations of the circuit, the feedback fraction. 12. Interpret how the feedback occurs in Armstrong Oscillator? 13. Identify the advantages of RC phase shift oscillator. 14. In an RC phase shift oscillator, if R1 = R2 = R3 = 200kΩ and C1 = C2 = C3 = 100 pf. Determine the frequency of oscillations.

8 15. the advantages and disadvantages of wein bridge oscillator. 16. List the advantages of crystal oscillator. 17. Explain about the quartz crystal and draw the equivalent circuit of and mention its series and parallel resonant frequencies. 18. Determine piezoelectric effect. 19. Constuct the figure of X-cut & Y-cut of Piezo-electric crystal. 20. Predict the factors which contribute to change in frequency. PART B 1. (i) List the different classification of oscillators. (6) (ii) Briefly describe about the conditions for oscillation or Barkhausen criterion. (7) 2. Identify the general form of an LC oscillator and derive the equations with the diagrams and its equivalent circuit. 3. Find the working of a Hartley oscillator with a neat circuit diagram and derive the frequency of oscillation. 4. (i) In the Colpitts oscillator, C1 = 0.2µF and C2 = 0.02µF. If the frequency of the oscillator is 10 khz, find the value of the inductor and the required gain for Oscillation. (7) (ii) What is the frequency of oscillation for the Clapp oscillator with C1 = 0.1 µf, C2 = 1 µf, C3 = 100pF and L = 470 µh. (6) 5. (i) Describe the clapp oscillator and its design with a neat diagram. (7) (ii) A tank circuit contains an inductance of 1mH. Select the range of tuning capacitor value if the resonant frequency ranges from 540 to 1650 khz. (6) 6. Estimate the frequency of oscillation and the condition for sustained oscillation of Colpitts oscillator with neat circuit diagram. 7. (i) In a transistorized Hartley oscillator, the two inductances are 2mH and 20µH while the frequency is to be changed from 950kHzto

9 2050kHz. Calculate the range over which the capacitor is to be varied? (6) (ii) The frequency of oscillation of a Colpitts oscillator is given by fo = 1 C1 C2 2π L C1+C2 where L, C1 and C2 are the frequency determining components. This circuit operates at 450kHz with C1=C2. Solve the frequency of oscillation if the value of C2 is doubled? (7) 8. Explain the following oscillators with neat circuit diagrams and analyze the working principle: (i) Franklin oscillator (6) (ii) Armstrong oscillator (7) 9. (i) Illustrate the tuned collector oscillator. (7) (ii) A tuned collector oscillator in a radio receiver has a fixed inductance of 60µH and has to be tunable over the frequency band of 400 to 1200 khz. Compute the range of variable capacitor to be used. (6) 10. Identify the working principle of RC phase shift oscillator circuit diagram also derive the expression for frequency of oscillation and condition for sustained oscillation. 11. a RC Phase shift oscillator to generate 5 khz sine wave with 20V peak to peak amplitude and draw the circuit for designed by assuming hfe = Examine the working of Miller and Pierce crystal oscillators with neat circuit diagrams. 13. Determine the working principle of Twin T oscillator with neat circuit diagrams and equations. Give any two applications. 14. (i) In a Hartley oscillator, the value of the capacitor in the tuned circuit is 500pF and the sections of the coil have inductances 38µH and 12µH. Design the frequency of oscillations and the feedback factor β. (6) (ii) A crystal has the following parameters L = 0.5 H, Cs = 0.06 pf, Cp = 1pF and R = 5kΩ. Estimate the series and parallel resonant frequencies and Q-factor of the crystal. (7) PART C Q.No Questions BT Level Competence

10 1 (a) In a Colpitts oscillator, the values of the inductors and capacitors in the tank circuit are L = 40mH, C1 = 100pF and C2 = 500pF. the following (i) frequency of oscillations. (ii) If the output voltage is 10V, find the feedback voltage. (iii) Find the minimum gains if the frequency is changed by changing L alone. (iv) Find the value of C1 for a gain of 10. (v) Also find the new frequency. 2 Explain the gain of Wein bridge oscillator using BJT amplifier with necessary equations and diagrams 3 (i) Elaborate the working of Colpitts crystal oscillator with quartz crystal construction and with appropriate diagrams. (10) (ii) Compare LC Oscillators & Crystal Oscillators. (5) 4 Design the Capacitor C and hfe for the transistor to provide a resonating frequency of 10kHz of a transistorized phase shift oscillator. Assume R1=25kΩ, R2=60kΩ, Rc=40kΩ, R=7.1kΩ and hfe =1.8kΩ. UNIT III TUNED AMPLIFIERS Coil losses, unloaded and loaded Q of tank circuits, small signal tuned amplifiers - Analysis of capacitor coupled single tuned amplifier double tuned amplifier - effect of cascading single tuned and double tuned amplifiers on bandwidth Stagger tuned amplifiers large signal tuned amplifiers Class C tuned amplifier Efficiency and applications of Class C tuned amplifier - Stability of tuned amplifiers Neutralization - Hazeltine neutralization method. PART A Q.No Questions BT Level Competence 1. Differentiate loaded Q and unloaded Q. 2. Identify the ideal response and actual response of tuned amplifiers with diagram. 3. Mention the advantages and disadvantages of tuned amplifier 4. An inductor of 250 µh has Q = 300 at 1MHz. Invent Rs and Rp of the inductor. 5. Illustrate the applications of tuned amplifiers.

11 6. Define gain product bandwidth of tuned amplifier. 7. Elaborate tuned amplifier. 8. Compare single tuned and synchronously tuned amplifiers. 9. Deduce the magnitude of stagger tuned amplifier. 10. A tuned amplifier has its maximum gain at a frequency of 2 MHz and has a bandwidth of 50 KHz. Calculate the Q factor 11. Show the bandwidth of two stage synchronous tuned amplifier. Assume the bandwidth of individual stage is 200kHz. 12. Write the use of transformer in tuned amplifier circuit. 13. Summarize the effect of cascading n stages of identical single tuned amplifiers on bandwidth 14. Estimate the bandwidth of a 3 stage cascaded single tuned amplifier if the resonant frequency is 455 KHz and the loaded Q of each stage is Where the Q point is placed in a class C amplifier? 16. Give the applications of class C tuned amplifier. 17. Examine the efficiency of class C tuned amplifier. 18. Express the need for neutralization. 19. the equivalent circuit of neutralization. 20. Discriminate Hazeltine and modified Hazeltine neutralization. PART B 1. Define and recall about coil losses, unloaded and loaded Q of tank circuits. 2. Show the Small signal tuned amplifier with necessary derivations. 3. A single tuned transistor amplifier is used to amplify modulated RF carrier of 600 KHz and a bandwidth of 15 KHz. The circuit has total output resistance Rt = 20 KΩ and output capacitance Co = 50 pf. Select the values of inductance and capacitance of tuned circuit.

12 4. Label the double tuned amplifier with neat circuit diagram and derive the expression for 3dB bandwidth. 5. Explain the effect of bandwidth on cascading single tuned and double tuned amplifiers. 6. (i) Compare the various Tuned amplifiers. (10) (ii) A three stage double tuned amplifier system is to have a half power BW of 20kHz centred on a centre frequency of 450kHz. Assuming that all stages are identical, determine the half power bandwidth of single stage. Assume that each stage couple to get maximum flatness. (3) 7. Demonstrate the large signal tuned amplifiers in detail with circuit diagram, Q point & efficiency. 8. Develop the Class C tuned amplifier and calculate resonant frequency, AC collector resistance, quality factor and bandwidth by assuming QL = Identify the stability of tuned amplifiers and mention the need of neutralization. 10. Examine the following parameters fo=1mhz, db bandwidth is 10kHz and maximum gain is -10 FET has gm = 5mA/V, rd = 10k design a FET tuned amplifier. 11. (i) A single tuned RF amplifier uses a transistor with an output resistance of 50k, output capacitance of 15pF and input resistance of next stage is 20kΩ. The tuned circuit consists of 47pF capacitance in parallel with series combination of 1µH inductance and 2Ω resistance. the resonant frequency, effective quality factor and bandwidth of the amplifier. (10) (ii) Assume FET and draw the single tuned amplifier (3) 12. For the Class C tuned amplifier determine the output power if the output voltage is 50Vpp, maximum AC output power, D.C input power if current drain is 0.5 ma, efficiency if the current drain is 0.44ma and the output voltage is 30Vpp, bandwidth of amplifier if Q=125, worst case transistor power dissipation. 13. If class C tuned amplifier has RL = 6kΩ and required tank circuit Q = 80. Estimate the values of L & C of the tank circuit. Assume Vcc=20V, resonant frequency = 5Mhz and worst case power dissipation = 20mW.

13 14. Elaborate the following with neat circuit diagram: i. Hazeltine neutralization ii. Neutrodyne neutralization PART C 1. Estimate the single tuned amplifier with the following specifications: 1.centre frequency =500KHz 2.Bandwidth =10 KHz Assume transistor parameters:g m =0.04, h fe = 100, c b e = 1000pF and c b c=100pf.the bias network and input resistance are adjusted so that r i = 4KΩ and R L = 510Ω. 2. the circuit diagram and equivalent circuit of a capacitor coupled single tuned amplifier and derive the expression for 3 db bandwidth. Sketch also the frequency response of the amplifier 3. (i) An RF tuned voltage amplifier,using FET with r d = 100KΩ and g m = 500µs has tuned circuit,consisting of L=2.5mH,C=200 pf,as its load.at its resonant frequency the circuit offers an equivalent shunt resistance of 100KΩ. For the amplifier Design, a)resonant gain b)effective Q c)bandwidth (8) (ii) A Single tuned amplifier using FET has tank circuit components L=100µH,R=5Ω and C=1000pF.The FET used has r d = 500KΩ and g m =5mA/V Estimate 1.Resonant frequency 2.Tank circuit impedance at resonance 3.Voltage gain at resonance 4.Bandwidth (7) 4. s a class C amplifier has a base bias voltage 0f -5V and Vcc=30V. It is determined that a peak input voltage of 9.8V at 1MHz is required to drive the transistor to its saturation current of 1.8A. Find the conduction angle, output power at 1MHz and the efficiency.

14 UNIT IV WAVE SHAPING AND MULTIVIBRATOR CIRCUITS RC & RL Integrator and Differentiator circuits Storage, Delay and Calculation of Transistor Switching Times Speed-up Capacitor - Diode clippers, Diode comparator - Clampers. Collector coupled and Emitter coupled Astable multivibrator Monostable multivibrator Bistable multivibrators Triggering methods for Bistable multivibrators - Schmitt trigger circuit. PART A Q.No Questions BT Level Competence 1. Define linear wave shaping circuits. 2. What is high pass filter? 3. Recall duty cycle. 4. Examine how the high pass RC circuit acts as a differentiator. 5. Determine the time constant value. 6. Design the circuit of RC integrator and mention the condition under which the circuit behaves as an integrator. 7. Recall the rise time and storage time of a transistor switching circuit. 8. Show a second order HPF with identical RC section. Assume the gain is 3, f=35khz & C=0.01 µf. 9. Develop a clipper circuit which clips all voltages above +2 V. 10. Illustrate how the diode act as a comparator? 11. Draw a simple clamper circuit. 12. Compare clipper and clamper circuit. 13. Examine why we call astable multivibrator as free running multivibrator? 14. Calculate the value of capacitors to be used in an astable multivibrator to provide a train of pulse 2 µsec wide at a repetition rate of 75 KHz with R1=R2=10 KΩ. 15. In the astable multivibrator, R1=R2=R=10kΩ and C1=C2=0.01µf. Show the time period and frequency of the square wave. 16. Summarize the applications of bistable multivibrator. 17. Compare Astable, Monostable and Bistable multivibrators.

15 18. Select the role of commutating capacitor in bistable multivibrator and draw its circuit. 19. Differentiate symmetrical triggering and unsymmetrical triggering. 20. Point out the reason of Schmitt trigger acting as a zero crossing detector. PART B 1. (a) Show a High pass RC circuit (Differentiator) with its derivation. (6) (b) Find the high pass RC response by applying the step input and pulse input. (7) 2. (a) What will be happen to the RC high pass filter by applying square wave, symmetrical square wave and ramp input signal? 3. (a) Describe and design a Low pass RC circuit. (6) (b) Identify Low pass RC circuit response by applying step input and pulse input. (7) 4. How the RC Low pass filter will response by applying square wave, symmetrical square wave and ramp input signal? 5. Outline the step input and pulse input to high pass RL circuit and verify its response. 6. Infer how the High pass RL circuit will perform when applying square wave, symmetrical square wave and ramp input? 7. (a) Illustrate the operation of collector coupled astable multivibrator with neat diagrams and waveforms. (7) (b) Estimate the expression for pulse width astable multivibrator.(6) 8. (a) Explain in detail about the Speed-up capacitor. (7) (b) For a transistor switching circuit predict the collector current response and other parameters for the input of pulse waveform. (6) 9. (a) Classify the various types of diode clippers. (6) (b) Demonstrate the diode clippers with appropriate diagrams and waveforms. (7) 10. (a) Construct the diagram and explain diode comparator. (7) (b) Calculate Vo for the clamping circuit for the given sinusoidal input signal shown in figure. Assume the sinusoidal input signal is 10Vpp. (6)

16 11. Illustrate the free running multivibrator with necessary expressions and diagrams. (7) (b) the value of capacitors to be used in an astable multivibrator to provide a train of pulse 2µs wide at a repetition rate of 100kHz, if R1=R2=20kΩ. (6) 12. (a) Examine the working principle of modified astable multivibrator and emitter coupled astable multivibrator with diagrams. (6) (b) Investigate the function of emitter coupled monostable Multivibrator and triggering methods for monostable multivibrator. (7) 13. (a) the working principle of Bistable multivibrator with neat diagrams. (7) (b) Compose the triggering methods for bistable multivibrator and explain it by necessary diagrams. (6) 14. (a) Determine how Schmitt trigger circuit can be evolved from a bistable circuit. (6) (b) Formulate the expression for UTP and LTP in Schmitt trigger with circuit diagrams. (7) PART C Q.No Questions BT Level Competence 1 (a) Develop the high pass RL Circuit with necessary diagrams. (7) (b) Design low pass RL circuits with necessary diagrams and expressions. (8) 2 a collector coupled astable multivibrator using Vcc (peak) = 20V and Ic(sat) = 3mA, to generate a pulse wave at a frequency f = 2kHz with 70% duty cycle. Assume hfe(min) = (a) Construct one shot multivibrator with necessary circuit diagrams and waveforms. (7) (b) Express the duration of the output pulse of the one shot multivibrator. (8) 4 Design a Schmitt trigger circuit for the data given: Vcc = 20, UTP = 5V and LTP= 3 V. Ic sat = 2 ma and hfe (min) = 100. Draw the designed circuit.

17 UNIT V BLOCKING OSCILLATORS & TIME BASE GENERATORS UJT saw tooth waveform generator, Pulse transformers equivalent circuit response - applications,blocking Oscillator Free running blocking oscillator - Astable Blocking Oscillators with base timing Push-pull Astable blocking oscillator with emitter timing, Frequency control using core saturation,triggered blocking oscillator Monostable blocking oscillator with base timing Monostable blocking oscillator with emitter timing, Time base circuits - Voltage-Time base circuit, Current-Time base circuit Linearization through adjustment of driving waveform. PART A Q.No Questions BT Level Competence 1. When the oscillator is called as a free running blocking oscillator? 2. Mention the advantage of core saturation method of frequency control in a blocking oscillator. 3. List any two methods of achieving sweep linearity of a timebase waveform. 4. Define duty cycle. 5. Recall the concept of Sweep time. 6. Outline the operation of UJT 7. Give the two important elements of blocking oscillator. 8. Differentiate restoration time and sweep time of a time-base signal. 9. Mention the various elements of pulse transformer. 10. Summarize applications of the pulse transformer. 11. Show the characteristics of pulse transformer. 12. Write the equation used to determine sweep frequency of a UJT relaxation oscillator. Calculate the frequency with R = 100 KΩ, C = 0.4 µf and intrinsic stand-off ratio 0.57.

18 13. Illustrate the slope error of a voltage sweep waveform. 14. Examine the voltage and current time base generators. 15. Compare sweep speed error and transmission error. 16. the restoration time or flyback time 17. Justify the function of time base circuit. 18. Conclude the applications of blocking oscillator. 19. Design a complete equivalent circuit of pulse transformer. 20. Develop the equivalent circuit of UJT. PART B 1. Describe the operation of a RC controlled astable transistor blocking oscillator with circuit diagram and waveforms. 2. Examine the operation of a triggered blocking oscillator with emitter timing. Sketch the circuit and waveforms and also derive the expression for tp. 3. Identify how the push-pull Astable blocking oscillator works. Give necessary neat circuit diagram and explain. 4. Discuss how an Astable circuit acts as a free running blocking oscillator. Draw the circuit and explain. 5. Summarize Miller integrator and current time-base circuit waveforms. 6. The diode controlled Astable blocking oscillator has the parameters Vc = 10 V, Vb = 5 V, C1 = C2 = 2 nf, Vr = 9V, L = 3 mh and C = 100 pf. Calculate the frequency of oscillation and duty cycle. 7. (i) Illustrate the working of UJT (saw tooth generator) with suitable circuit and waveforms & explain. (ii) the expression for the oscillating frequency of UJT. 8. Compare RC controlled and Diode controlled Astable blocking oscillator.

19 9. Consider a UJT sweep circuit, the resistance is 20 KΩ while the capacitance is 0.2 µf. The valley potential is 1.5 V when VBB = 15 V. Assuming diode cut in voltage of 0.7 V and intrinsic stand-off ratio as 0.5, evaluate the frequency of oscillations. 10. Design the circuit of Bootstrap voltage time base generator and explain the quiescent conditions, formation of sweep, retrace interval and recovery process. 11. Outline Pulse transformer and it s equivalent circuit with neat diagram. 12. Explain the various responses of a pulse transformer and also mention the applications of a pulse transformer. 13. Show the equivalent circuit of monostable oscillator with base timing and explain it s operation 14. Examine the linearization through adjustment of driving waveforms with neat diagrams. PART C 1 Estimate the circuit diagram and operation of monostable blocking oscillator with base timing and emitter timing. 2 A diode controlled astable blocking oscillator has the following parameters: L=5mH, C=90pF, VCC=10v, R=470Ω, Vᵞ=6V, n=1 and VBB=0.5V. Predict (i) The period and duty cycle of free oscillations. (7) (ii) The Emitter and Base current. (8) 3 Explain the operation of various blocking oscillators with neat diagram. 4 A UJT with intrinsic stand off ratio of 0.62 is used in a relaxation oscillator circuit with R=5KΩ and C=0.05µF. Estimate (i) The period and frequency of oscillation. (6) (ii) The new value of R to obtain a frequency of oscillation of 50 Hz. (5) (iii) If C is increased by a factor of 10 and frequency be 50 Hz, what will be the new value of R. (4)

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