EE 435. Lecture 8: High-Gain Single-Stage Op Amps. -folded cascode structures

Transcription

1 EE 435 ecture 8: Hih-Gain Sinle-Stae Op mps -folded cascode structures

2 Review from last lecture: Telescopic ascode Op mp Sinle-ended operation - o 2 o3 o + GB 2 o5 o7 m7 (MFB circuit not shown) This circuit is widely used!! 2

3 Review from last lecture: Telescopic ascode Op mp DD DD M 5 M 6 M 5 M 6 DD M 7 M 8 OUT DD M 7 M 8 OUT I B B3 M 3 M 4 I B B3 M 3 M 4 IN M M 2 IN IN M M 2 IN B5 I T B5 I T M 2 M M 2 M urrent Mirror Bias urrent Mirror Bias SS SS Standard p-channel ascode Mirror Wide-Swin p-channel ascode Mirror urrent-mirror p-channel Bias to Eliminate MFB Only sinle-ended output available 3

4 Review from last lecture: Telescopic ascode Op mp Sinal Swin and Power Supply imitations There are a minimum of 2 DST drops between OUT and DD and a minimum of 3 DST drops between OUT and SS Thus, there are a minimum of 5 DST drops between DD and SS This establishes a lower bound on DD - SS and it will be reduced by the p-p sinal swin on the output 4

5 Telescopic ascode Op mp - OUT + OUT - OUT + OUT n-channel inputs p-channel inputs 5

6 re there other hih output impedance circuits that can be used as quarter circuits? I recall the reulated cascode circuits have this property 6

7 Hih output impedance quarter-circuits Quarter ircuit Reulated ascode mplifier or Gain Boosted ascode ( is usually a simple amplifier, often the reference op amp with + terminal connected to the desired quiescent voltae) 7

8 Review from last lecture: Gain-Boosted Telescopic ascode Op mp DD IN B M 5 M 6 M B2 B3 M 8 M 3 2 M 4 M M 2 IN OU T o o o3 3 o7 o5 m7 GB 2 B5 M S S I T This is modestly less efficient at eneratin GB because now power is consumed in both the cascode devices and the boostin amplifier 8

9 Review from last lecture: Gain-Boosted Telescopic ascode Op mp Sinal Swin and Power Supply imitations DD M 5 M 6 DST minimum of 5 DST drops between DD and SS M M 8 DST B2 B3 M 3 2 M 4 DST OUT This establishes a lower bound on DD - SS and it will be reduced by the p-p sinal swin on the output IN DST M M 2 IN I T B5 M DST S S 9

10 Review from last lecture: Gain-Boosted Telescopic ascode Op mp (with or w/o current mirror counterpart circuits) dvantaes: DD Sinificant increase in dc ain M 5 M 6 IN M S S B2 B3 M 3 2 M 4 M M 2 I T B5 M M 8 IN OU T imitations: : Sinal swin (4D ST + T between DD and SS ) Reduction in GB power efficiency - some current required to bias amplifiers -additional pole in amplifier -may add requirements for some compensation rea Overhead for 4 transistors and 4 amplifiers -actually minor concern since performance will usually justify these resources 0

11 aboratory Support Offset oltae Systematic Offset oltae Random Offset oltae

12 aboratory Support Offset oltae Systematic Offset oltae Random Offset oltae OUT IQ Definition: The output offset voltae is the difference between the desired output and the actual output when id 0 and ic is the quiescent commonmode input voltae. OUTOFF OUT - OUTDES Note: OUTOFF is dependent upon IQ althouh this dependence is usually quite weak and often not specified 2

13 aboratory Support Definition: The input-referred offset voltae is the differential dc input voltae that must be applied to obtain the desired output when ic is the quiescent common-mode input voltae. Note: OFF is usually related to the output offset voltae by the expression OUTOFF OFF Note: OFF is dependent upon IQ althouh this dependence is usually quite weak and often not specified 3

14 aboratory Support OFF DD OUT DD When differential input op amps are biased with symmetric supply voltaes, it is enerally assumed that the desired quiescent input voltae Is 0 and the desired quiescent output voltae is 0 so OFF is the differential Input voltae needed to make OUT 0. The input offset voltae is comprised of two parts, a systematic component and a random component OFF OFFSYS+OSR 4

15 aboratory Support OFF DD OUT DD OFF OFFSYS+OSR fter fabrication there is no distinction made between OFFSYS and OSR and simply OFF is of concern OSR is determined entirely by random variations in component values from Their ideal value and will only be seen in a simulation if deviations are intentionally introduced (Monte arlo nalysis if often used for predictin OSR ) It is expected that OFFSYS should be small (much smaller than OSR) and it is the desiner s responsibility to make this small 5

16 aboratory Support OFF DD OUT DD OFF OFFSYS+OSR It is not necessary to make OFFSYS 0 althouh this can and is often done by makin a minor tweak of matchin critical parameters after the desin of the op amp is almost complete OFFSYS can also be set to 0 by usin a deree of freedom of the amplifier desin variables but this is enerally an unwise use of derees of freedom (althouh some textbooks includin Martin and Johns in Sec 5. do this!) 6

17 aboratory Support (If no missmatch is introduced, will be seein only effects of systematic offset) By symmetry, to force OUT 0, it is necessary to have D3 0 Makin D3 0 sets EB3 DD + Tp and results in the use of one deree of freedom! Makin EB3 so lare will severely limit the voltae swin at OUT This shows why it is not wise to use a deree of freedom to make the 7 systematic offset voltae 0

18 aboratory Support DD M 3 M 4 OUT M M 2 OS B2 M 9 - DD an sweep a voltae in simulator at ate of M to make OUT 0 This is the systematic offset voltae an simply add the systematic offset voltae to input throuhout rest of the desin phase and then remove after desin is complete or tweak at end of desin to eliminate systematic offset. 8

19 aboratory Support Usually OFF will chane if chanes in any desin variables are made so re-simulation will be needed to et the correct value of OFF If OFF is not included, ac simulation of open-loop amplifier will usually not ive desired results because small-sinal models will be developed in simulator at incorrect operatin point (often even in incorrect reion of operation) lternative is to do ac simulations by embeddin op amp into a FB confiuration that will inherently compensate for offset voltae but issue of compensation must be addressed for amplifiers with two or more poles 9

20 re there other useful hih output impedance circuits that can be used for the quarter circuit? d 2 O BW GB G 2 G G 2 ( + G ) M G + G M

21 What circuit is this? I B OUT BB M 3 M IN SS ascode mplifier Often termed a Folded ascode mplifier Same small-sinal performance as other But a biasin problem!! ascode mplifier 2

22 What circuit is this? B OUT I B2 OUT DD BB 3 B M 3 I B IN M IN SS SS Folded ascode mplifier Biased Folded ascode 22

23 What circuit is this? B2 OUT DD B 3 B IN SS Biased Folded ascode Implementation of Biased Folded ascode 23

24 Biased Folded ascode Quarter ircuit OUT IN s + o3 ( + ) o o5 0 ( ) o + o5 o3 GB 24

25 Basic mplifier Structure omparisons ommon Source ascode Reulated ascode Folded ascode Small Sinal Parameter Domain O O O O O O m O o3 o3 ( O + O5) o3 GB m GB GB GB 25

26 Basic mplifier Structure omparisons Practical Parameter Domain ommon Source ascode Reulated ascode Θpct power in O O O 4 λ λ 4 λ λ λ EB EB EB EB3 EB3 GB GB 2P DD DD 2P EB EB ( ) 2P - θ GB DD EB Folded ascode Θfraction of current of M 5 that is in M O 4θ ( θλ + ) λ5 λ3ebeb3 GB 2P DD θ EB 26

27 Biased ascode mplifier 2 B2 4 6 B4 SS Quarter ircuit ounterpart ircuit 27

28 Folded ascode mplifier QURTER IRUIT Op mp 28

29 Folded ascode mplifier (redrawn) These transistors pair-wise form a current source and one in each pair can be removed 29

30 Folded ascode Op mp Needs MFB ircuit for B4 Either sinle-ended or differential outputs an connect counterpart as current mirror to eliminate MFB Foldin caused modest deterioration of 0 and GB enery efficiency Modest improvement in output swin 30

31 Folded ascode Op mp (Sinle-ended Output) ( s) meq s + 0 GB meq OEQ meq + OEQ O O5 OEQ O3 ( + ) ( ) meq O7 O9 m9 0 O3 ( + ) + ( ) O O5 O7 O9 m9 GB 3

32 Operational mplifier Structure omparison Small Sinal Parameter Domain Reference Op mp O 2 O + O3 GB 2 IT SR 2 Telescopic ascode o o o3 2 + o7 o5 m5 GB 2 IT SR 2 Reulated ascode o o o3 2 + o7 o9 m9 3 GB 2 IT SR 2 Folded ascode o ( + ) o o5 2 o3 + o7 o9 m9 GB 2 IT SR 2 32

33 Operational mplifier Structure omparison Reference Op mp Telescopic ascode Reulated ascode Θpct power in Folded ascode Θfraction of current of M 5 that is in M EB λ Practical Parameter Domain + λ 3 EB ( λ λ + λ λ ) 3 2 EB3 5 7 EB5 P GB 2 DD P GB 2 DD 2 0 P( - θ) λ λ3 EB3 λ5λ7 EB7 + GB EB 2DD 3 EB (( θλ + λ ) λ + ( θ) λ λ ) 5 3 2θ EB3 9 7 EB9 P GB 2DD EB EB θ EB EB SR SR 2 P 2 P DD DD ( θ) P - SR 2 SR θ P 2 DD DD 33

34 Folded ascode Op mp (Sinle-ended Output) 0 O3 ( + ) + ( ) O O5 GB O7 How many derees of freedom are there? What is a practical desin parameter set? DOF? 9 DOF {I T,W /,W 5 / 5,W 3 / 3,W 9 / 9,W 7 / 7, B, B2, B3 } O9 m9 Practical Desin Parameters {P,θ, EB, EB3, EB5, EB7, EB9, B2, B3 } where θi T /(I T +I T2 ) 34

35 o ( ) o Folded Gain-boosted ascode mplifier o3 GB 2 with ideal current source bias modest improvement in output swin 35

36 Folded Gain-boosted ascode mplifier OUT IN s + ( + ) o o5 o3 0 ( o + o5 ) o3 GB modest improvement in output swin 36

37 Basic mplifier Structure omparisons ommon Source ascode Reulated ascode Folded ascode Folded Reulated ascode Small Sinal Parameter Domain O O O O O O O m O o3 o3 ( O + O5) o3 ( + ) O O5 o3 GB m GB GB GB GB 37

38 Basic mplifier Structure omparisons ommon Source ascode Reulated ascode Θpct power in Folded ascode Θfraction of current of M 5 that is in M O O Practical Parameter Domain O O 4 λ λ 4 λ λ 3 2 λ 3 4θ EB EB EB EB3 EB3 ( θλ + ) λ5 λ3ebeb3 GB GB GB 2P DD 2P DD 2P DD EB EB ( ) 2P - θ GB DD θ EB EB Folded Reulated ascode Θ pct of total power in Θ 2 fraction of current of M 5 that is in M O 4θ ( θ + ) 2λ λ5 λ3ebeb3 2 GB 2P DD θ2 ( - θ ) EB 38

39 Folded Gain-boosted Telescopic ascode Op mp DD o ( + ) O O5 2 o3 3 + o7 o9 m9 B M 5 M 6 M M 4 B2 OU T B3 GB 2 I N I N M M 2 M7 M 9 2 M M 8 B4 0 IN I T I T2 S S S S Needs MFB ircuit for B4 Either sinle-ended or differential outputs an connect counterpart as current mirror to eliminate MFB Foldin caused modest deterioration in GB efficiency and ain Modest improvement in output swin 39

40 Operational mplifier Structure omparison Small Sinal Parameter Domain Reference Op mp O 2 O + O3 GB 2 IT SR 2 Telescopic ascode o o o3 2 + o7 o5 m5 GB 2 IT SR 2 Reulated ascode o o o3 2 + o7 o9 m9 3 GB 2 IT SR 2 Folded ascode o ( + ) o o5 2 o3 + o7 o9 m9 GB 2 IT SR 2 Folded Reulated ascode o ( + ) o o5 2 o3 3 + o7 o9 m9 9 GB 2 IT SR 2 40

41 Summary of Folded mplifier Performance + Modest improvement in output sinal swin (from 5 DS ST to 4 DS ST ) Deterioration in 0 (maybe 30% or more) Deterioration in GB power efficiency (can be sinificant) Minor increase in circuit size 4

42 End of ecture 8 42