ECEN474: (Analog) VLSI Circuit Design Fall 2012

Transcription

1 ECEN474: (Analo) VLSI Circuit Desin Fall 2012 Lecture 18: OTA Examples Sam Palermo Analo & Mixed-Sinal Center Texas A&M University

2 Announcements No class on Monday Preliminary report still due Monday (11/19) If you are doin anythin not on the list, ive me a brief description as soon as possible We will have class on Wednesday (11/21) Project Extra Credit Potential for 20% extra credit if you layout a key block Report on Dec. 4 doesn t have to have layout For extra credit, an updated report can be turned in durin the presentation time (Dec. 10) with layout results The post-layout performance is the only thin that will be considered relative to the oriinal report, i.e. no major circuit chanes from the oriinal report 2

3 Aenda Multi-OTA staes OTA-C filter w/ example 3

4 is required for Differential Structures Requirements: Fixes the OTA output (low offset) ==> Hih dc loop ain Reduction of common-mode noise==> Lare Bandwidth +icmfb +icmfb +icmfb GND GND VC 2 G m = m icmfb = cmfb(v01+v02-vref) R VC R G m = 1+ m m R GND - 4 -

5 Efficient for Differential Pair Based OTAs VDD VB1 VB2 A V - + VC VREF VSS Common-mode loop ain = A V Gm p R L 3 poles in the loop. Loop stability requires A V Gm p / C L < ω VC, ω VB1-5 -

6 Pseudo-Differential OTAs with Source Deeneration VDD VDD to next stae From to next stae From GND V 1 +v 1 V 2 +v 2 MC v 1 R1 R1 v 2 VSS Sensitive to supply noise and common-mode input sinals VSS Little sensitive to supply noise and Common-mode noise - 6 -

7 Efficient for Pseudo-Differential OTAs VDD GND R1 R1 common-mode detector VSS - 7 -

8 OTA based on complementary differential pairs M2 M4 VDD M4 V CP M2 v -v 0 -v 0 1 v 1 G Efficient OTA based on linear complementary differential pairs m = m1 R m1 M R m2 1 m2 M V CN C L C L Linear circuit due to source deeneration M3 and M4 M3 M3 Suitable for fast applications VSS - 8 -

9 Filter is based on Biquadratic Cells: Biquad Realization in Gm-C topoloy 2C1 2C2 v i+ v i- m1 m2 m1 v o+ v o- m1 2C1 2C2 f 0 (MHz) G m1 (ma/v) G m2 (ma/v) Biquad Biquad !!! Fast is required

10 Time Domain characterization of the v i+ v i- v o+ v o- i cm i cm Common-mode characterization usin common-mode current pulses One circuit per pole Pulse response of the Phase marin is better than 45 derees

11 OTA with Class AB Common-mode Feedback -v V REF 1 v 01 v 02 v 1 C E D A v 03 v 04 B Most important non-dominant pole at D Previous OTA Next OTA Common-mode sinal is detected at next stae Class AB error amplifier is used 5 non-dominant poles at A~E 2 LHP zeros at A and C (Helpful in BW extension)

12 Optimized Class AB Common-mode Feedback M6 V -v v 1 01 v REF 02 v 1 v 03 v 04 C M5 E' B A E M3 A' Previous OTA Next OTA Most important Class AB error amplifier is used non-dominant 4 non-dominant poles at A~E pole at B 2 LHP zeros at A and C (Helpful in BW extension) Node D was eliminated

13 Analysis of Class AB Common-mode Feedback can be simplified takin advantae of circuit s symmetry A V sc 1 + L m6 sc 1 + L m5 m5 B 03 L sc 1 + D m1 2 pole-zero pairs (A and C) are very close to each other More stable

14 Remarks DC operatin points for hih impedances are difficult to fix Fully differential amplifiers with hih output impedance nodes must use common-mode feedback circuits. Common mode circuits can fix the DC operatin points as well as minimize the common mode output components. Low voltae constraints impose optimal bias conditions at both the input and output ports of an amplifier. Common mode circuits for LV should be used both at the input and output

15 Next Time Analo Applications OTA-C Filters Variable-Gain Amplifiers Switch-Cap Filters, Broadband Amplifiers Output Staes Bandap Reference Circuits Distortion 15