Single-to-differential converter

Transcription

1 Single-to-differential converter 1. Continuous time S-2-D Classical solution With fully differential amplifier High linearity solution 2. Discrete time S-2-D Crossing the inputs Short circuiting the inputs

2 Single-to-differential converter 1. Continuous time S-2-D Classical solution

3 Classical solution

4 Single-to-differential converter 1. Continuous time S-2-D Classical solution With fully differential amplifier

5 With fully differential amplifier

6 Single-to-differential converter 1. Continuous time S-2-D Classical solution With fully differential amplifier High linearity solution

7 High linearity solution

8 High linearity solution In case of rail-to-rail input swing, complementary differential pairs can be used to enhance the linearity. Some techniques are also available to make the sum of the current in each pair constant. These techniques aim to have a constant GM despite using two differential pairs.

9 Rail-to-rail input stage Vdsat Vgsp Vcm - Vcm Vcm Vgsn Vdsat Vdd > 2Vgs2Vdsat

10 Rail-to-rail input stage Vdsat Vcm Vcm - Vgsp Vgsn Vcm Vcm Vdsat Vdd < 2Vgs2Vdsat

11 Gm variation I1 Gm - 2 NP pair 1 P pair N pair Input common mode Gm varies by a factor of two which leads to a bandwidth variation of 2. As a consequence, this dependency on the input common mode introduces some non linearities on the S2D converter.

12 Gm variation Weak inversion Strong inversion Gm I 1 Gm I 1 2 qi nkt I Gm ref 2 G ref Gm 2. K. γ. I I 1 Gm I 1 If I If I I Gm ref 2 2I and I I and I 2 2. K. γ. 2 I I 1 0 then Gm I then Gm equi 2 equi 2. K. γ. 2. K. γ.2 2I I By making the sum of the current constant, we obtain a constant Gm. When both differential pairs are conducting the same current I, the global transconductance is 40% higher than a transconductance done by a single pair consuming a current 2I.

13 Constant GM cell Vb In Ip - MOS in weak inversion or Bipolar > Gm variation 5% MOS in strong inversion > Gm variation 41% Johan H. Huijsing, Delft University of Technology, The Netherlands

14 Constant GM cell Vb1 - Vb2 MOS in weak inversion or Bipolar > Gm variation 1% MOS in strong inversion > Gm variation 15% Johan H. Huijsing, Delft University of Technology, The Netherlands

15 Single-to-differential converter 1. Continuous time S-2-D Classical solution With fully differential amplifier High linearity solution 2. Discrete time S-2-D Crossing the inputs

16 Crossing the inputs

17 Crossing the inputs

18 Crossing the inputs This techniques produces a gain of 2 by using a double sampling on the input signal. However, this comes at a price for the front end buffer in case of an adaptive sampling time. In this mode, sampling capacitor is connected to the buffer a certain amount of time usually many clock periods before being applied to the amplifier input during phase 2. Hence, this lets sufficient time for the buffer to charge the sampling capacitor. In case of double sampling, this technique can no longer be used.

19 Crossing the inputs Fully floating switched capacitor integrator

20 Crossing the inputs n n n n n n n n n n n Y Differential operation leads to: In z-transform domain: Thus: z z z Y z H z z z z z z Y 1 2 / 2 / 2 / T j T j T j T j e e e e p H ω ω ω ω

21 Crossing the inputs So : H ω 2cos ωt / 2 Where w2.pi.f and T1/Fck Thus: H ω π. f 2cos fck Which corresponds to a notch filter located at fck/2. Notice that this schematic often presented in IEEE papers suffers from a major problem since the input common mode voltage of the amplifier is not well defined.

22 Single-to-differential converter 1. Continuous time S-2-D Classical solution With fully differential amplifier High linearity solution 2. Discrete time S-2-D Crossing the inputs Short circuiting the inputs

23 Short circuiting the inputs

24 Short circuiting the inputs This techniques produces a unitary gain by using a flash sampling on the input signal. As a consequence, specification on the front end buffer can be relaxed. On the other hand, common mode becomes harder to stabilize since sampling capacitors are no longer connected to a low impedance node during phase 2 they behave as floating capacitors.