Differential Amplifier

Transcription

1 CHAPTE 4 ifferential Aplifier Analo IC Analysis and esin 4- Chih-Chen Hsieh

2 Outline. Sinle-Ended and ifferential Operation. Basic ifferential Pair 3. Coon-Mode esponse 4. ifferential Pair with MOS Loads 5. Gilbert Cell Analo IC Analysis and esin 4- Chih-Chen Hsieh

3 Sinle-Ended / ifferential Aplifiers A sinle-ended sinal is defined as one that is easured with respect to a fixed potential, usually GN. A differential sinal is defined as one that is easured between two nodes have equal and opposite sinal. Coon ode level : the center potential in difference sinalin. Sinle-ended sinal ifferential sinal Analo IC Analysis and esin 4- Chih-Chen Hsieh 3

4 Sinle-Ended v.s. ifferential Ap ifferential sinalin: hiher iunity to environental noise. Sinle-ended sinal ifferential Analo IC Analysis and esin 4- Chih-Chen Hsieh 4

5 Sinle-Ended v.s. ifferential Ap eduction of coupled noise by differential operation ifferential sinalin : increase the axiu achievable voltae swins. The peak to peak swin is equal to twice that of a sinle-ended sinal. Exaple : Sinle-ended sinal o sin t ifferential sinal o sin t sin t o o o sin t Analo IC Analysis and esin 4- Chih-Chen Hsieh 5

6 Outline. Sinle-Ended and ifferential Operation. Basic ifferential Pair 3. Coon-Mode esponse 4. ifferential Pair with MOS Loads 5. Gilbert Cell Analo IC Analysis and esin 4-6 Chih-Chen Hsieh

7 Basic ifferential Pair out out As the input CM level in,c chanes The variation of the leads to a chane in the sall-sinal ain Shift the output CM level fro its ideal value lowers the axiu allowable output swins. To ake the bias currents of the devices have inial dependence on the input CM level ifferential pair with a current source bias Analo IC Analysis and esin 4- Chih-Chen Hsieh 7

8 ifferential Ap Qualitative Analysis The axiu and iniu levels at the output are well defined. The sall-sinal ain is axiu for in = in. The circuit becoes ore nonlinear as the input swins increases. out out Analo IC Analysis and esin 4- Chih-Chen Hsieh 8

9 Input Coon-Mode ane The tail current source is to suppress the effect of input CM level variations. For proper operation, M, M and M3 should be operated in saturation reion. If in,cm rises further, then M and M will enter the triode reion. I GS GS 3 TH 3 in, CM in TH, out out out out Analo IC Analysis and esin 4- Chih-Chen Hsieh 9

10 A v vs. in.cm out out M 3 in triode All in saturation M,M in triode Analo IC Analysis and esin 4- Chih-Chen Hsieh 0

11 Input CM vs Output Swin The hiher the input CM level, the saller allowable output swin I if out I out I I out out in in GS GS I I I I I I I W W W W ncox ncox ncox ncox L L L L,, GS TH GS TH in in 4I W 4I nc W ox I W I I ncox in in in in, L ncox L W in L 4I nc ox L W ncox L Analo IC Analysis and esin 4- Chih-Chen Hsieh in in

12 Maxiu Input ane For Δ in = 0 G C W / L I, I G n ox out out in A C W / L I G v n ox G falls to zero for Δ in represents the axiu differential input that the circuit can handle. For a zero differential input, I I I in I / ncoxw / L in in / GS TH, C n I ox W L Analo IC Analysis and esin 4- Chih-Chen Hsieh

13 oltae Gain of ifferential Aplifier Method : By linear superposition out out out out out out Coon Source Source Follower in, in in in X Coon Gate Y X Y Analo IC Analysis and esin 4- Chih-Chen Hsieh 3

14 Node P is a virtual round Equivalent Half Circuit out out out out Analo IC Analysis and esin 4- Chih-Chen Hsieh 4

15 Equivalent Circuit Conversion of arbitrary inputs to differential and coon-ode coponents in in in in in Analo IC Analysis and esin 4- Chih-Chen Hsieh 5 in in in in in

16 Superposition of CM and M Sinal For differential ode operation X Y X Y r O r O in in r O in in in in For coon ode operation A v, CM out / / in, CM out out Analo IC Analysis and esin 4- Chih-Chen Hsieh 6

17 Analo IC Analysis and esin 4- Chih-Chen Hsieh Property of ifferential Structure Advantae eject coon ode noise, includin power supply noise. educe the even-order haronic distortion Increase output voltae swin isadvantae ouble the power consuption and circuitry. Need coon ode voltae stabilization x x y y Y x x x y x x x y

18 Outline. Sinle-Ended and ifferential Operation. Basic ifferential Pair 3. Coon-Mode esponse 4. ifferential Pair with MOS Loads 5. Gilbert Cell Analo IC Analysis and esin 4-8 Chih-Chen Hsieh

19 Coon Mode esponse In a syetric circuit, input CM variations disturb the bias points, alterin the sall sinal ain and possibly liit the output voltae swins. If the circuit is not syetric, input CM variations will lead to the variation of the differential output Coon ode to differential conversion. out out out out, X in, CM Y in, CM The coon-ode to differential conversion becoes sinificant at hih frequencies since is shunted by C. Analo IC Analysis and esin 4- Chih-Chen Hsieh 9

20 Analo IC Analysis and esin 4- Chih-Chen Hsieh ifferential Pair Sensin CM Input 0 CM in P P P CM in P CM in P CM in I I,,,,,,,,, M CM CM in Y X CM in P CM in Y CM in P CM in X A CM M A out out

21 Coon-Mode ejection atio The undesirable differential coponent produced by CM variations ust be noralized to the wanted differential output resultin fro aplification. The coon ode rejection ratio CM CM A A M CM M If only isatch is considered in = - in use p.3 ethod The CM can be derived as A M 4 CM 4, Analo IC Analysis and esin 4- Chih-Chen Hsieh

22 Outline. Sinle-Ended and ifferential Operation. Basic ifferential Pair 3. Coon-Mode esponse 4. ifferential Pair with MOS Loads 5. Gilbert Cell Analo IC Analysis and esin 4- Chih-Chen Hsieh

23 ifferential Pair with MOS Loads iode load Current source load A v N N P P r ON p r OP A r r n W / L W / L Output CM level = - GSP N P Analo IC Analysis and esin 4- Chih-Chen Hsieh 3 v N ON OP Output CM not well defined Need CM Feedback circuit

24 ifferential Pair with MOS Loads Addition of current sources to increase the voltae ain Cascode differential pair I IM 3, M 4 = 0., M, M decresed to be /5, Gain increased x5 3 4 A v 3rO 3rO 5rO 5r 7 O Analo IC Analysis and esin 4- Chih-Chen Hsieh 4

25 Outline. Sinle-Ended and ifferential Operation. Basic ifferential Pair 3. Coon-Mode esponse 4. ifferential Pair with MOS Loads 5. Gilbert Cell Analo IC Analysis and esin 4-5 Chih-Chen Hsieh

26 Gilbert Cell as a ariable Gain Ap The sall-sinal ain is a function of tail current The two transistors in a differential pair provide eans of steerin the tail current to one of two destinations, out out in in Analo IC Analysis and esin 4- Chih-Chen Hsieh 6 I I, I I out out 4 3 A A I I I I out out out in in 4 3

27 Gilbert Cell as a ariable Gain Ap An aplifier whose ain can continuously varied fro a neative value to a positive value A A I I I I out out out in in 4 3 Analo IC Analysis and esin 4- Chih-Chen Hsieh 7 Gilbert Cell - 968