4. Differential Amplifiers. Electronic Circuits. Prof. Dr. Qiuting Huang Integrated Systems Laboratory
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1 4. Differential Amplifiers Electronic Circuits Prof. Dr. Qiuting Huang Integrated Systems Laboratory
2 Differential Signaling Basics and Motivation Transmitting information with two complementary signals Information is only contained in the difference of the two signals, but they share the same average (DC) value Any pair of signals can be decomposed into a differential and a common-mode part: VV id = VV i+ VV i Differential component VV icm = VV i+ + VV i 2 Common-mode (DC component) 2
3 Motivation for Differential Signaling Most important property over single ended signals Higher immunity over environmental distortions Example: Signal corruption through capacitive coupling from clock signal crosstalk twisted pair Disturbance affects both signals and thus leave the differential component unaffected Applications: USB, Ethernet, PCI Express 3
4 Differential Amplifier First Try Straight forward intuitive way: two identical single transistor amplifiers 4
5 Differential Signal Amplification Two common emitter stages driven with a differential input signal VV id = VV i+ VV i The output differential voltage VV od = VV o+ VV o varies proportionally to the differential input signal VV id Differential Mode 5
6 Common-Mode Signal Amplification Two common emitter stages driven with a common-mode input signal VV i+ = VV i = VV icccc The single ended output voltages VV o+ = VV o = VV ocm are the same amplified outcome of the input signal VV icm Common Mode 6
7 DC Common Mode Levels VV AC VV DC tt VV o+ tt tt Different input DC levels result in different differential amplifications AC coupling with a capacitor blocks DC Common Mode (CM) signals, but not CM signals with varying amplitude 7
8 AC Common Mode Levels VV o+ VV AC VV CM tt tt tt Varying common mode levels are not eliminated by coupling capacitors The cost of coupling capacitors for low frequencies is high 8
9 AC Common Mode Levels Tail Current Source VV o+ VV AC VV CM tt tt tt Adding a tail current source II E solves the problem without the need of coupling capacitors In addition it enables DC coupling of stages 9
10 DC Coupling of Stages Single Ended Operation bias voltage Differential amplifier, driven by a single ended voltage VV i and a bias voltage VV ref VV ref can be chosen without changing the function of the differential amplifier Amplification of low frequency sensor signals, e.g. temperature, voice 10
11 Single Ended Driven Differential Amplifier Small signal analysis VV BE,2 KVL KCL vv i = VV BE,1 VV BE,2 VV BE,1 rr πππ + gg m1 VV BE,1 + gg m2 VV BE,2 + 1 rr πππ VV BE,2 = 0 VV BE,1 + VV BE,2 gg m + 1 rr ππ = 0 vv o+ = gg m1rr C1 vv i 2 vv o = gg m2rr C2 vv i 2 gg m1 = gg m2 = gg m, RR C1 = RR C2 = RR C rr πππ = rr πππ = rr ππ VV BE,1 + VV BE,2 = 0 vv i = 2VV BE,1 AA vd = vv od vv i = gg m RR C 11
12 Differential Signal Amplification The differential input signal is amplified as before: the output voltage VV od = VV o+ VV o varies proportionally to the differential input signal VV id Differential Mode 12
13 Common-Mode Signal Amplification Common Mode There is no common-mode signal amplification because II E, II C,1, II C,2 remain constant for a common-mode input voltage change II E splits into two equal currents II C,1 II C,2 and defines the emitter potential VV E against the common mode input voltage 13
14 Large Signal Qualitative Analysis Case 1: VV i = 0, VV i+ = hiiiii No current through right branch, all the current flows through left branch VV o+ = VV DD RR C II C,1 VV CC RR C II E Case 2: VV i = hiiiii, VV i+ = 0 No current through left branch, all the current flows through right branch VV o+ = VV CC Case 1 Case 2 Case 2 Case 1 14
15 Long Tail Differential Pair with Resistance RR E Real current sources have a finite resistance RR E Next step: Quantitative analysis for the differential and the common mode gain with the small signal equivalent circuit 15
16 Small Signal Differential Mode Analysis Small signal equivalent circuit Replacement of supply voltages by shorts, current sources by opens Replacement of transistors by their small signal equivalent model rr o of transistors is neglected for simplicity 16
17 Small Signal Analysis of Differential Gain Small signal equivalent circuit: cont d: vv E 1 RR E + 2 rr ππ + 2gg m = 0 KCL at emitter node: VV BE,1 rr ππ + gg m vv BE,1 + gg m vv BE,2 + VV BE,2 rr ππ gg m + 1 rr ππ vv BE,2 + vv BE,2 = vv E RR E KVL vv BE,1 = +vv i vv E vv BE,2 = vv i vv E = vv E RR E Only fulfilled if vv E = 0 The potential at emitter node remains constant at VV E vv E = 0 virtual ground e. g. vv o+ = gg m vv BE,1 RR C = gg m RR C vv i vv od = gg m vv id RR C AA vd = vv od vv id = gg m RR C 17
18 Differential Gain Half circuit concept The potential at emitter node remains constant at VV E Symmetry between left and right branch half circuit vv o = ii C RR C = gg m vv i RR C vv od = gg m vv id RR C virtual ground AA vd = vv od vv id = gg m RR C By looking at a single transistor stage we obtain the same result 18
19 Common Mode Gain Calculation cont d: ii B = vv i rr ππ + 2 ββ N + 1 RR E vv o = vv ocm = ββ N ii B RR C vv o = ββ N Assumptions: vv i rr ππ + 2 ββ N + 1 RR E RR C Both inputs see the same signal vv i = vv icm : ii B,1 = ii B,2 = ii B ββ N 1 and vv o = RR C 2RR E vv i ββ N RR E rr ππ KCL at emitter node: = ii B rr ππ + vv E AA vcm = vv o vv i = vv ocm vv icm = RR C 2RR E vv i = ii B rr ππ + 2 ββ N + 1 RR E 19
20 Common Mode Gain Half Circuit Concept Exploit the symmetry of the circuit No current flow between the two branches VV BE = VV T ln II C can be II S assumed constant: ii c vv i 2RR E vv o = RR C 2RR E vv i AA vcm = RR C 2RR E Same result as obtained from small signal equiv. ETH Integrated Systems Laboratory 20
21 Common Mode Rejection Ratio Indicates how strong a common mode signal is attenuated compared to a differential signal GG = AA vd AA vcm = gg mrr C RR C 2R E = 2gg m RR E Important attribute of differential amplifiers Usually expressed in db as Common Mode Rejection Ratio CMRR = GG db = 20 log 10 GG GG is increasing with RR E Increasing RR E is limited by technology 21
22 Limitations of Basic Differential Pair Input leakage current not tolerable for applications with highly sensitive input signals Use of CMOS transistors instead of BJT Common source differential pair AA vd = gg m RR L AA vd = gg m ( rr o ) = gg m rr o gg m RR L 22
23 Limitations of Basic Differential Pair Input leakage current not tolerable for applications with highly sensitive input signals Use of CMOS transistors instead of BJT Common source differential pair Gain of common-source amp is limited due to resistive load Current source instead of resistor load Gain is now much higher, only limited by rr o of CMOS AA vd = gg m RR L AA vd = gg m ( rr o ) = gg m rr o gg m RR L 23
24 MOS Transistor as Current Source Usage of a MOS transistor in saturation region II D = kk WW 2LL VV GS VV T 2 Real current source has an output resistance: rr o = 1 λλii D Small signal model: rr o II D II D II D VV GS cccccccccc VV GS VV DS 24
25 Differential Pair with CMOS Current Sources AA vd = gg m rr o2 rr o4 AA vcm = 0 Improved gain, but single-ended output is still halved Further improvements lead to a diff. amp. with: High input impedance Low output impedance High differential gain Diff. Amp. with the above attributes are called Operational Amplifiers 25
26 Ideal Operational Amplifier Output Voltage only depends on difference of input voltages No common-mode gain Infinitely high input impedance Infinitely low output impedance Infinite differential open loop gain Infinite bandwidth Infinite CMRR Symbol: Practical Op-Amps have: 10 7 to Ohms 1 to 100 Ohms 80 to 120 db 1 to 1000 MHz 70 to 120dB 26
27 Op-Amp Basic Circuits Voltage Comparator VV out = VV CC sign(vv in ) The high differential gain drives VV out to the supply voltage at small changes Voltage follower (Buffer) of VV in VV out = VV in 27
28 Op-Amp Basic Circuits Inverting amplifier VV out = RR 2 RR 1 VV in Non-inverting amplifier VV out = 1 + RR 2 RR 1 VV in 28
29 Op-Amp Basic Circuits Integrator VV out ss = V in ss ssssss VV out tt = V out 0 1 RC 0 tt VV in tt dττ VV in (tt) VV out (tt) tt tt Differentiator VV out ss = VV in (ss)rrrrrr VV out tt = RC d dtt VV in tt VV in (tt) VV out (tt) tt tt 29
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