AccuBridge TOWARDS THE DEVELOPMENT OF A DC CURRENT COMPARATOR RATIO STANDARD

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1 AccuBridge TOWARD THE DEVELOPMENT OF A DC CURRENT COMPARATOR RATO TANDARD Duane Brown,Andrew Wachowicz, Dr. hiping Huang 3 Measureents nternational, Prescott Canada duanebrown@intl.co, Measureents nternational, Prescott Canada ieng@intl.co, 3 Dr. hiping Huang ieng4@intl.co ABTRACT nherent ratio errors of 0. to 0.pp in the Direct Current Coparator (DCC) have hindered its developent as a standalone bridge. By iproving the technologies described in the paper, the reduction of the inherent ratio error of less than 0.0pp can be achieved. Verification of the ratio accuracy can now be perfored fro a ratio of 0.07: to 4: with a resolution of Autoatic balancing facilitates the operation of the bridge for ore accurate resistance easureents over the range of 0.Ω to 00kΩ. ey Words: Direct Current Coparator (DCC), ratio error, iproved partial turn technology, apere turns, and variable slave turns, turns calibration.. NTRODUCTON The DCC is an apere turn device consisting of the aster turns (Nx) and slave turn (Ns), shown in Figure. Peak Detector technology has been in service for 40 years, working at the 0. to 0. pp accuracy level for ratios of : to 0:. Accuracy in this technology was liited due to the loading effect of the partial turns on the current splitting resistor, the teperature coefficient of the wire used to construct the fractional turns and the noise level created by the odulation frequency which was fed through to the nanovolt detector. There was no real way of using the technology to verify the accuracy claied on the technology. Resolution was liited to 0.pp for : ratios, 0.0pp for 0: ratios and pp for 0. ratios. verification of the DCC could be perfored using the interchange technique for : ratios as in Equation, re ( R f ) / () R r re and R f and R r represented as the interchange error, forward ratio and reversed ratio respectively. However, for ratios of :0 (0. ratio), the interchange technique could not be used within the accuracy claied as the aster turns were reduced fro 0,000 to 00 turns, reducing the apere turn sensitivity of the easureent by 00 and increasing the interchange error fro 0. pp to pp. And due to the liited nuber of turns, flux distribution or flux leakage would not be as unifor for a 0. ratio as copared to a : or 0: ratio easureent. DCC N x N s Vs DCC Flux Detector PEA DETECTOR GAN CONTROL x Rx Rs MCU D/A RAMP V/ Nx Ns V/ RAMP D/A MCU NV Rx R s MATER LAVE Figure Conventional Bridge Block Diagra NanoVolt ensitivity x CAL s CAL Turns elf-cal The DCC, wound in decial forat, had, aster turns and a 000 turn slave winding where the aster turns include both real and partial turns. When the DCC is at balance, N N () A current source is used for supplying the aster current and a voltage source for the slave current. This Figure AccuBridge Block Diagra The AccuBridge technology shown in Figure uses a binary wound coparator for both variable aster and slave turns. An unloading circuit is used to unload the resistance of the partial turns fro the current splitting resistor. A new peak (flux) detector with increased sensitivity provides ore stable and increased gain by

2 reoving the odulation frequency fro the voltage detector for quieter easureents. Master and slave current tracking has a direct influence on the bridge accuracy by two types of the gain and hysteresis. Gain error is coing ostly fro the turn error. The turn s calibration for AccuBridge is used to diagnose the deviation of each winding and to provide a way for deterining the ratio correction. Hysteresis error is hard to nuerical estiation. t coes fro changes of the residual flux in the DCC shield, created during current transients (like preliinary easureents, turn changes under bias, or current reversals). t was easured to create interchange error in the range of 0.pp 0.4pp at both : and 0: ratios. The errors can be reduced down significantly by aking both tracking sources with the raping translation.. Unloading circuit for oitting the effects over the winding resistance of the DCC partial turns Unloading circuit is capable of keeping the split current flowing though the partial turn (PT) windings fro the variable resistances of the partial windings and relays. The principle is shown in Figure 4. The split current, spt becoes a constant current source controlled only by the aster current x with /8 scale, as given in Equation 3. A generic circuit to ipleent the precision splitting function has been build, shown in Figure 5 with a lower noise isolated power supply, to verify the unloading perforance and capability of the drive. x spt (3) 8 x R 30? spt PT The self-calibrating and linear-raping current sources are used to switch the current on both the aster and slave and to deagnetize the cores during current reversal. The slave current source is a irror of the aster current source and is integrated with a feedback path fro the flux detector. The AC response path has been eliinated decreasing the alternating coponents at the output of the peak detector to lower the overall noise level present in the coparator and voltage detector. The nanovolt sensitivity feature deterines an accurate overall gain for easuring the differential input to the nanovolt detector (board), related to the equivalent turn s changes.. DEGN TRATEGE x Figure 4 Unloading Diagra 30 spt N N RELAY + - +V -V DC OLATON. Raping sources for reducing interchange errors Both the aster and slave sources are controlled using 6-bit digital-to-analog converters with a specific integrated circuitry to perfor the required raping feature. The generic block diagra is given in Figure 3, where resistor, R, and capacitor, C are used to adjust the required raping tiing during the currents are reversed. The aster source has the capability of calibrating the current source to within 00pp. DA C R R 3 R R O P + O P - Figure 3 Raping ource Block Diagra C O UT Figure 5 General Block Circuitry.3 Turns calibration for the DCC s turn alignent Accuracy of the DCC bridge depends first of all on accuracy and stability of the DCC windings. There are two kinds of winding inaccuracy: uncorrected nuber of the turn on a section and an additional, parasitic agnetic coupling to the core, effect causing the equivalent nuber of turns not to be an integer. Missing or additional turn on a section is easily detectable and corrected during transforer anufacturing. Parasitic agnetic coupling is very sall, difficult to easure and was typically neglected. o the contributed error ay be in an order of 0-8 (0.0pp) or higher and could liit accuracy of the bridge. A self-calibration procedure, for obtaining the deviation

3 of the individual turns, adds the errors in the copensation procedure for the ratio corrections. The basic concept is to connect a set of windings in series, soe of the in forward or reverse direction, pass a test current and easure the resulting agnetic flux in the DCC. When the nubers of turns in the forward and reverse directions are exactly equal, the resulting flux should be zero. Otherwise, the non-zero reading is the error of the winding. The process starts fro using a reference winding 048 turns ( ), which is copared to others in the sae nuber but in the opposite direction. Then the process is carried out step by step, including the slave turns, down to real turn ( 0) and end in the partial turns. The process is able to easure the errors of each winding, and described in details below, Let the real nuber of turns of each winding be represented as: N + (4) N the th ideal nuber of turns; the th turns error; Each calibration step copares nuber of turns: ( ) ( )... E (5) k easureent result expressed in nuber of turns. N E an extra one turn for calibration test Flux detector is calibrated in apere-turns. Measureent result has to be noralized to take into account test current and nuber of turns FD (6) FD Flux detector reading in apere-turns [AT]; Test Current; By definition, the ideal turns would copensate and produce output equal to zero, therefore (5) becoes: ( ) ( )... E (7) k Assue the calibration process using winding 048 turns ( ) as a reference, the set of the equations (at, 0 0) is given in Equation (8), derived by Equation (7). P (8) ( P ) E (..., 0) By definition, winding 048 turns is used as a reference, given by (9) Fro Equation (8), two equations for 048 () and 04 (0) turns can be obtained by N E (0) N E () ubtract Equation (0) to () with Equation (9); the error of the 04 turn can be derived by N04 () M 04 and 048 are easured and calculated fro Equation (6). For 5, and so on to, the turn s errors of the turns can be figured out by Equation 3. 9 (0 ) (9 ) ( ) N [ ( i ) + 048]/ i (0..., 0) (3) Here 0..., 0 is related to the 04, 5..., nuber of the turns. Also, the error of extra one turn can be derived by (4) N E The siilar procedure is able to calibrate the slave turns; by selecting the any sae nuber of the aster turns in the opposite turn starts..4 Nanovolt sensitivity detector for iproving ratio errors Nanovolt aplifier easures the residual voltage at the bridge. t is used to calculate the final resistor ratio, by interpolating between the direct current coparator steps. As partial turn step has an equivalent to about 7.6pp (04 turns) at : ratio,.5 pp (50 turns) at 0: ratio and 76pp at :0 ratio. Accuracy of the interpolation process depends on absolute accuracy of the easureent, which includes gain of the aplifier, accuracy of the current sources (Master and lave), as well as accuracy of the A/D converter. 0.% error of the gain of the aplifier gives 0.0pp error at : resistor ratio. t gives about 0.006pp at 0: ratio (50 turns) and 0.039pp at :0 ratio (04 turns). 0.% error of the Master current source, with the perfectly tracking lave, gives 0.0pp error at : resistor ratio, 0.006pp at 0: ratio (50 turns) and 0.pp at :0 ratio (04 turns). Absolute accuracy of the A/D converter depends first of all on the accuracy of the reference source. 3

4 The absolute accuracy of ADC with ± (V) at.5v output will give an error of δ± /,500(%). t gives axiu error of δ(pp) at : ratio, 0. δ(pp) at 0: and 0 δ(pp) pp at :0 ratio. Teperature coefficient of the A/D converter reference is 30pp/ o C. Error resulting for 0 o C operating teperature change at : ratio is 0.003pp. ensitivity (gain) of the nanovolt detector is easured autoatically and finely to iprove the ratio correction. The process is perfored autoatically by toggling an extra /8 turn () to deterine the overall gain of the nanovolt detector in the different ranges. The expected voltage is forularized in Equation 5. The DC offset has been reoved in the equation by reversing the current. V R R (5) N N Analogue device (DAC) setting via the highprecious resistor sensors. Turns self-calibration to easure and store all of the inforation for each winding in the DCC for the ratio copensation in the firware, Nanovolt gain calibration and adjustent Hardware functionalities includes the raping sources for both aster and slave current, tuning the slave DC-offset and the unloading DCC s partial turns. The yste architecture is illustrated in Figure 6, as detailed fro Figure, in the flowchart for both software (firware) and hardware ipleent. oftware (Firware) yste nitialization Errors of DCC Turns Hardware Raping ource.5 Reoval of AC path decreasing odulation noise When a voltage source is adopted as the slave tracking signal, an AC path needs to use to provide a feedback loop through the DCC for a stability deand. n the AccuBridge, an AC path has been reoved fro the peak detector for eliinating the odulation frequency noise through the DCC. An optiized controlling process is used to adapt the initial transient stage..6 Variable slave turns for reducing the noise issue The lave turns can be autoatically selected over the ranges, increasing the apere turns and reducing the noise in the DCC. The : ratio easureent could be up to 048 turns, and the 5 turns are used for above 6.5: up to 4: ratio. Operating Paraeters tart Run Offset & Gain of ADC s nput Tune ource Currents (DAC) Rough Measureents Nanovolt & balance Measureents Adjust DC- Offset Aligned DCC Partial Turns Nano-gain Calibrated 3. YTEM DECTPTON yste architecture is coposed of the initialization, basic operating sequence and self-calibrations for the different purposes and characteristics of the operation, before the easureent is carried out. yste initialization including the icroprocessor configurations, /O settings selecting the operating ode, self-calibration for the devices on-chip, such as ADCs perfored to reove offset and gain errors in the input channels ; ADC devices calibration the overall errors of the ADC readings including ADC Calibration for the sources both aster current and slave current are tuned for each easureent by configuring Digital-to- 4 in turn Errors Copensation No. of eas? End Figure 6 yste Architecture Flowchart 4. UNCERTANTY Although the bridge has perfored well by using the several achieveents described above, still soe roos are left with the uncertainty field for the further investigations and developent. A contribution has be ade using the linear raping sources to eliinate the residual flux in the DCC

5 during the operation and resulted in lower interchange errors significantly. To eliinate the effects of the DCC hysteresis, an study is carrying out if the perforance gets better by using the nonlinear raping; The levels of the raping overshoot signal depend on the loads and the nuber of the DCC turns. The effects could be eliinated in the firware with the related hardware odification, but ay be ore coplicated; n the self-calibration, the 048 turn is used as the reference to be supposed to be of a lower uncertainty and higher accuracy of the easureent in the high nuber of the turn. The accuulated errors need to be evaluated for the coplete procedure with highest turn (048), or lowest turn () or iddle turn (5 slave) The sensitivity of the peak detector in DCC is one of the iportant paraeters for the stability, transient procedure and iniu setting tiing and so on. To deterine the proper and various value for the different loads and nuber of the turns ay be a challenge study. TET REULT Three prototypes have been built and tested for ratio error and standard deviation easureents using the interchange technique. A : ratio easureent is listed in Table. For 0: easureents, the AccoBridge principle was copared to a calibrated bridge, errors and standard deviation are shown in Table. Table 3 represented the results of the interchange errors and standard deviations at 0: and :0 ratios. Thirty-five (35) easureents are ade with the last twenty-five (5) statistics and a s setting tie. Table : nterchange Measureents Rx:Rs(oh) x(a) Measured Dev(pp) nter_error(pp) : : : k:k k:0k Table Measureents Rx:Rs (oh) x (A) Calibrated Measured Dev (pp) Erro (pp) 0: : k: k:k Table 3 0: nterchange Measureents Rx:Rs(oh) x(a) Measured Dev(pp nter_error(pp) 0: : : : : : : : k: :k k:k k:0k k:0k k:00k CONCLUON The accuracy of uncertainty of DCC has been iproved using AccuBridge technology which can be used as a DC tandard for resistance calibrations. Optiized calibrated raping current sources, an unloading structure on the partial turns and the self-calibrated alignent of the coparator have iproved the technology significantly. The standard deviation of the easureents was significantly reduced by reoving the odulation frequency fro the peak detector and increasing apere turns for :0 easureents. The technology is suitable for easuring : ratios with a ratio accuracy of 0.0pp and <0.0pp for 0: ratios and with slightly reduced accuracy at 0kΩ to 00kΩ. The noise level in all cases was less than the quoted standard deviation of <0.0pp, fro Ω to 0kΩ. The bridge has been in developent for about years for the easureent of decade resistors. t is easy to use the EEE488 interface aking it ideal for recording the easureents runs. However, further investigation is required to iprove the accuracy for the 0kΩ to 00kΩ ratio. The perforance of AccuBridge still needs to be verified against the CCC in the NRC National Laboratory. The uncertainty of the bridge will be investigated and reduced for the optiised operation in all of the ranges. REFERENCE MacMartin and N.L. usters, A direct-currentcoparator ratio bridge for four-terinal resistance easureents, EEE Trans. nstru. Meas., vol. M- 5, pp. -0, Deceber 966 MacMartin and N.L. usters, A direct current coparator bridge for high resistance easureents, EEE Trans. nstru, Meas., vol M-,pp , Deceber 973 5

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