Characteristic Symbol Value (1,2) Unit Thermal Resistance, Junction to Case Case Temperature 80 C, 20 W CW

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1 Technical Data Document Number: MRF5S9100 Rev. 4, 5/2006 Replaced by MRF5S9100NR1/NBR1. There are no form, fit or function changes with this part replacement. N suffix added to part number to indicate transition to lead-free terminations. RF Power Field Effect Transistors N-Channel Enhancement-Mode Lateral MOSFETs MRF5S9100MR1 MRF5S9100MBR1 Designed for broadband commercial and industrial applications with frequencies up to 1000 MHz. The high gain and broadband performance of these devices make them ideal for large-signal, common-source amplifier applications in 26 volt base station equipment. Typical Single-Carrier N-CDMA 880 MHz, V DD = 26 Volts, I DQ = 950 ma, P out = 20 Watts Avg., IS-95 CDMA (Pilot, Sync, Paging, Traffic Codes 8 Through 13) Channel Bandwidth = MHz. PAR = % Probability on CCDF. Power Gain 19.5 db Drain Efficiency 28% 750 khz Offset khz Bandwidth Capable of Handling 10:1 26 Vdc, 880 MHz, 100 Watts CW Output Power Characterized with Series Equivalent Large- Signal Impedance Parameters Internally Matched for Ease of Use Qualified Up to a Maximum of 32 V DD Operation Integrated ESD Protection 200 C Capable Plastic Package In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel. Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage V DSS - 0.5, +68 Vdc Gate-Source Voltage V GS - 0.5, +15 Vdc Total Device T C = 25 C Derate above 25 C 880 MHz, 20 W AVG., 26 V SINGLE N- CDMA LATERAL N- CHANNEL RF POWER MOSFETs CASE , STYLE 1 TO-270 WB-4 PLASTIC MRF5S9100MR1 P D CASE , STYLE 1 TO-272 WB-4 PLASTIC MRF5S9100MBR1 Storage Temperature Range T stg - 65 to +150 C Operating Junction Temperature T J 200 C W W/ C Table 2. Thermal Characteristics Characteristic Symbol Value (1,2) Unit Thermal Resistance, Junction to Case Case Temperature 80 C, 20 W CW R θjc 0.52 C/W 1. MTTF calculator available at Select Tools/Software/Application Software/Calculators to access the MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes - AN1955. NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed., Inc., All rights reserved. 1

2 Table 3. ESD Protection Characteristics Test Conditions Class Human Body Model (per JESD22-A114) 1C (Minimum) Machine Model (per EIA/JESD22-A115) A (Minimum) Charge Device Model (per JESD22-C101) IV (Minimum) Table 4. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit Per JESD 22-A113, IPC/JEDEC J-STD C Table 5. Electrical Characteristics (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS = 68 Vdc, V GS = 0 Vdc) Zero Gate Voltage Drain Leakage Current (V DS = 26 Vdc, V GS = 0 Vdc) Gate-Source Leakage Current (V GS = 5 Vdc, V DS = 0 Vdc) On Characteristics Gate Threshold Voltage (V DS = 10 Vdc, I D = 400 μa) Gate Quiescent Voltage (V DS = 26 Vdc, I D = 950 madc) Drain-Source On-Voltage (V GS = 10 Vdc, I D = 2.0 Adc) Forward Transconductance (V DS = 10 Vdc, I D = 6 Adc) Dynamic Characteristics (1) Output Capacitance (V DS = 26 Vdc ± 30 1 MHz, V GS = 0 Vdc) Reverse Transfer Capacitance (V DS = 26 Vdc ± 30 1 MHz, V GS = 0 Vdc) I DSS 10 μadc I DSS 1 μadc I GSS 1 μadc V GS(th) Vdc V GS(Q) 3.7 Vdc V DS(on) Vdc g fs 7 S C oss 70 pf C rss 2.2 pf Functional Tests (In Freescale Test Fixture, 50 ohm system) V DD = 26 Vdc, I DQ = 950 ma, P out = 20 W Avg. N-CDMA, f = 880 MHz, Single-Carrier N-CDMA, MHz Channel Bandwidth Carrier. ACPR measured in 30 khz ±750 khz Offset. PAR = % Probability on CCDF Power Gain G ps db Drain Efficiency η D % Adjacent Channel Power Ratio ACPR dbc Input Return Loss IRL db 1. Part is internally input matched. 2

3 V BIAS + C22 + C21 + C20 C19 B1 C18 + C17 C16 C15 V SUPPLY + + C14 C13 L1 L2 RF INPUT Z1 C1 Z2 Z3 C2 Z4 C3 Z5 C4 Z6 C6 Z7 C5 Z8 DUT Z9 C8 Z10 C7 Z11 Z12 C10 C9 Z13 C11 Z14 C12 RF OUTPUT Z15 Z1, Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z6, Z x x Taper Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip PCB Arlon GX0300, 0.030, ε r = 2.55 Figure 1. MRF5S9100MR1(MBR1) Test Circuit Schematic Table 6. MRF5S9100MR1(MBR1) Test Circuit Component Designations and Values Part Description Part Number Manufacturer B1 Ferrite Bead, Surface Mount Fair-Rite C1, C12, C18 18 pf Chip Capacitors 100B180JP 500X ATC C pf Variable Capacitor, Gigatrim 27271SL Johanson Dielectrics C3, C pf Variable Capacitors, Gigatrim 27291SL Johanson Dielectrics C4 6.2 pf Chip Capacitor 100B6R2JP 500X ATC C5, C6 12 pf Chip Capacitors 100B120JP 500X ATC C7, C8 11 pf Chip Capacitors 100B110JP 500X ATC C9, C pf Chip Capacitors 100B5R1JP 500X ATC C F, 63 V Electrolytic Capacitor NACZF471M63V Nippon C14, C15 22 F, 50 V Tantalum Capacitors T491X226K035AS Kemet C16, C17, C F, 50 V Chip Capacitors C1825C564J5GAC Kemet C20, C21 47 F, 16 V Tantalum Capacitors T491D4T6K016AS Kemet C F, 50 V Electrolytic Capacitor 515D107M050BB6A Multicomp L nh Inductor CoilCraft L2 22 nh Inductor B07T-5 CoilCraft 3

4 C21 C20 C15 C14 V GG C22 C19 C16 C13 V DD C1 C2 C3 C4 B1 C18 L1 C6 C5 WB1 CUT OUT AREA Figure 2. MRF5S9100MR1(MBR1) Test Circuit Component Layout WB2 C8 C7 L2 C17 C10 C9 C11 MRF9100M Rev 2 Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have no impact on form, fit or function of the current product. C12 4

5 TYPICAL CHARACTERISTICS G ps, POWER GAIN (db) G ps, POWER GAIN (db) G ps, POWER GAIN (db) G ps η D V DD = 26 Vdc, P out = 20 W (Avg.), I DQ = 950 ma 20 N CDMA IS 95 (Pilot, Sync, Paging, Traffic 14 IRL Codes 8 through 13) ACPR ALT f, FREQUENCY (MHz) Figure 3. IS-95 Broadband P out = 20 Watts Avg G ps η D V DD = 26 Vdc, P out = 2 W (Avg.), I DQ = 950 ma 4 N CDMA IS 95 (Pilot, Sync, Paging, Traffic 14 Codes 8 through 13) 40 IRL ACPR η D, DRAIN EFFICIENCY (%) ALT f, FREQUENCY (MHz) Figure 4. IS-95 Broadband P out = 2 Watts Avg I DQ = 1425 ma ma ma 1425 ma 35 I DQ = 475 ma ma ma ma ma 700 ma V DD = 26 Vdc, f1 = 880 MHz, f2 = MHz V DD = 26 Vdc, f1 = 880 MHz, f2 = MHz 65 Two Tone Measurements, 100 khz Tone Spacing Two Tone Measurements, 100 khz Tone Spacing P out, OUTPUT POWER (WATTS) PEP P out, OUTPUT POWER (WATTS) PEP Figure 5. Two- Tone Power Gain versus Output Power IMD, THIRD ORDER INTERMODULATION DISTORTION (dbc) ACPR (dbc), ALT (dbc) η D, DRAIN EFFICIENCY (%) ACPR (dbc), ALT (dbc) INPUT RETURN LOSS (db) IRL, INPUT RETURN LOSS (db) IRL, Figure 6. Third Order Intermodulation Distortion versus Output Power 5

6 TYPICAL CHARACTERISTICS INTERMODULATION DISTORTION (dbc) IMD, G ps, POWER GAIN (db) rd Order 5th Order 7th Order V DD = 26 Vdc, P out = 96 W (PEP), I DQ = 950 ma Two Tone Measurements, Center Frequency = 880 MHz 1 10 TWO TONE SPACING (MHz) Figure 7. Intermodulation Distortion Products versus Tone Spacing G ps, POWER GAIN (db) η D, DRAIN EFFICIENCY (%) V DD = 26 Vdc, I DQ = 950 ma, f = 880 MHz N CDMA IS 95 (Pilot, Sync, Paging, Traffic Codes 8 through 13) ACPR G ps η D ALT P out, OUTPUT POWER (WATTS) AVG. Figure 9. Single- Carrier N- CDMA ACPR, Power Gain, Efficiency and ALT1 versus Output Power I DQ = 950 ma f = 880 MHz MTTF FACTOR (HOURS x AMPS 2 ) 58 Ideal 57 P3dB = dbm (143 W) P1dB = dbm (117 W) Actual V DD = 26 Vdc, I DQ = 950 ma 49 Pulsed CW, 8 μsec(on), 1 msec(off) Center Frequency = 880 MHz P in, INPUT POWER (dbm) Figure 8. Pulse CW Output Power versus Input Power V 24 V V 32 V 17.5 V DD = 12 V P out, OUTPUT POWER (WATTS) CW T J, JUNCTION TEMPERATURE ( C) Figure 10. Power Gain versus Output Power This above graph displays calculated MTTF in hours x ampere 2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by I 2 D for MTTF in a particular application. P out, OUTPUT POWER (dbm) ACPR, ADJACENT CHANNEL POWER RATIO (dbc) ALT1, CHANNEL POWER (dbm) Figure 11. MTTF Factor versus Junction Temperature

7 f = 895 MHz f = 865 MHz Z load f = 895 MHz f = 865 MHz Z source Z o = 5 Ω f MHz V DD = 26 Vdc, I DQ = 950 ma, P out = 20 W Avg. Z source Ω j j j1.7 Z load Ω j j j0.5 Z source = Test circuit impedance as measured from gate to ground. Z load = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 12. Series Equivalent Source and Load Impedance 7

8 PACKAGE DIMENSIONS B E1 2X E3 A GATE LEAD DRAIN LEAD D1 D 4X e aaa 4X b1 M C A A2 NOTE 7 A1 2X D2 c1 D3 H 4 3 DATUM PLANE F ZONE J 2X E 2X E2 E5 E4 E5 BOTTOM VIEW C SEATING PLANE PIN 5 A NOTE CASE ISSUE C TO-270 WB-4 PLASTIC MRF5S9100MR1 NOTES: 1. CONTROLLING DIMENSION: INCH. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M DATUM PLANE H IS LOCATED AT THE TOP OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE TOP OF THE PARTING LINE. 4. DIMENSIONS D" AND E1" DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS.006 PER SIDE. DIMENSIONS D" AND E1" DO INCLUDE MOLD MISMATCH AND ARE DETER MINED AT DATUM PLANE H. 5. DIMENSION b1" DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.005 TOTAL IN EXCESS OF THE b1" DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS A AND B TO BE DETERMINED AT DATUM PLANE H. 7. DIMENSION A2 APPLIES WITHIN ZONE J" ONLY. 8. HATCHING REPRESENTS THE EXPOSED AREA OF THE HEAT SLUG. INCHES MILLIMETERS DIM MIN MAX MIN MAX A A A D D D D E E E E E E F.025 BSC 0.64 BSC b c e.106 BSC 2.69 BSC aaa STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. GATE 5. SOURCE 8

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12 How to Reach Us: Home Page: USA/Europe or Locations Not Listed: Technical Information Center, CH N. Alma School Road Chandler, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) support@freescale.com Japan: Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong support.asia@freescale.com For Literature Requests Only: Literature Distribution Center P.O. Box 5405 Denver, Colorado or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. reserves the right to make changes without further notice to any products herein. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. does not convey any license under its patent rights nor the rights of others. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death may occur. Should Buyer purchase or use products for any such unintended or unauthorized application, Buyer shall indemnify and hold and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of, Inc. All other product or service names are the property of their respective owners., Inc All rights reserved. Document Number: MRF5S Rev. 4, 5/2006 RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-rohs-compliant and/or non-pb-free counterparts. For further information, see or contact your Freescale sales representative. For information on Freescale s Environmental Products program, go to