RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs

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1 Technical Data RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs RF power transistors designed for CW and pulse applications operating at 1300 MHz. These devices are suitable for use in defense and commercial CW and pulse applications, such as DME/IFF systems. Typical Pulse Performance: V DD =50Vdc,I DQ = 100 ma Signal Type Pulse (0 sec, 10% Duty Cycle) P out (W) f (MHz) G ps (db) D (%) IRL (db) 250 Peak Document Number: MMRF1005H Rev. 1, 4/15 MMRF1005HR5 MMRF1005HSR MHz, 250 W, 50 V LATERAL N -CHANNEL RF POWER MOSFETs Typical CW Performance: V DD =50Vdc,I DQ =10mA,T C =61 C Signal Type P out (W) f (MHz) G ps (db) D (%) IRL (db) CW 230 CW Capable of Handling a Load Mismatch of 10:1 50 Vdc, 1300 MHz at all Phase Angles, 250 W Pulse Peak Power, 10% Duty Cycle, 0 sec Features Characterized with series equivalent large--signal impedance parameters Internally matched for ease of use Qualified up to a maximum of 50 V DD operation Characterized from to 50 V for extended power range Integrated ESD protection Greater negative gate--source voltage range for improved Class C operation In tape and reel. R5 suffix = 50 units, 56 mm tape width, 13--inch reel. NI -780H -2L MMRF1005HR5 NI -780S -2L MMRF1005HSR5 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS --0.5, 1 Vdc Gate--Source Voltage V GS --6.0, 10 Vdc Storage Temperature Range T stg to 150 C Case Operating Temperature T C 150 C Operating Junction Temperature (1) T J 225 C Total Device T C =25 C Derate above 25 C Table 2. Thermal Characteristics P D W W/ C Characteristic Symbol Value (2) Unit Thermal Resistance, Junction to Case Pulse: Case Temperature 65 C, 250 W Peak, 0 sec Pulse Width, 10% Duty Cycle, 50 Vdc, I DQ = 100 ma, 1300 MHz CW: Case Temperature 77 C, 235 W CW, 50 Vdc, I DQ = 10 ma, 1300 MHz Z JC 0.07 R JC Continuous use at maximum temperature will affect MTTF. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to and search for AN1955. C/W, Inc., 13, 15. All rights reserved. 1

2 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 2 Machine Model (per EIA/JESD22--A115) B Charge Device Model (per JESD22--C101) IV Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) Drain--Source Breakdown Voltage (V GS =0Vdc,I D =50mA) Zero Gate Voltage Drain Leakage Current (V DS =50Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =90Vdc,V GS =0Vdc) On Characteristics Gate Threshold Voltage (V DS =10Vdc,I D = 640 Adc) Gate Quiescent Voltage (V DD =50Vdc,I D = 100 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =10Vdc,I D =1.58Adc) Dynamic Characteristics (1) Reverse Transfer Capacitance (V DS =50Vdc 30 1 MHz, V GS =0Vdc) Output Capacitance (V DS =50Vdc 30 1 MHz, V GS =0Vdc) Input Capacitance (V DS =50Vdc,V GS =0Vdc 30 1 MHz) I GSS 1 Adc V (BR)DSS 1 Vdc I DSS 10 Adc I DSS Adc V GS(th) Vdc V GS(Q) Vdc V DS(on) Vdc C rss 1.2 pf C oss 58 pf C iss 340 pf Functional Tests (In Freescale Test Fixture, 50 ohm system) V DD =50Vdc,I DQ = 100 ma, P out = 250 W Peak (25 W Avg.), f = 1300 MHz Pulse, 0 sec Pulse Width, 10% Duty Cycle Power Gain G ps db Drain Efficiency D % Input Return Loss IRL db Typical CW Performance (In Freescale CW Application Circuit, 50 ohm system) V DD =50Vdc,I DQ =10mA,P out = 230 W CW, f = 1300 MHz, T C =61 C Power Gain G ps.0 db Drain Efficiency D 53.0 % Input Return Loss IRL db Load Mismatch (In Freescale Application Test Fixture, 50 ohm system) V DD =50Vdc,I DQ = 100 ma, P out = 250 W Peak (25 W Avg.), f = 1300 MHz, Pulse, 0 sec Pulse Width, 10% Duty Cycle VSWR 10:1 at all Phase Angles No Degradation in Output Power 1. Part internally input matched. 2

3 V BIAS C1 R1 Z10 Z19 C2 C3 C4 Z18 C7 C8 C9 C10 C11 C12 V SUPPLY RF INPUT Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z9 Z8 Z11 Z12 Z13 Z14 Z15 Z16 C6 Z17 RF OUTPUT C5 DUT Z Z21 C18 C17 C16 C15 C14 C13 V SUPPLY Z x Microstrip Z x Microstrip Z3 0.1 x Microstrip Z x Microstrip Z x Microstrip Z6 0.3 x Microstrip Z x Microstrip Z x Microstrip Z9* x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x0.111 Microstrip Z x Microstrip Z18, Z x Microstrip Z19*, Z21* x Microstrip *Line length includes microstrip bends. Figure 1. MMRF1005HR5(HSR5) Test Circuit Schematic 1300 MHz, Pulse Table 5. MMRF1005HR5(HSR5) Test Circuit Component Designations and Values 1300 MHz, Pulse Part Description Part Number Manufacturer C1, C2 22 F, 35 V Tantalum Capacitors T491X226K035AT Kemet C3,C11,C F, 50 V Chip Capacitors CDR33BX104AKWS AVX C4, C6, C7, C pf Chip Capacitors ATC800B101JT500XT ATC C5 4.7 pf Chip Capacitor ATC100B4R7CT500XT ATC C8, C pf Chip Capacitors ATC100B102JT50XT ATC C9, C pf Chip Capacitors ATC700B102FT50XT ATC C10, C15 10K pf Chip Capacitors ATC0B103KT50XT ATC C12, C F, 63 V Electrolytic Capacitors MCGPR63V477M13X26--RH Multicomp R1 15, 1/4 W Chip Resistor CRCW1615R0FKEA Vishay PCB Rogers RO4350B, 0.030, r =3.66 MTL 3

4 C3 C4 C7 C9 C11 C1 C2 R1 C8 C10 C12 C5 CUT OUT AREA C6 C18 C17 C15 C13 C16 C14 Figure 2. MMRF1005HR5(HSR5) Test Circuit Component Layout 1300 MHz, Pulse 4

5 TYPICAL CHARACTERISTICS PULSE C, CAPACITANCE (pf) C iss C oss C rss Measured with 30 1 MHz V GS =0Vdc P out, OUTPUT POWER (dbm) PULSED V DD =50Vdc,I DQ = 100 ma, f = 1300 MHz Pulse Width = 0 sec, Duty Cycle = 10% P1dB = 54.7 dbm (293 W) P2dB = 55.1 dbm (326 W) P3dB = 55.4 dbm (345 W) Ideal Actual V DS, DRAIN--SOURCE VOLTAGE (VOLTS) P in, INPUT POWER (dbm) PEAK Figure 3. Capacitance versus Drain -Source Voltage Figure 4. Output Power versus Input Power V DD =50Vdc,I DQ = 100 ma, f = 1300 MHz Pulse Width = 0, sec Duty Cycle = 10% G ps, POWER GAIN (db) G ps 10 D D, DRAIN EFFICIENCY (%) G ps, POWER GAIN (db) V 25 V 30 V 35 V 40 V 45 V V DD =50V I DQ = 100 ma, f = 1300 MHz Pulse Width = 0 sec Duty Cycle = 10% P out, OUTPUT POWER (WATTS) PEAK P out, OUTPUT POWER (WATTS) PEAK Figure 5. Power Gain and Drain Efficiency versus Output Power Figure 6. Power Gain versus Output Power D, DRAIN EFFICIENCY (%) V 25 V 30 V 35 V 40 V 45 V P out, OUTPUT POWER (WATTS) PEAK V DD =50V I DQ = 100 ma, f = 1300 MHz Pulse Width = 0 sec Duty Cycle = 10% G ps, POWER GAIN (db) V DD =50Vdc I DQ = 100 ma f = 1300 MHz Pulse Width = 0 sec Duty Cycle = 10% T C =--30_C 25_C 85_C 10 G ps D _C P out, OUTPUT POWER (WATTS) PEAK 25_C --30_C D, DRAIN EFFICIENCY (%) Figure 7. Efficiency versus Output Power Figure 8. Power Gain and Drain Efficiency versus Output Power 5

6 TYPICAL CHARACTERISTICS CW G ps, POWER GAIN (db) I DQ = 700 ma 10 ma 300 ma D G ps V DD =50Vdc f = 1300 MHz T C =61 C (1) 10 ma P out, OUTPUT POWER (WATTS) CW 700 ma 300 ma 1. Data for graph was collected in a water--cooled test fixture. The water inlet temperature = 25 C. Figure 9. CW Power Gain and Drain Efficiency versus Output Power D, DRAIN EFFICIENCY (%) 10 9 MTTF (HOURS) V DD =50Vdc P out = 230 W CW D = 53% T J, JUNCTION TEMPERATURE ( C) MTTF calculator available at Figure 10. MTTF versus Junction Temperature CW 6

7 Z o =10 Z source Z load f = 1300 MHz f = 1300 MHz f MHz V DD =50Vdc,I DQ = 100 ma, P out = 250 W Peak Z source Z load j j1.48 Z source = Test circuit impedance as measured from gate to ground. Z load = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 11. Series Equivalent Source and Load Impedance Pulse 7

8 V BIAS C1 R1 Z10 Z19 C2 C3 C4 Z18 C8 C9 C10 C11 C12 C13 V SUPPLY RF INPUT Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z9 Z8 Z11 Z12 Z13 Z14 Z15 Z16 C7 C6 Z17 RF OUTPUT C5 DUT Z Z21 C19 C18 C17 C16 C15 C14 V SUPPLY Z x Microstrip Z x Microstrip Z3 0.1 x Microstrip Z x Microstrip Z x Microstrip Z6 0.3 x Microstrip Z x Microstrip Z x Microstrip Z9* x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x0.111 Microstrip Z x Microstrip Z18, Z x Microstrip Z19*, Z21* x Microstrip *Line length includes microstrip bends. Figure 12. MMRF1005HR5(HSR5) Application Circuit Schematic 1300 MHz, CW Table 6. MMRF1005HR5(HSR5) Application Circuit Component Designations and Values 1300 MHz, CW Part Description Part Number Manufacturer C1, C2 22 F, 35 V Tantalum Capacitors T491X226K035AT Kemet C3, C12, C F, 50 V Chip Capacitors CDR33BX104AKWS AVX C4, C6, C7, C8, C pf Chip Capacitors ATC800B101JT500XT ATC C5 4.7 pf Chip Capacitor ATC100B4R7CT500XT ATC C9, C pf Chip Capacitors ATC100B102JT50XT ATC C10, C pf Chip Capacitors ATC700B102FT50XT ATC C11, C16 10K pf Chip Capacitors ATC0B103KT50XT ATC C13, C F, 63 V Electrolytic Capacitors MCGPR63V477M13X26--RH Multicomp R1 15, 1/4 W Chip Resistor CRCW1615R0FKEA Vishay PCB Rogers RO4350B, 0.030, r =3.66 MTL 8

9 C3 C4 C8 C10 C12 C1 C2 R1 C9 C11 C13 C5 CUT OUT AREA C7 C6 C19 C18 C16 C14 C17 C15 Figure 13. MMRF1005HR5(HSR5) Application Circuit Component Layout 1300 MHz, CW 9

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14 PRODUCT DOCUMENTATION Refer to the following resources to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 0 Dec. 13 Initial Release of Data Sheet 1 Apr. 15 Tables 5 and 6, Test Circuit Component Designations and Values: updated PCB description to reflect most current board specifications from Rogers, pp. 3, 8 Added CW application circuit for 1300 MHz as follows: schematic, component designations and values, and component layout, pp

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