Test Methodology. Characteristic Symbol Min Typ Max Unit. V GS(th) Vdc. V GS(Q) Vdc. V DS(on)

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1 Freescale Semiconductor Technical Data RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs Designed for CDMA base station applications with frequencies from185 MHz to 1995 MHz. Can be used in Class AB and Class C for all typical cellular base station modulation formats. Typical Single--Carrier W--CDMA Performance: V DD =3Volts,I DQ = 13 ma, P out = 5 Watts Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal PAR = 9.9 Probability on CCDF. Frequency G ps η D (%) Output PAR ACPR (dbc) 193 MHz MHz MHz Capable of Handling 1:1 32 Vdc, 184 MHz, 268 Watts CW (1) Output Power (3 db Input Overdrive from Rated P out ) Typical P 1 db Compression Point 21 Watts CW 18 MHz Typical Single--Carrier W--CDMA Performance: V DD =3Volts,I DQ = 13 ma, P out = 5 Watts Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal PAR = 9.9 Probability on CCDF. Frequency G ps η D (%) Output PAR ACPR (dbc) 185 MHz MHz MHz Features Designed for Wide Instantaneous Bandwidth Applications Designed for Wideband Applications that Require 4 MHz Signal Bandwidth 1% PAR Tested for Guaranteed Output Power Capability Characterized with Series Equivalent Large--Signal Impedance Parameters and Common Source S--Parameters Internally Matched for Ease of Use Integrated ESD Protection Greater Negative Gate--Source Voltage Range for Improved Class C Operation Designed for Digital Predistortion Error Correction Systems Optimized for Doherty Applications In Tape and Reel. R3 Suffix = 25 Units per 56 mm, 13 inch Reel. For R5 Tape and Reel option, see p. 17. Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS --.5, +65 Vdc Gate--Source Voltage V GS --6., +1 Vdc Operating Voltage V DD 32, + Vdc Storage Temperature Range T stg --65 to +15 C Case Operating Temperature T C 125 C Operating Junction Temperature (2,3) T J 225 C CW T C =25 C Derate above 25 C Document Number: MRF8S1821WHS Rev., 4/212 MRF8S1821WHSR3 MRF8S1821WGHSR3 185 MHz MHz 5 W AVG., 3 V SINGLE W -CDMA LATERAL N -CHANNEL RF POWER MOSFETs NI -88XS -2 MRF8S1821WHSR3 NI -88XS -2 GULL MRF8S1821WGHSR3 RF in /V GS 2 1 (Top View) CW RF out /V DS Figure 1. Pin Connections 1. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. 2. Continuous use at maximum temperature will affect MTTF. 3. MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. W W/ C, 212. All rights reserved. 1

2 Table 2. Thermal Characteristics Characteristic Symbol Value (1,2) Unit Thermal Resistance, Junction to Case Case Temperature 81 C, 5 W CW, 3 Vdc, I DQ = 13 ma, 184 MHz Case Temperature 11 C, 21 W CW (3),3Vdc,I DQ = 13 ma, 184 MHz Table 3. ESD Protection Characteristics Test Methodology R θjc Human Body Model (per JESD22--A114) 2 Machine Model (per EIA/JESD22--A115) Charge Device Model (per JESD22--C11) Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Class B IV C/W Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS =65Vdc,V GS =Vdc) Zero Gate Voltage Drain Leakage Current (V DS =3Vdc,V GS =Vdc) Gate--Source Leakage Current (V GS =5Vdc,V DS =Vdc) On Characteristics Gate Threshold Voltage (V DS =1Vdc,I D = 36 μadc) Gate Quiescent Voltage (V DD =3Vdc,I D = 13 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =1Vdc,I D =3.6Adc) I DSS 1 μadc I DSS 5 μadc I GSS 1 μadc V GS(th) Vdc V GS(Q) Vdc V DS(on) Vdc Functional Tests (4,5) (In Freescale Test Fixture, 5 ohm system) V DD =3Vdc,I DQ = 13 ma, P out = 5 W Avg., f = 193 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 Probability on CCDF. ACPR measured in 3.84 MHz Channel ±5 MHzOffset. Power Gain G ps db Drain Efficiency η D % Output Peak--to--Average Probability on CCDF PAR db Adjacent Channel Power Ratio ACPR dbc Input Return Loss IRL db Typical Broadband Performance (In Freescale Test Fixture, 5 ohm system) V DD =3Vdc,I DQ = 13 ma, P out =5WAvg., Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 Probability on CCDF. ACPR measured in 3.84 MHz Channel ±5 MHz Offset. Frequency G ps η D (%) Output PAR ACPR (dbc) 193 MHz MHz MHz MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes -- AN Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. 4. Part internally matched both on input and output. 5. Measurement made with device in straight lead configuration before any lead forming operation is applied. (continued) IRL 2

3 Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Typical Performance (In Freescale Test Fixture, 5 ohm system) V DD =3Vdc,I DQ = 13 ma, 193 MHz MHz Bandwidth P 1 db Compression Point, CW P1dB 21 W IMD 8 W PEP, P out where IMD Third Order Intermodulation 3 dbc (Delta IMD Third Order Intermodulation between Upper and Lower Sidebands > 2 db) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) IMD sym 12 MHz VBW res 1 MHz Gain Flatness in 65 MHz P out =5WAvg. G F.14 db Gain Variation over Temperature (--3 C to+85 C) G.2 db/ C Output Power Variation over Temperature P1dB.8 db/ C (--3 C to+85 C) (1) Typical Broadband Performance 18 MHz (In Freescale 18 MHz Test Fixture, 5 ohm system) V DD =3Vdc,I DQ = 13 ma, P out = 5 W Avg., Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 Probability on CCDF. ACPR measured in 3.84 MHz Channel ±5 MHzOffset. Frequency G ps η D (%) Output PAR ACPR (dbc) 185 MHz MHz MHz Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. IRL 3

4 C22 C3 C7 C5 C11* C13* R1 C15* C16 C1 C9 C17 C2 C1 R2 CUT OUT AREA C2* C21* C18* C19* C12* C14* C6 C4 C8 MRF8S1821HS/B Rev. *C11, C12, C13, C14, C15, C18, C19, C2, and C21 are mounted vertically. Figure 2. MRF8S1821WHSR3(WGHSR3) Test Circuit Component Layout Table 5. MRF8S1821WHSR3(WGHSR3) Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2 2.2 μf Chip Capacitors C3225X7R2A225M TDK C3, C4, C5, C6, C7, C8 1 μf Chip Capacitors C575X7S2A16MT TDK C9, C1, C11, C12, C13, C pf Chip Capacitors ATC1B8R2BT5XT ATC C pf Chip Capacitor ATC1B1R3BT5XT ATC C16, C pf Chip Capacitors ATC1B1R8BT5XT ATC C17 2. pf Chip Capacitor ATC1B2RBT5XT ATC C18, C pf Chip Capacitors ATC1B3R9BT5XT ATC C2 1. pf Chip Capacitor ATC1B1RBT5XT ATC C22 47 μf, 63 V Electrolytic Capacitor B41858-C8477-M EPCOS R1, R2 1 Ω, 1/4 W Chip Resistors Phycomp PCB.2, ε r =3.5 RO435B Rogers 4

5 TYPICAL CHARACTERISTICS G ps, POWER GAIN η D V DD =3Vdc,P out =5W(Avg.),I DQ = 13 ma Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 Probability on CCDF PARC IRL ACPR f, FREQUENCY (MHz) Figure 3. Output Peak -to -Average Ratio Compression (PARC) Broadband P out = 5 Watts Avg. G ps η D, DRAIN EFFICIENCY (%) ACPR (dbc) IRL, INPUT RETURN LOSS PARC IMD, INTERMODULATION DISTORTION (dbc) IM5--U IM3--U IM3--L IM5--L IM7--L --5 IM7--U --6 V DD =3Vdc,P out = 8 W (PEP) I DQ = 13 ma Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 196 MHz TWO--TONE SPACING (MHz) Figure 4. Intermodulation Distortion Products versus Two -Tone Spacing 3 G ps, POWER GAIN OUTPUT COMPRESSION AT.1% PROBABILITY ON CCDF db = 25 W V DD =3Vdc,I DQ = 13 ma, f = 196 MHz Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 Probability on CCDF --2 db = 35 W G ps --3 db = 48 W ACPR η D PARC η D, DRAIN EFFICIENCY (%) ACPR (dbc) P out, OUTPUT POWER (WATTS) Figure 5. Output Peak -to -Average Ratio Compression (PARC) versus Output Power --5 5

6 TYPICAL CHARACTERISTICS G ps, POWER GAIN V DD =3Vdc,I DQ = 13 ma, Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth 1995 MHz Input Signal PAR = 9.9 Probability on CCDF 196 MHz 193 MHz η D 1995 MHz 193 MHz 193 MHz 196 MHz 196 MHz 1995 MHz ACPR G ps η D, DRAIN EFFICIENCY (%) ACPR (dbc) P out, OUTPUT POWER (WATTS) AVG. Figure 6. Single -Carrier W -CDMA Power Gain, Drain Efficiency and ACPR versus Output Power GAIN V DD =3Vdc P in =dbm I DQ = 13 ma IRL Gain f, FREQUENCY (MHz) Figure 7. Broadband Frequency Response IRL, INPUT RETURN LOSS W -CDMA TEST SIGNAL 1 1 PROBABILITY (%) Input Signal W--CDMA. ACPR Measured in 3.84 MHz Channel ±5 MHz Offset. Input Signal PAR = 9.9 Probability on CCDF PEAK--TO--AVERAGE Figure 8. CCDF W -CDMA IQ Magnitude Clipping, Single -Carrier Test Signal ACPR in 3.84 MHz Integrated BW 3.84 MHz Channel BW +ACPRin3.84MHz Integrated BW f, FREQUENCY (MHz) Figure 9. Single -Carrier W -CDMA Spectrum 6

7 V DD =3Vdc,I DQ = 13 ma, P out =5WAvg. f MHz Ω Ω j j j j j j j j j j j j j j j j j j2.69 = Test circuit impedance as measured from gate to ground. = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Figure 1. Series Equivalent Source and Load Impedance 7

8 f (MHz) (Ω) V DD =3Vdc,I DQ = 13 ma, Pulsed CW, 1 μsec(on), 1% Duty Cycle (1) (Ω) P1dB Max Output Power P3dB (dbm) (W) η D (%) (dbm) (W) η D (%) j j j j j j (1) Load impedance for optimum P1dB power. = Impedance as measured from gate contact to ground. = Impedance as measured from drain contact to ground. Input Load Pull Tuner Device Under Test Output Load Pull Tuner Figure 11. Load Pull Performance Maximum P1dB Tuning f (MHz) (Ω) V DD =3Vdc,I DQ = 13 ma, Pulsed CW, 1 μsec(on), 1% Duty Cycle (1) (Ω) P1dB Max Drain Efficiency P3dB (dbm) (W) η D (%) (dbm) (W) η D (%) j j j j j j (1) Load impedance for optimum P1dB efficiency. = Impedance as measured from gate contact to ground. = Impedance as measured from drain contact to ground. Input Load Pull Tuner Device Under Test Output Load Pull Tuner Figure 12. Load Pull Performance Maximum Drain Efficiency Tuning 8

9 C24 C3 C5 C7 C1 C9 C11* C13* R1 C15* C16 C1 C2 C17 C18 C19 R2 CUT OUT AREA C2* C21* C12* C14* C22 C23 C4 C6 C8 MRF8S1821HS/B Rev. *C11, C12, C13, C14, C15, C2, and C21 are mounted vertically. Figure 13. MRF8S1821WHSR3(WGHSR3) Test Circuit Component Layout 185 MHz MHz Table 6. MRF8S1821WHSR3(WGHSR3) Test Circuit Component Designations and Values 185 MHz MHz Part Description Part Number Manufacturer C1, C2 2.2 μf Chip Capacitors C3225X7R2A225M TDK C3, C4, C5, C6, C7, C8 1 μf Chip Capacitors C575X7S2A16MT TDK C9, C1, C11, C12, C13, C pf Chip Capacitors ATC1B8R2BT5XT ATC C15 1 pf Chip Capacitor ATC1B1RBT5XT ATC C16, C pf Chip Capacitors ATC1B2R2BT5XT ATC C18, C19, C22.8 pf Chip Capacitors ATC1BR8BT5XT ATC C2, C pf Chip Capacitors ATC1B3R9BT5XT ATC C pf Chip Capacitor ATC1B1R8BT5XT ATC C24 47 μf, 63 V Electrolytic Capacitor B41858-C8477-M EPCOS R1, R2 1 Ω, 1/4 W Chip Resistors Phycomp PCB.2, ε r =3.5 RO435B Rogers 9

10 TYPICAL CHARACTERISTICS 185 MHz MHz G ps, POWER GAIN G ps V DD =3Vdc,P out =5W(Avg.),I DQ = 13 ma Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 Probability on CCDF ACPR PARC IRL f, FREQUENCY (MHz) Figure 14. Output Peak -to -Average Ratio Compression (PARC) Broadband P out = 5 Watts Avg. η D η D, DRAIN EFFICIENCY (%) ACPR (dbc) IRL, INPUT RETURN LOSS PARC G ps, POWER GAIN V DD =3Vdc,I DQ = 13 ma, Single--Carrier 188 MHz W--CDMA, 3.84 MHz Channel Bandwidth 184 MHz Input Signal PAR = 9.9 Probability on CCDF 185 MHz G ps 188 MHz 185 MHz 185 MHz 184 MHz 184 MHz 188 MHz ACPR P out, OUTPUT POWER (WATTS) AVG. η D Figure 15. Single -Carrier W -CDMA Power Gain, Drain Efficiency and ACPR versus Output Power η D, DRAIN EFFICIENCY (%) ACPR (dbc) GAIN Gain V DD =3Vdc P in =dbm I DQ = 13 ma IRL IRL, INPUT RETURN LOSS f, FREQUENCY (MHz) Figure 16. Broadband Frequency Response 1

11 V DD =3Vdc,I DQ = 13 ma, P out =5WAvg. f MHz Ω Ω j j j j j j j j j j j j j j j j j j2.3 = Test circuit impedance as measured from gate to ground. = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Figure 17. Series Equivalent Source and Load Impedance 185 MHz MHz 11

12 f (MHz) (Ω) V DD =3Vdc,I DQ = 13 ma, Pulsed CW, 1 μsec(on), 1% Duty Cycle (1) (Ω) P1dB Max Output Power P3dB (dbm) (W) η D (%) (dbm) (W) η D (%) j j j j j j (1) Load impedance for optimum P1dB power. = Impedance as measured from gate contact to ground. = Impedance as measured from drain contact to ground. Input Load Pull Tuner Device Under Test Output Load Pull Tuner Figure 18. Load Pull Performance Maximum P1dB Tuning 185 MHz MHz f (MHz) (Ω) V DD =3Vdc,I DQ = 13 ma, Pulsed CW, 1 μsec(on), 1% Duty Cycle (1) (Ω) P1dB Max Drain Efficiency P3dB (dbm) (W) η D (%) (dbm) (W) η D (%) j j j j j j (1) Load impedance for optimum P1dB efficiency. = Impedance as measured from gate contact to ground. = Impedance as measured from drain contact to ground. Input Load Pull Tuner Device Under Test Output Load Pull Tuner Figure 19. Load Pull Performance Maximum Drain Efficiency Tuning 185 MHz MHz 12

13 PACKAGE DIMENSIONS 13

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17 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following documents, software and tools to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model.s2p File Development Tools Printed Circuit Boards For Software and Tools, do a Part Number search at and select the Part Number link. Go to the Software & Tools tab on the part s Product Summary page to download the respective tool. R5 Suffix = 5 Units, 56 mm Tape Width, 13 inch Reel. R5 TAPE AND REEL OPTION The R5 tape and reel option for MRF8S1821WHS and MRF8S1821WGHS parts will be available for 2 years after release of MRF8S1821WHS and MRF8S1821WGHS reserves the right to limit the quantities that will be delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased these devices in the R5 tape and reel option will be offered MRF8S1821WHS and MRF8S1821WGHS in the R3 tape and reel option. The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description Apr. 212 Initial Release of Data Sheet 17

18 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including typicals, must be validated for each customer application by customer s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: Freescale, the Freescale logo, AltiVec, C--5, CodeTest, CodeWarrior, ColdFire, C--Ware, Energy Efficient Solutions logo, Kinetis, mobilegt, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony, and VortiQa are trademarks of, Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, SMARTMOS, TurboLink, Vybrid, and Xtrinsic are trademarks of All other product or service names are the property of their respective owners. E 212 Document Number: MRF8S1821WHS 18 Rev., 4/212