RF Power Field Effect Transistors N- Channel Enhancement- Mode Lateral MOSFETs

Transcription

1 Technical Data RF Power Field Effect Transistors N- Channel Enhancement- Mode Lateral MOSFETs Designed primarily for CW large-signal output and driver applications with frequencies up to 600 MHz. Devices are unmatched and are suitable for use in industrial, medical and scientific applications. Typical CW Performance: V DD = 50 Volts, I DQ = 900 ma, P out = 300 Watts, f = 220 MHz Power Gain 25.5 db Drain Efficiency 68% Capable of Handling :1 50 Vdc, 220 MHz, 300 Watts CW Output Power Features Integrated ESD Protection Excellent Thermal Stability Facilitates Manual Gain Control, ALC and Modulation Techniques 200 C Capable Plastic Package RoHS Compliant In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel. Document Number: MRF6V2300N Rev. 3, 1/2008 MRF6V2300NR1 MRF6V2300NBR1-600 MHz, 300 W, 50 V LATERAL N- CHANNEL SINGLE- ENDED BROADBAND RF POWER MOSFETs CASE , STYLE 1 TO-270 WB-4 PLASTIC MRF6V2300NR1 CASE , STYLE 1 TO-272 WB-4 PLASTIC MRF6V2300NBR1 PARTS ARE SINGLE- ENDED RF in /V GS RF out /V DS RF in /V GS RF out /V DS (Top View) Note: Exposed backside of the package is the source terminal for the transistor. Figure 1. Pin Connections Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage V DSS -0.5, +1 Vdc Gate-Source Voltage V GS -0.5, + Vdc Storage Temperature Range T stg - 65 to +150 C Case Operating Temperature T C 150 C Operating Junction Temperature T J 200 C, Inc., All rights reserved. 1

2 Table 2. Thermal Characteristics Characteristic Symbol Value (1,2) Unit Thermal Resistance, Junction to Case Case Temperature 83 C, 300 W CW R θjc 0.24 C/W Table 3. ESD Protection Characteristics Human Body Model (per JESD22- A114) Machine Model (per EIA/JESD22- A115) Test Methodology Charge Device Model (per JESD22- C1) Table 4. Moisture Sensitivity Level Class 2 (Minimum) A (Minimum) IV (Minimum) Test Methodology Rating Package Peak Temperature Unit Per JESD 22- A113, IPC/JEDEC J- STD C Table 5. Electrical Characteristics (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS = 0 Vdc, V GS = 0 Vdc) Zero Gate Voltage Drain Leakage Current (V DS = 50 Vdc, V GS = 0 Vdc) Drain- Source Breakdown Voltage (I D = 150 ma, V GS = 0 Vdc) Gate- Source Leakage Current (V GS = 5 Vdc, V DS = 0 Vdc) On Characteristics Gate Threshold Voltage (V DS = Vdc, I D = 800 μadc) Gate Quiescent Voltage (V DD = 50 Vdc, I D = 900 madc, Measured in Functional Test) Drain- Source On- Voltage (V GS = Vdc, I D = 2 Adc) Dynamic Characteristics Reverse Transfer Capacitance (V DS = 50 Vdc ± 30 1 MHz, V GS = 0 Vdc) Output Capacitance (V DS = 50 Vdc ± 30 1 MHz, V GS = 0 Vdc) Input Capacitance (V DS = 50 Vdc, V GS = 0 Vdc ± 30 1 MHz) I DSS 2.5 ma I DSS 50 μadc V (BR)DSS 1 Vdc I GSS μadc V GS(th) Vdc V GS(Q) Vdc V DS(on) 0.28 Vdc C rss 2.88 pf C oss 120 pf C iss 268 pf Functional Tests (In Freescale Test Fixture, 50 ohm system) V DD = 50 Vdc, I DQ = 900 ma, P out = 300 W, f = 220 MHz, CW Power Gain G ps db Drain Efficiency η D % Input Return Loss IRL db 1. MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes - AN1955. ATTENTION: The MRF6V2300N and MRF6V2300NB are high power devices and special considerations must be followed in board design and mounting. Incorrect mounting can lead to internal temperatures which exceed the maximum allowable operating junction temperature. Refer to Freescale Application Note AN3263 (for bolt down mounting) or AN1907 (for solder reflow mounting) PRIOR TO STARTING SYSTEM DESIGN to ensure proper mounting of these devices. 2

3 B3 B1 + V SUPPLY V BIAS + C1 + C2 + C3 C4 C5 C6 C7 R1 B2 L2 C17 C18 C19 C20 RF INPUT Z1 C12 C8 C9 C C11 R2 R3 Z2 Z3 Z4 Z5 Z6 C13 DUT Z7 Z8 L1 Z9 C14 C15 C16 Z C21 C22 C23 Z11 RF OUTPUT Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z6, Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip PCB Arlon CuClad 250GX , 0.030, ε r = 2.55 Figure 2. MRF6V2300NR1(NBR1) Test Circuit Schematic Table 6. MRF6V2300NR1(NBR1) Test Circuit Component Designations and Values Part Description Part Number Manufacturer B1, B2 95 Ω, 0 MHz Long Ferrite Beads, Surface Mount Fair- Rite B3 47 Ω, 0 MHz Short Ferrite Bead, Surface Mount Fair- Rite C1 47 μf, 50 V Electrolytic Capacitor 476KXM063M Illinois Capacitor C2 22 μf, 35 V Tantalum Capacitor T494X226K035AT Kemet C3 μf, 35 V Tantalum Capacitor T491D6K035AT Kemet C4, C19 K pf Chip Capacitors ATC200B3KT50XT ATC C5, C18 20 K pf Chip Capacitors ATC200B203KT50XT ATC C6, C11, C μf, 50 V Chip Capacitors CDR33BX4AKYS AVX C7, C8, C15, C μf, 50 V Chip Capacitors C1825C225J5RAC Kemet C 220 nf Chip Capacitor C1206C224Z5VAC Kemet C9, C12, C14, C23 00 pf Chip Capacitors ATC0B2JT50XT ATC C13 82 pf Chip Capacitor ATC0B820JT500XT ATC C μf, 63 V Electrolytic Capacitor 477KXM063M Illinois Capacitor C21 24 pf Chip Capacitor ATC0B240JT500XT ATC C22 39 pf Chip Capacitor ATC0B390JT500XT ATC L1 4 Turn #18 AWG, 0.18 ID None None L2 82 nh Inductor 1812SMS- 82NJ Coilcraft R1 270 Ω, 1/4 W Chip Resistor CRCW FKTA Vishay R2, R Ω, 1/4 W Chip Resistors CRCW12064R75FKTA Vishay 3

4 C1 C2 C3 + B1 C7 C4 C5 C6 C19 C18 C17 B3 C20 + C C11 B2 C8 R1 C15* C16* L2 C12 C9 C14 R2 R3 L1 C23 C13 CUT OUT AREA C21 C22 MRF6V2300N/NB Rev. 3 * Stacked Figure 3. MRF6V2300NR1(NBR1) Test Circuit Component Layout 4

5 TYPICAL CHARACTERISTICS 00 0 C iss C, CAPACITANCE (pf) 0 C oss C rss Measured with ±30 1 MHz V GS = 0 Vdc I D, DRAIN CURRENT (AMPS) T C = 25 C V DS, DRAIN SOURCE VOLTAGE (VOLTS) V DS, DRAIN SOURCE VOLTAGE (VOLTS) Figure 4. Capacitance versus Drain- Source Voltage Figure 5. DC Safe Operating Area I D, DRAIN CURRENT (AMPS) V 2.63 V V GS = 3 V 2.75 V 2.25 V DRAIN VOLTAGE (VOLTS) P out, OUTPUT POWER (WATTS) CW Figure 6. DC Drain Current versus Drain Voltage G ps, POWER GAIN (db) ma 900 ma 650 ma 450 ma I DQ = 1350 ma V DD = 50 Vdc f1 = 220 MHz Figure 7. CW Power Gain versus Output Power IMD, THIRD ORDER INTERMODULATION DISTORTION (dbc) V DD = 50 Vdc, f1 = 220 MHz, f2 = MHz Two Tone Measurements, 0 khz Tone Spacing I DQ = 450 ma 650 ma 1125 ma 900 ma 1350 ma P out, OUTPUT POWER (WATTS) PEP Figure 8. Third Order Intermodulation Distortion versus Output Power P out, OUTPUT POWER (dbm) P1dB = dbm (319 W) P3dB = dbm (377 W) P in, INPUT POWER (dbm) Ideal Actual V DD = 50 Vdc, I DQ = 900 ma f = 220 MHz Figure 9. CW Output Power versus Input Power 34 5

6 TYPICAL CHARACTERISTICS G ps, POWER GAIN (db) V V 16 V DD = 20 V V 40 V P out, OUTPUT POWER (WATTS) CW 45 V 50 V I DQ = 900 ma f = 220 MHz Figure. Power Gain versus Output Power 400 P out, OUTPUT POWER (dbm) C T C = 30 C 85 C P in, INPUT POWER (dbm) V DD = 50 Vdc I DQ = 900 ma f = 220 MHz Figure 11. Power Output versus Power Input 35 G ps, POWER GAIN (db) C T C = 30 C 85 C η D G ps 85 C P out, OUTPUT POWER (WATTS) CW 25 C 30 C V DD = 50 Vdc I DQ = 900 ma 20 f = 220 MHz Figure 12. Power Gain and Drain Efficiency versus CW Output Power η D, DRAIN EFFICIENCY (%) G ps, POWER GAIN (db) G ps η D IMD3 V DD = 50 V, P out = 300 W (Peak) I DQ = 10 ma, Tone Spacing = 0 khz f, FREQUENCY (MHz) Figure 13. VHF Broadcast Broadband Performance η D, DRAIN EFFICIENCY (%) IMD3 (dbc) 6

7 TYPICAL CHARACTERISTICS 8 MTTF (HOURS) T J, JUNCTION TEMPERATURE ( C) This above graph displays calculated MTTF in hours when the device is operated at V DD = 50 Vdc, P out = 300 W CW, and η D = 68%. MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. Figure 14. MTTF versus Junction Temperature 250 7

8 Z source f = 220 MHz Z o = 5 Ω Z load f = 220 MHz f MHz V DD = 50 Vdc, I DQ = 900 ma, P out = 300 W CW Z source Z load j j2.04 Z source = Test circuit impedance as measured from gate to ground. Z load = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 15. Series Equivalent Source and Load Impedance 8

9 PACKAGE DIMENSIONS 9

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15 PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages AN1955: Thermal Measurement Methodology of RF Power Amplifiers AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over- Molded Plastic Packages Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description 0 Feb Initial Release of Data Sheet 1 Feb Added Fig. 1, Pin Connections, p. 1 Removed footnote references listed for Operating Junction Temperature, Table 1, Maximum Ratings, p. 1 Added Max value to Power Gain, Table 5, Functional Tests, p. 2 2 May 2007 Corrected Test Circuit Component part numbers in Table 6, Component Designations and Values for C4, C19, C5, C18, C9, C12, C14, and C23, p. 3 3 Jan Increased operating frequency to 600 MHz, p. 1 Added Case Operating Temperature limit to the Maximum Ratings table and set limit to 150 C, p. 1 Corrected C iss test condition to indicate AC stimulus on the V GS connection versus the V DS connection, Dynamic Characteristics table, p. 2 Updated PCB information to show more specific material details, Fig. 2, Test Circuit Schematic, p. 3 Replaced Case Outline , Issue C, with , Issue D, p Added pin numbers 1 through 4 on Sheet 1. Replaced Case Outline , Issue D, with , Issue E, p Added pin numbers 1 through 4 on Sheet 1, replacing Gate and Drain notations with Pin 1 and Pin 2 designations. 15

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