Heterostructure Field Effect Transistor (GaAs HFET) Broadband High Linearity Amplifier

Transcription

1 Technical Data Heterostructure Field Effect Transistor (GaAs HFET) Broadband High Linearity Amplifier The is a General Purpose Amplifier that is internally input and output prematched. It is designed for a broad range of Class A, small-signal, high linearity, general purpose applications. It is suitable for applications with frequencies from 25 to 4 MHz such as Cellular, PCS, WLL, PHS, CATV, VHF, UHF, UMTS and general small-signal RF. Features Frequency: 25 to 4 MHz P1dB: MHz Small-Signal Gain: 12 9 MHz Third Order Output Intercept Point: 44 9 MHz Single 5 Volt Supply Internally Prematched to 5 Ohms Internally Biased Low Cost SOT- 89 Surface Mount Package RoHS Compliant In Tape and Reel. T1 Suffix = 1, Units per 12 mm, 7 inch Reel. Document Number: Rev. 1, 4/ MHz, 12 db 22.5 dbm GaAs HFET CASE , STYLE 2 SOT-89 PLASTIC Table 1. Typical Performance (1) Characteristic Symbol 9 MHz Small-Signal Gain (S21) Input Return Loss (S11) 214 MHz 35 MHz Unit G p db IRL db Table 2. Maximum Ratings Rating Symbol Value Unit Supply Voltage V DD 6 V Supply Current I DD 3 ma RF Input Power P in 1 dbm Storage Temperature Range T stg -65 to +15 C Output Return Loss (S22) Power Compression Third Order Output Intercept Point ORL db P1db dbm IP dbm Junction Temperature (2) T J 15 C 2. For reliable operation, the junction temperature should not exceed 15 C. 1., T C = 25 C, 5 ohm system Table 3. Thermal Characteristics (, I DD = 15 ma, T C = 25 C) Characteristic Symbol Value (3) Unit Thermal Resistance, Junction to Case R θjc 37.5 C/W 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes - AN1955., Inc., All rights reserved. 1

2 Table 4. Electrical Characteristics (, 9 MHz, T C = 25 C, 5 ohm system, in Freescale Application Circuit) Characteristic Symbol Min Typ Max Unit Small-Signal Gain (S21) G p db Input Return Loss (S11) IRL -14 db Output Return Loss (S22) ORL -14 db Power 1dB Compression P1dB 22.5 dbm Third Order Output Intercept Point IP3 44 dbm Noise Figure NF 3.2 db Supply Current (1) I DD ma Supply Voltage (1) V DD 5 V 1. For reliable operation, the junction temperature should not exceed 15 C. 2

3 Table 5. Functional Pin Description Pin Number Pin Function 2 1 RF in 2 Ground 3 RF out /DC Supply Figure 1. Functional Diagram Table 6. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD 22-A114) 1A (Minimum) Machine Model (per EIA/JESD 22-A115) A (Minimum) Charge Device Model (per JESD 22-C11) IV (Minimum) Table 7. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit Per JESD 22-A113, IPC/JEDEC J-STD C 3

4 5 OHM TYPICAL CHARACTERISTICS 2 G p, SMALL SIGNAL GAIN (db) C T C = 85 C f, FREQUENCY (GHz) 25 C 4 S11, S22 (db) S11 S f, FREQUENCY (GHz) I DD = 15 ma 4 Figure 2. Small- Signal Gain (S21) versus Frequency Figure 3. Input/Output Loss versus Frequency G p, SMALL SIGNAL GAIN (db) MHz 196 MHz 26 MHz 35 MHz 214 MHz I DD = 15 ma P1dB, 1 db COMPRESSION POINT (dbm) P out, OUTPUT POWER (dbm) f, FREQUENCY (GHz) Figure 4. Small- Signal Gain versus Output Figure 5. P1dB versus Frequency Power I DD = 15 ma I DD, DRAIN CURRENT (ma) IP3, THIRD ORDER OUTPUT INTERCEPT POINT (dbm) V DD, DRAIN VOLTAGE (V) f, FREQUENCY (GHz) Figure 6. Drain Current versus Drain Voltage Figure 7. Third Order Output Intercept Point versus Frequency , I DD = 15 ma, 1 dbm per Tone Two Tone Measurements, 1 MHz Tone Spacing 4

5 5 OHM TYPICAL CHARACTERISTICS IP3, THIRD ORDER OUTPUT INTERCEPT POINT (dbm) f = 9 MHz, 1 dbm per tone 44 Two Tone Measurements, 1 MHz Tone Spacing V DD, DRAIN VOLTAGE (V) T, TEMPERATURE ( C) Figure 8. Third Order Output Intercept Point Figure 9. Third Order Output Intercept Point versus Drain Voltage versus Case Temperature IP3, THIRD ORDER OUTPUT INTERCEPT POINT (dbm) , f = 9 MHz, 1 dbm per Tone Two Tone Measurements, 1 MHz Tone Spacing IMD, THIRD ORDER INTERMODULATION DISTORTION (dbc) I DD = 15 ma f = 9 MHz 1 MHz Tone Spacing P out, OUTPUT POWER (dbm) Figure 1. Third Order Intermodulation versus Output Power 18 MTTF (YEARS) T J, JUNCTION TEMPERATURE ( C) NOTE: The MTTF is calculated with, I DD = 15 ma Figure 11. MTTF versus Junction Temperature NF, NOISE FIGURE (db) I DD = 15 ma 4 ACPR, ADJACENT CHANNEL POWER RATIO (dbc) , I DD = 15 ma, f = 214 MHz Single Carrier W CDMA, 3.84 MHz Channel Bandwidth, Input Signal PAR = 8.5 Probability (CCDF) f, FREQUENCY (GHz) Figure 12. Noise Figure versus Frequency P out, OUTPUT POWER (dbm) Figure 13. Single- Carrier W- CDMA Adjacent Channel Power Ratio versus Output Power 5

6 5 OHM APPLICATION CIRCUIT: 8-19 MHz V SUPPLY R1 C3 C4 L1 RF INPUT Z1 Z2 Z3 Z4 DUT Z5 Z6 Z7 Z8 RF OUTPUT C1 C5 L2 V CC C2 C6 Z1 Z2 Z3 Z4 Z5.347 x.58 Microstrip.68 x.58 Microstrip.418 x.58 Microstrip.89 x.58 Microstrip.172 x.58 Microstrip Z6.43 x.58 Microstrip Z7.86 x.58 Microstrip Z8.261 x.58 Microstrip PCB Getek Grade ML2C,.31, ε r = 4.1 Figure Ohm Test Circuit Schematic 2 1 S21 R1 S21, S11, S22 (db) 1 2 S11 S22 C1 C5 L2 L1 C4 C3 C2 C I DD = 15 ma f, FREQUENCY (MHz) Figure 15. S21, S11 and S22 versus Frequency MMG3XX Rev 2 Figure Ohm Test Circuit Component Layout Table 8. 5 Ohm Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2 47 pf Chip Capacitors 635J47BBS AVX C3.1 μf Chip Capacitor C63C14J5RAC Kemet C4 1 μf Chip Capacitor C63C15J5RAC Kemet C5.7 pf Chip Capacitor 635JR7BBS AVX C6.4 pf Chip Capacitor 1215JR4BBS AVX L1 56 nh Chip Inductor HK16856NJ-T Taiyo Yuden L2 12 nh Chip Inductor HK16812NJ-T Taiyo Yuden R1, 1/1 W Chip Resistor CRCW63FKEA Vishay 6

7 5 OHM APPLICATION CIRCUIT: MHz V SUPPLY R1 C3 C4 L1 RF INPUT Z1 Z2 Z3 DUT Z4 Z5 Z6 Z7 RF OUTPUT C1 C5 V CC C2 C6 Z1 Z2 Z3 Z4.347 x.58 Microstrip.68 x.58 Microstrip.57 x.58 Microstrip.172 x.58 Microstrip Z5.43 x.58 Microstrip Z6.86 x.58 Microstrip Z7.261 x.58 Microstrip PCB Getek Grade ML2C,.31, ε r = 4.1 Figure Ohm Test Circuit Schematic 2 1 S21 R1 S21, S11, S22 (db) 1 S11 C1 C5 L1 C4 C3 C2 C S22 f, FREQUENCY (MHz) I DD = 15 ma Figure 18. S21, S11 and S22 versus Frequency MMG3XX Rev 2 Figure Ohm Test Circuit Component Layout Table 9. 5 Ohm Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2.1 μf Chip Capacitors 635J47BBS AVX C3.1 μf Chip Capacitor C63C14J5RAC Kemet C4 1 μf Chip Capacitor C63C15J5RAC Kemet C5.7 pf Chip Capacitor 635JR7BBS AVX C6.4 pf Chip Capacitor 1215JR4BBS AVX L1 56 nh Chip Inductor HK16856NJ-T Taiyo Yuden R1, 1/1 W Chip Resistor CRCW63FKEA Vishay 7

8 5 OHM APPLICATION CIRCUIT: MHz V SUPPLY R1 C3 C4 L1 RF INPUT Z1 Z2 Z3 DUT Z4 Z5 Z6 Z7 RF OUTPUT C1 C5 V CC C6 C2 Z1 Z2 Z3 Z4.347 x.58 Microstrip.489 x.58 Microstrip.86 x.58 Microstrip.97 x.58 Microstrip Z5.75 x.58 Microstrip Z6.43 x.58 Microstrip Z7.347 x.58 Microstrip PCB Getek Grade ML2C,.31, ε r = 4.1 Figure 2. 5 Ohm Test Circuit Schematic S21, S11, S22 (db) S22 S11 S21 I DD = 15 ma f, FREQUENCY (MHz) Figure 21. S21, S11 and S22 versus Frequency C1 C5 MMG3XX Rev 2 Figure Ohm Test Circuit Component Layout R1 C6 L1 C4 C3 C2 Table 1. 5 Ohm Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2 2 pf Chip Capacitors 635J2RBBS AVX C3.1 μf Chip Capacitor C63C14J5RAC Kemet C4 1 μf Chip Capacitor C63C15J5RAC Kemet C5.8 pf Chip Capacitor 635JR8BBS AVX C6.4 pf Chip Capacitor 635JR4BBS AVX L1 56 nh Chip Inductor HK16856NJ-T Taiyo Yuden R1, 1/1 W Chip Resistor CRCW63FKEA Vishay 8

9 5 OHM TYPICAL CHARACTERISTICS Table 11. Common Source S-Parameters (, I DD = 15 ma, T C = 25 C, 5 Ohm System) f S 11 S 21 S 12 S 22 MHz S 11 φ S 21 φ S 12 φ S 22 φ (continued) 9

10 5 OHM TYPICAL CHARACTERISTICS Table 11. Common Source S-Parameters (, I DD = 15 ma, T C = 25 C, 5 Ohm System) (continued) f S 11 S 21 S 12 S 22 MHz S 11 φ S 21 φ S 12 φ S 22 φ

11 diameter Recommended Solder Stencil NOTES: 1. THERMAL AND RF GROUNDING CONSIDERATIONS SHOULD BE USED IN PCB LAYOUT DESIGN. 2. DEPENDING ON PCB DESIGN RULES, AS MANY VIAS AS POSSIBLE SHOULD BE PLACED ON THE LANDING PATTERN. 3. IF VIAS CANNOT BE PLACED ON THE LANDING PATTERN, THEN AS MANY VIAS AS POSSIBLE SHOULD BE PLACED AS CLOSE TO THE LANDING PATTERN AS POSSIBLE FOR OPTIMAL THERMAL AND RF PERFORMANCE. 4. RECOMMENDED VIA PATTERN SHOWN HAS.381 x.762 MM PITCH. Figure 23. Recommended Mounting Configuration 11

12 PACKAGE DIMENSIONS 12

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15 PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description Nov. 27 Initial Release of Data Sheet 1 Apr. 28 Removed Footnote 2, Continuous voltage and current applied to device, from Table 2, Maximum Ratings, p. 1 Corrected Fig. 13, Single-Carrier W-CDMA Adjacent Channel Power Ratio versus Output Power y-axis (ACPR) unit of measure to dbc, p. 5 Updated Part Numbers in Tables 8, 9, 1, Component Designations and Values, to latest RoHS compliant part numbers, p. 6, 7, 8 15

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