LIFETIME BUY LAST ORDER 3 OCT 08 LAST SHIP 14 MAY 09. RF Power Field-Effect Transistor N-Channel Enhancement-Mode Lateral MOSFET MRF374A

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1 Technical Data Document Number: Rev. 5, 5/26 LIFETIME BUY RF Power Field-Effect Transistor N-Channel Enhancement-Mode Lateral MOSFET Designed for broadband commercial and industrial applications with frequencies from 47 to 86 MHz. The high gain and broadband performance of this device make it ideal for large- signal, common source amplifier applications in 28/32 volt transmitter equipment. Typical Two- Tone 86 MHz, 32 Volts, Narrowband Fixture Output Power 13 Watts PEP Power Gain 17.3 db Efficiency 41% IMD dbc Capable of Handling :1 32 Vdc, 857 MHz, 13 Watts CW Output Power Features Integrated ESD Protection Excellent Thermal Stability Characterized with Differential Large- Signal Impedance Parameters RoHS Compliant Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage V DSS -.5, +7 Vdc Gate-Source Voltage V GS -.5, +15 Vdc Total Device T C = 25 C Derate above 25 C P D Storage Temperature Range T stg -65 to +15 C Case Operating Temperature T C 15 C Operating Junction Temperature T J 2 C Table 2. Thermal Characteristics W W/ C Characteristic Symbol Value Unit Thermal Resistance, Junction to Case R θjc.58 C/W Table 3. ESD Protection Characteristics Human Body Model Machine Model Test Conditions MHz, 13 W, 32 V LATERAL N- CHANNEL BROADBAND RF POWER MOSFET CASE 375F-4, STYLE 1 NI-65 Class 1 (Minimum) M2 (Minimum), Inc., 26. All rights reserved. 1

2 Table 4. Electrical Characteristics (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit LIFETIME BUY Off Characteristics (1) Drain-Source Breakdown Voltage (V GS = Vdc, I D = μa) Zero Gate Voltage Drain Current (V DS = 32 Vdc, V GS = Vdc) Gate-Source Leakage Current (V GS = 5 Vdc, V DS = Vdc) On Characteristics Gate Threshold Voltage (1) (V DS = V, I D = 2 μa) Gate Quiescent Voltage (2) (V DS = 32 V, I D = ma) Drain-Source On-Voltage (1) (V GS = V, I D = 3 A) Dynamic Characteristics (1) Input Capacitance (V DS = 32 V, V GS = V, f = 1 MHz) Output Capacitance (V DS = 32 V, V GS = V, f = 1 MHz) Reverse Transfer Capacitance (V DS = 32 V, V GS = V, f = 1 MHz) V (BR)DSS 7 Vdc I DSS 1 μadc I GSS 1 μadc V GS(th) Vdc V GS(Q) Vdc V DS(on) Vdc C iss 97.3 pf C oss 49 pf C rss 1.91 pf Functional Characteristics, Narrowband Operation (2) (In Freescale Narrowband Circuit, 5 ohm system) Common Source Power Gain (, P out = 13 W PEP, I DQ = 4 ma, f1 = 857 MHz, f2 = 863 MHz) G ps db Drain Efficiency (, P out = 13 W PEP, I DQ = 4 ma, f1 = 857 MHz, f2 = 863 MHz) Intermodulation Distortion (, P out = 13 W PEP, I DQ = 4 ma, f1 = 857 MHz, f2 = 863 MHz) 1. Each side of device measured separately. 2. Measurement made with device in push-pull configuration. η % IMD db 2

3 LIFETIME BUY RF INPUT C1 C2 V GS V GS R3A R2 Output 1 (12.5 ohm microstrip) C3 R3B L4 Note: Trim Balun PCB so that a 35 mil "tab" fits into the main PCB slot" resulting in Balun solder pads being level with the PCB substrate solder pads when fully inserted. L3A L3B C4A L2A C5 C4B L2B Output 2 (12.5 ohm microstrip) R1A R1B Vertical Balun Mounting Detail Ground C6 C7A C7B MRF374 Rev 3a C13A Motorola Vertical 86 MHz Balun Rogers RO3 (5 mil thick) Figure 1. Narrowband Test Circuit Component Layout R4A C9A C C9B R4B C13B L1A C14A C11 L1B C14B C12A C12B PCB Substrate (3 mil thick) 55 mil slot cut out to accept Balun RF OUTPUT Input (5 ohm microstrip) Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have no impact on form, fit or function of the current product. V DD V DD 3

4 LIFETIME BUY Table 5. Narrowband Test Circuit Component Layout Designations and Values C1 C2 C3 C4A, B, C12A, B C5 C6 C7A, B, C14A, B C9A, B C C11 C13A, B L1A, B L2A, B L3A, B Designation.8 pf Chip Capacitor, ATC 2.2 pf Chip Capacitor, ATC Description.5-5. pf Variable Capacitor, Johanson Gigatrim 47 pf Chip Capacitors, ATC 1. pf Chip Capacitor, ATC pf Chip Capacitor, ATC, pf Chip Capacitors, ATC 15 pf Chip Capacitors, ATC 3.9 pf Chip Capacitor, ATC 5.1 pf Chip Capacitor, ATC 2.2 F, V Chip Capacitors, Vishay #VJ364Y225KXBAT 5. nh, Coilcraft #A2T 8. nh, Coilcraft #A3T 13. nh, Coilcraft #132-11SMJ L4 8.8 nh, Coilcraft #166-8 R1A, B 51, 1/4 W Chip Resistors, Vishay Dale (12) R2, 1/2 W Chip Resistor, Vishay Dale (2) R3A, B 3.3 k, 1/8 W Chip Resistors, Vishay Dale (126) R4A, B 18, 1/4 W Chip Resistors, Vishay Dale (12) PCB MRF374 Printed Circuit Board Rev 3, Rogers RO435, Height 3 mils, ε r = 3.48 Balun B1A, B Vertical 86 MHz Narrowband Balun, Printed Circuit Board Rev 1, Rogers RO3, Height 5 mils, ε r =.2 4

5 TYPICAL CHARACTERISTICS G ps, POWER GAIN (db) LIFETIME BUY η, DRAIN EFFICIENCY (%) C oss,c iss, Capacitance (pf) Vdc 5 V DD = 28 Vdc 4 P out = W (PEP) f, FREQUENCY (MHz) f, FREQUENCY (MHz) Figure 2. Gain versus Frequency in Broadband Circuit P out = W (PEP) 32 Vdc f, FREQUENCY (MHz) 8 Figure 4. Drain Efficiency versus Frequency in Broadband Circuit C iss 5 C oss 5 C rss V DS, DRAIN SOURCE VOLTAGE (VOLTS) Figure 6. Capacitance versus Voltage 9 G ps, POWER GAIN (db) 2 6 INPUT RETURN LOSS (db) IRL, Capacitance (pf) C rss, INTERMODULATION DISTORTION (dbc) IMD, G ps IRL V DD = 28 Vdc Figure 3. Intermodulation Distortion versus Frequency in Broadband Circuit Figure 5. Performance in Broadband Circuit 32 Vdc P out = W (PEP) 3 η D 5 25 η, DRAIN EFFICIENCY (%), G ps, POWER GAIN (db) 4.1 P out = W (PEP) f, FREQUENCY (MHz) Figure 7. COFDM Intermodulation, Gain and Efficiency versus Output Power in Broadband Circuit I DQ = 1.1 A 25 3 f = 86 MHz 2 K Mode COFDM QAM 35.5 Peak/Avg. Ratio 2 G ps 4 15 IMR η 55 1 P out, OUTPUT POWER (WATTS) AVG. 9, DRAIN EFFICIENCY (%) D η 2 6 IMR, INTERMODULATION (dbc) 5

6 TYPICAL CHARACTERISTICS η, DRAIN EFFICIENCY (%), G ps, POWER GAIN (db) LIFETIME BUY IMD, INTERMODULATION DISTORTION (dbc) G ps 4 15 IMR η I DQ = 1.1 A 55 f = 86 MHz P out, OUTPUT POWER (WATTS) AVG. Figure VSB Intermodulation, Gain and Efficiency versus Output Power in Broadband Circuit I DQ = 2 ma 4 ma 6 ma 8 ma 1. A f = 857 MHz Figure. Intermodulation Distortion versus Peak Output Power in Narrowband Circuit 2 IMR,INTERMODULATION (dbc) G ps, POWER GAIN (db) η D, DRAIN EFFICIENCY (%) I DQ = 1. A 8 ma 6 ma 4 ma 2 ma Figure 9. Power Gain versus Peak Output Power in Narrowband Circuit 1 I DQ = 8 ma f = 857 MHz f = 857 MHz Figure 11. Drain Efficiency versus Peak Output Power in Narrowband Circuit 6

7 TYPICAL CHARACTERISTICS V DD = 28 Vdc G ps, POWER GAIN (db) LIFETIME BUY η, DRAIN EFFICIENCY (%) INTERMODULATION DISTORTION (dbc) IMD, V DD = 28 Vdc Tone Spacing = 6 MHz 47 MHz 56 MHz 76 MHz 66 MHz 86 MHz 15 Figure 12. Power Gain versus Peak Output Power in Broadband Circuit MHz 76 MHz G ps, POWER GAIN (db) Tone Spacing = 6 MHz 47 MHz 56 MHz 76 MHz 66 MHz 86 MHz Figure 13. Power Gain versus Peak Output Power in Broadband Circuit 45 V DD = 28 Vdc 86 MHz 4 35 Tone Spacing = 6 MHz Tone Spacing = 6 MHz 56 MHz 86 MHz 66 MHz 3 56 MHz MHz 66 MHz 47 MHz Figure 14. Drain Efficiency versus Peak Output Power in Broadband Circuit Figure 15. Drain Efficiency versus Peak Output Power in Broadband Circuit V DD = 28 Vdc Tone Spacing = 6 MHz 66 MHz 56 MHz 47 MHz Figure 16. Intermodulation Distortion versus Peak Output Power in Broadband Circuit η, DRAIN EFFICIENCY (%) INTERMODULATION DISTORTION (dbc) IMD, Tone Spacing = 6 MHz 66 MHz 56 MHz 86 MHz 76 MHz 47 MHz Figure 17. Intermodulation Distortion versus Peak Output Power in Broadband Circuit 7

8 LIFETIME BUY f MHz Z o = 4 Ω Z source Z source Ω j j j3. f = 845 MHz f = 875 MHz V DD = 32 V, I DQ = 4 ma, P out = 13 W PEP f = 845 MHz Z load Ω Z load f = 875 MHz j j j3.52 Z source = Test circuit impedance as measured from gate to gate, balanced configuration. Z load = Test circuit impedance as measured from drain to drain, balanced configuration. Input Matching Network + Device Under Test + Z Z source load Output Matching Network Figure 18. Series Equivalent Source and Load Impedance 8

9 NOTES 9

10 NOTES

11 PACKAGE DIMENSIONS bbb M bbb M R (LID) E T A M S (INSULATOR) ccc M H B M D B M K 4 PL M (INSULATOR) bbb T A M T A M M T A A B M M B M 1 3 G 2 4 A (FLANGE) L 5 F B C 2X B (FLANGE) N (LID) ccc M T T Q bbb M A M SEATING PLANE T B M CASE 375F-4 ISSUE E NI-65 A M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION H IS MEASURED.3 (.762) AWAY FROM PACKAGE BODY. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G.9 BSC BSC H K L.26 BSC 6.6 BSC M N Q R S bbb. BSC.254 BSC ccc.15 BSC.381 BSC STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. GATE 5. SOURCE 11

12 How to Reach Us: Home Page: USA/Europe or Locations Not Listed: Technical Information Center, CH37 13 N. Alma School Road Chandler, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) support@freescale.com Japan: Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong support.asia@freescale.com For Literature Requests Only: Literature Distribution Center P.O. Box 545 Denver, Colorado or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. reserves the right to make changes without further notice to any products herein. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. does not convey any license under its patent rights nor the rights of others. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death may occur. Should Buyer purchase or use products for any such unintended or unauthorized application, Buyer shall indemnify and hold and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of, Inc. All other product or service names are the property of their respective owners., Inc. 26. All rights reserved. Document Number: 12 Rev. 5, 5/26

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