IRF1010E. HEXFET Power MOSFET V DSS = 60V. R DS(on) = 0.012Ω I D = 81A

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1 l l l l l dvanced Process Technology Dynamic dv/dt Rating 75 C Operating Temperature Fast Switching Fully valanche Rated Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO220 package is universally preferred for all commercialindustrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO220 contribute to its wide acceptance throughout the industry. G D S PD 9.670B IRF00E HEXFET Power MOSFET V DSS = 60V R DS(on) = 0.02Ω I D = 8 TO220B bsolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V 0V 83 I T C = 00 C Continuous Drain Current, V 0V 59 I DM Pulsed Drain Current 330 P C = 25 C Power Dissipation 70 W Linear Derating Factor. W/ C V GS GatetoSource Voltage ± 20 V E S Single Pulse valanche Energy 320 mj I R valanche Current 50 E R Repetitive valanche Energy 7 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and 55 to 75 T STG Storage Temperature Range C Soldering Temperature, for 0 seconds 300 (.6mm from case ) Mounting torque, 632 or M3 srew 0 lbf in (.N m) Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 0.90 R θcs CasetoSink, Flat, Greased Surface 0.50 C/W R θj Junctiontombient 62 /0/97

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 60 V V GS = 0V, I D = 250µ V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.06 V/ C Reference to 25 C, I D = m R DS(on) Static DraintoSource OnResistance 0.02 Ω V GS = 0V, I D =50 V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µ g fs Forward Transconductance 36 S V DS = 25V, I D =50 I DSS DraintoSource Leakage Current 25 V µ DS = 60V, V GS = 0V 250 V DS = 48V, V GS = 0V, T J = 50 C I GSS GatetoSource Forward Leakage 00 V GS = 20V n GatetoSource Reverse Leakage 00 V GS = 20V Q g Total Gate Charge 6 I D = 50 Q gs GatetoSource Charge 23 nc V DS = 48V Q gd GatetoDrain ("Miller") Charge 47 V GS = 0V, See Fig. 6 and 3 t d(on) TurnOn Delay Time 2 V DD = 30V t r Rise Time 90 I D = 50 ns t d(off) TurnOff Delay Time 4 R G = 3.6Ω t f Fall Time 7 R D = 0.6Ω, See Fig. 0 Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 2800 V GS = 0V C oss Output Capacitance 880 pf V DS = 25V C rss Reverse Transfer Capacitance 290 ƒ =.0MHz, See Fig. 5 D S SourceDrain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 83 (Body Diode) showing the G I SM Pulsed Source Current integral reverse 333 (Body Diode) pn junction diode. S V SD Diode Forward Voltage.3 V T J = 25 C, I S =50, V GS = 0V t rr Reverse Recovery Time 70 0 ns T J = 25 C, I F = 50 Q rr Reverse Recovery Charge nc di/dt = 00/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. ) Starting T J = 25 C, L = 260µH R G = 25Ω, I S = 50. (See Figure 2) ƒ I SD 50, di/dt 260/µs, V DD V (BR)DSS, T J 75 C Pulse width 300µs; duty cycle 2%. Caculated continuous current based on maximum allowable junction temperature; for recommended currenthandling of the package refer to Design Tip # 934

3 I D, DraintoSource Current () 00 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintoSource Current () 00 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C V DS, DraintoSource Voltage (V) 20µs PULSE WIDTH T J = 75 C V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintoSource Current () 00 0 T = 25 C J V DS= 25V 20µs PULSE W IDTH V GS T = 75 C J, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 2.5 I D = V GS = 0V T J, Junction Temperature( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature

4 C, Capacitance (pf) C iss C oss C rss V GS = 0V, f = MHz C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd V DS, DraintoSource Voltage (V) V GS, GatetoSource Voltage (V) I = D 50 V DS = 48V V DS = 30V FOR TEST CIRCUIT SEE FIGURE Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage I SD, Reverse Drain Current () 00 T = 75 C J T = 25 C J V GS = 0V V SD, SourcetoDrain Voltage (V) I D, Drain Current () 00 0 OPERTION IN THIS RE LIMITED BY R DS(on) 0us 00us ms 0ms TC = 25 C TJ = 75 C Single Pulse 0 00 V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating rea

5 V DS R D LIMITED BY PCKGE R G V GS D.U.T. V DD I D, Drain Current () Fig 0a. Switching Time Test Circuit V DS 90% 0V Pulse Width µs Duty Factor 0. % T C, Case Temperature ( C) 0% V GS t d(on) t r t d(off) t f Fig 9. Maximum Drain Current Vs. Case Temperature Fig 0b. Switching Time Waveforms Thermal Response (Z thjc ) 0. D = SINGLE PULSE (THERML RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase

6 R G V DS 20V tp Fig 2a. Unclamped Inductive Test Circuit tp I S L D.U.T 0.0Ω 5V V (BR)DSS DRIVER V DD E S, Single Pulse valanche Energy (mj) TOP BOTTOM I D Starting T, Junction Temperature ( J C) Fig 2c. Maximum valanche Energy Vs. Drain Current I S Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF 0 V Q GS Q GD D.U.T. V DS V GS V G 3m Charge Fig 3a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 3b. Gate Charge Test Circuit

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =0V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Repplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4. For NChannel HEXFETS

8 Package Outline TO220B Outline Dimensions are shown in millimeters (inches) 2.87 (.3) 2.62 (.03) 0.54 (.45) 0.29 (.405) 3.78 (.49) 3.54 (.39) 4.69 (.85) 4.20 (.65) B.32 (.052).22 (.048) 5.24 (.600) 4.84 (.584) (.255) 6.0 (.240).5 (.045) MIN LED SSIGNMENTS GTE 2 DR IN 3 SOURCE 4 DR IN 4.09 (.555) 3.47 (.530) 4.06 (.60) 3.55 (.40) 3X.40 (.055).5 (.045) 2.54 (.00) 2X NOTES: 3X 0.93 (.037) 0.69 (.027) 0.36 (.04) M B M 0.55 (.022) 3X 0.46 (.08) 2.92 (.5) 2.64 (.04) DIMENSIONING & TOLERNCING PER NSI Y4.5M, OUTLINE CONFORMS TO JEDEC OUTLINE TO220B. 2 CON TR OLLING DIMENSION : INC H 4 HETSINK & LE D MESUREMENTS DO NOT INCLUDE BURRS. Part Marking Information TO220B EXMPLE EXMPLE : THIS : THIS N IS N IRF00 IRF00 WITH WITH SSEMBLY LOT LOT CODE CODE 9BM 9BM INTERNTIONL RECTIFIER RECTIFIER IRF00 IRF00 LOGO LOGO B 9B M M SSEMBLY LOT LOT CODE CODE PRT PRT NUMBER NUMBER DTE DTE CODE CODE (YYW (YYW W ) W ) YY YY = YER = YER WW WW = WEEK = WEEK WORLD HEDQURTERS: 233 Kansas St., El Segundo, California 90245, Tel: (30) EUROPEN HEDQURTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: IR CND: 732 Victoria Park ve., Suite 20, Markham, Ontario L3R 2Z8, Tel: (905) IR GERMNY: Saalburgstrasse 57, 6350 Bad Homburg Tel: IR ITLY: Via Liguria 49, 007 Borgaro, Torino Tel: IR FR EST: K&H Bldg., 2F, 304 NishiIkebukuro 3Chome, ToshimaKi, Tokyo Japan 7 Tel: IR SOUTHEST SI: 35 Outram Road, #002 Tan Boon Liat Building, Singapore 036 Tel: Data and specifications subject to change without notice. /97