C Soldering Temperature, for 10 seconds 300 (1.6mm from case )

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1 l dvanced Process Technology l Surface Mount (IRF9Z34NS) l Lowprofile throughhole (IRF9Z34NL) l 175 C Operating Temperature l Fast Switching l PChannel l Fully valanche Rated escription G P IRF9Z34NS/L HEXFET Power MOSFET Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The 2 Pak is a surface mount power package capable of accommodating die sizes up to HEX4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The 2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The throughhole version (IRF9Z34NL) is available for lowprofile applications. bsolute Maximum Ratings Parameter Max. Units T C = 25 C Continuous rain Current, V V 19 T C = 0 C Continuous rain Current, V V 14 I M Pulsed rain Current 68 = 25 C Power issipation 3.8 W C = 25 C Power issipation 68 W Linear erating Factor 0.45 W/ C V GS GatetoSource Voltage ± 20 V E S Single Pulse valanche Energy 180 mj I R valanche Current E R Repetitive valanche Energy 6.8 mj dv/dt Peak iode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and 55 to 175 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (1.6mm from case ) Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 2.2 C/W R θj Junctiontombient ( PCB Mounted,steadystate)** 40 S 2 Pak TO262 V SS = 55V R S(on) = 0.Ω I = 19 8/25/97

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)SS raintosource Breakdown Voltage 55 V V GS = 0V, I = 250µ V (BR)SS / T J Breakdown Voltage Temp. Coefficient 0.05 V/ C Reference to 25 C, I = 1m R S(on) Static raintosource OnResistance 0. Ω V GS = V, I = V GS(th) Gate Threshold Voltage V V S = V GS, I = 250µ g fs Forward Transconductance 4.2 S V S = 25V, I = I SS raintosource Leakage Current 25 V S = 55V, V GS = 0V µ 250 V S = 44V, V GS = 0V, T J = 150 C I GSS GatetoSource Forward Leakage 0 V GS = 20V n GatetoSource Reverse Leakage 0 V GS = 20V Q g Total Gate Charge 35 I = Q gs GatetoSource Charge 7.9 nc V S = 44V Q gd Gatetorain ("Miller") Charge 16 V GS = V, See Fig. 6 and 13 t d(on) TurnOn elay Time 13 V = 28V t r Rise Time 55 I = ns t d(off) TurnOff elay Time 30 R G = 13Ω t f Fall Time 41 R = 2.6Ω, See Fig. L S Internal Source Inductance 7.5 nh Between lead, and center of die contact C iss Input Capacitance 620 V GS = 0V C oss Output Capacitance 280 pf V S = 25V C rss Reverse Transfer Capacitance 140 ƒ = 1.0MHz, See Fig. 5 Sourcerain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current MOSFET symbol 19 (Body iode) showing the I SM Pulsed Source Current integral reverse G 68 (Body iode) pn junction diode. S V S iode Forward Voltage 1.6 V T J = 25 C, I S =, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = Q rr Reverse Recovery Charge nc di/dt = 0/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L ) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Pulse width 300µs; duty cycle 2%. Starting T J = 25 C, L = 3.6mH Uses IRF9Z34N data and test conditions R G = 25Ω, I S =. (See Figure 12) ƒ I S, di/dt 290/µs, V V (BR)SS, T J 175 C ** When mounted on 1" square PCB (FR4 or G Material ). For recommended footprint and soldering techniques refer to application note #N994.

3 I, raintosource C urrent () 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTT OM 4.5V 4.5V 4.5V 20µs PULSE WITH 20µs PULSE WITH Tc J = 25 C 1 TC J = 175 C V S, raintosource Voltage (V) I, raintosource Current () 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTT OM 4.5V V S, raintosource Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I, raintosource C urrent () 0 T = 25 C J T = 175 C J V S = 2 5V 20µs PULSE W ITH V GS, GatetoSource Voltage (V) R S(on), raintos ource On Resistance (Normalized) I = 17 V GS = V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature

4 C, Capacitance (pf) V GS = 0V, f = 1MH z C iss = C gs C gd, C ds SHORTE C rss = Cgd C oss = C ds C gd C iss C oss C rss V S, raintosource Voltage (V) V GS, GatetoSource Voltage (V) I = V S = 44V V S = 28V FOR TEST CIRCUIT 0 SEE FIGURE Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. raintosource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage I S, R everse rain Current () 0 1 T = 175 C J T = 25 C J V GS = 0V V S, Sourcetorain Voltage (V) I, rain Current () 00 0 OPE RTION IN THIS RE LIMITE BY RS(on) µs 0µs 1ms T C = 25 C T J = 175 C ms Single Pulse V S, raintosource Voltage (V) Fig 7. Typical Sourcerain iode Forward Voltage Fig 8. Maximum Safe Operating rea

5 20 V S R I, rain Current () T C, Case Temperature ( C) Fig 9. Maximum rain Current Vs. Case Temperature R G V GS V Pulse Width 1 µs uty Factor 0.1 %.U.T. Fig a. Switching Time Test Circuit V GS t d(on) t r t d(off) t f % 90% V S Fig b. Switching Time Waveforms V Thermal Response (Z thjc ) = SINGLE PULSE (THERML RESPONSE) Notes: 1. uty factor = t 1/ t 2 2. Peak T J = P M x Z thjc TC t 1, Rectangular Pulse uration (sec) PM t 1 t 2 Fig 11. Maximum Effective Transient Thermal Impedance, JunctiontoCase

6 Fig 12a. Unclamped Inductive Test Circuit I S VS L R G.U.T V IS 2 0V RIVER tp 0.01Ω 15V E S, Single Pulse valanche Energy (mj) I TOP BOTTOM Starting T J, Junction Temperature ( C) Fig 12c. Maximum valanche Energy Vs. rain Current tp V (BR)SS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as.u.t. V Q G 12V.2µF 50KΩ.3µF Q GS Q G.U.T. V S V G V GS 3m Charge I G I Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

7 Peak iode Recovery dv/dt Test Circuit.U.T* ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer V GS R G dv/dt controlled by R G I S controlled by uty Factor "".U.T. evice Under Test V * Reverse Polarity of.u.t for PChannel river Gate rive Period P.W. = P.W. Period [ V GS =V] ***.U.T. I S Waveform Reverse Recovery Current Repplied Voltage Body iode Forward Current di/dt.u.t. V S Waveform iode Recovery dv/dt Inductor Curent Body iode Ripple 5% Forward rop [ V ] [ ] I S *** V GS = 5.0V for Logic Level and 3V rive evices Fig 14. For PChannel HEXFETS

8 2 Pak Package Outline 1.40 (.055) MX..54 (.415).29 (.405) (.185) 4.20 (.165) B 1.32 (.052) 1.22 (.048).16 (.400) RE F (.255) 6.18 (.243) 1.78 (.070) 1.27 (.050) (.6) (.580) 2.79 (.1) 2.29 (.090) 5.28 (.208) 4.78 (.188) 2.61 (.3) 2.32 (.091) 3X 1.40 (.055) 1.14 (.045) 5.08 (.200) 3X 0.93 (.037) 0.69 (.027) 0.55 (.022) 0.46 (.018) 1.39 (.055) 1.14 (.045) 8.89 (.350) RE F (.0) M B M MINIMUM RECOMMENE FOOTPRINT (.450) NOTES: 1 IMENSIONS FTER SOLER IP. 2 IMENSIONING & TOLERNCING PER NSI Y14.5M, CONTROLLING IMENSION : INCH. 4 HETSINK & LE IMENSIONS O NOT INCLUE BURRS. LE SSIGNMENTS 1 G TE 2 R IN 3 S OU RC E 8.89 (.350) 3.81 (.150) (.700) 2.08 (.082) 2X 2.54 (.0) 2X Part Marking Information 2 Pak IN TER NTION L RECTIFIER LOGO SSEMBLY LOT COE F530S B 1M PRT NUMBER TE COE (YYWW ) YY = YER WW = WEEK

9 Package Outline TO262 Outline Part Marking Information TO262

10 Tape & Reel Information 2 Pak TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) (.0145) (.0135) FEE IRECTION TRL 1.85 (.073) 1.65 (.065).90 (.429).70 (.421) (.457) (.449) 16. (.634) (.626) 1.75 (.069) 1.25 (.049) (.609) (.601) (.957) (.941) 4.72 (.136) 4.52 (.178) FEE IRECTION (.532) (.504) (1.079) (.941) (14.173) M X (2.362) MIN. NOTES : 1. CO MFOR MS TO EI CO NTRO LLING IMENSION: MILLIMETER. 3. IMENSIO N HUB. 4. INCLUES FLNGE OUTER EGE (1.039) (.961) (1.197) M X. 4 WORL HEQURTERS: 233 Kansas St., El Segundo, California 90245, Tel: (3) EUROPEN HEQURTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: IR CN: 7321 Victoria Park ve., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) IR GERMNY: Saalburgstrasse 157, Bad Homburg Tel: IR ITLY: Via Liguria 49, 071 Borgaro, Torino Tel: IR FR EST: K&H Bldg., 2F, 304 NishiIkebukuro 3Chome, ToshimaKu, Tokyo Japan 171 Tel: IR SOUTHEST SI: 315 Outram Road, #02 Tan Boon Liat Building, Singapore 0316 Tel: ata and specifications subject to change without notice. 8/97

11 Note: For the most current drawings please refer to the IR website at:

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