D-Pak TO-252AA. I-Pak TO-251AA. 1

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1 l PChannel l Surface Mount (IRFR930) l Straight Lead (IRFU930) l Advanced Process Technology l Fast Switching l Fully Avalanche Rated l LeadFree Description Third Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. G PD 95064A IRFR930PbF IRFU930PbF HEXFET Power MOSFET D S V DSS = 400V R DS(on) = 7.0Ω I D =.8A The DPak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to.5 watts are possible in typical surface mount applications. DPak TO252AA IPak TO25AA Absolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V 0V.8 I T C = 00 C Continuous Drain Current, V 0V. A I DM Pulsed Drain Current 7.2 P C = 25 C Power Dissipation 50 W Linear Derating Factor 0.40 W/ C V GS GatetoSource Voltage ± 20 V E AS Single Pulse Avalanche Energy 92 mj I AR Avalanche Current.8 A E AR Repetitive Avalanche Energy 5.0 mj dv/dt Peak Diode Recovery dv/dt ƒ 24 V/ns T J Operating Junction and 55 to 50 T STG Storage Temperature Range Soldering Temperature, for 0 seconds 300 (.6mm from case ) C Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 2.5 R θja JunctiontoAmbient (PCB mount)** 50 C/W R θja JunctiontoAmbient 0 /0/05

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 400 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.4 V/ C Reference to 25 C, I D = ma R DS(on) Static DraintoSource OnResistance 7.0 Ω V GS = 0V, I D =.A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA g fs Forward Transconductance 0.9 S V DS = 50V, I D =.A I DSS DraintoSource Leakage Current 00 V µa DS = 400V, V GS = 0V 500 V DS = 320V, V GS = 0V, T J = 25 C I GSS GatetoSource Forward Leakage 00 V GS = 20V na GatetoSource Reverse Leakage 00 V GS = 20V Q g Total Gate Charge 3 I D =.A Q gs GatetoSource Charge 3.2 nc V DS = 320V Q gd GatetoDrain ("Miller") Charge 5.0 V GS = 0V, See Fig. 6 and 3 t d(on) TurnOn Delay Time V DD = 200V t r Rise Time 0 I D =.A ns t d(off) TurnOff Delay Time 25 R G = 2Ω t f Fall Time 24 R D = 80Ω, See Fig. 0 Between lead, D L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact S C iss Input Capacitance 270 V GS = 0V C oss Output Capacitance 50 pf V DS = 25V C rss Reverse Transfer Capacitance 8.0 ƒ =.0MHz, See Fig. 5 SourceDrain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol.9 (Body Diode) showing the A I SM Pulsed Source Current integral reverse G 7.6 (Body Diode) pn junction diode. S V SD Diode Forward Voltage 4.0 V T J = 25 C, I S =.A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F =.A Q rr Reverse RecoveryCharge nc di/dt = 00A/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. ) Starting T J = 25 C, L = 57mH R G = 25Ω, I AS =.8 A. (See Figure 2) ƒ I SD.A, di/dt 450A/µs, V DD V (BR)DSS, T J 50 C Pulse width 300µs; duty cycle 2%. This is applied for IPAK, L S of DPAK is measured between lead and center of die contact ** When mounted on " square PCB (FR4 or G0 Material ). For recommended footprint and soldering techniques refer to application note #AN

3 I D, DraintoSource Current (A) 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C V DS, DraintoSource Voltage (V) I D, DraintoSource Current (A) 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V 4.5V 20µs PULSE WIDTH T J = 50 C V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintoSource Current (A) 0 T J = 25 C T J= 50 C V DS= 50V 20µs PULSE WIDTH V GS, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 2.5 I D =.8A V GS = 0V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature 3

4 C, Capacitance (pf) 500 VGS = 0V, f = MHz Ciss = Cgs Cgd, C ds SHORTED Crss = Cgd 400 Coss = Cds Cgd 300 C iss 200 C oss 00 C rss V DS, DraintoSource Voltage (V) V GS, GatetoSource Voltage (V) I = D.A V DS =320V V DS =200V V DS =80V FOR TEST CIRCUIT SEE FIGURE Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage I SD, Reverse Drain Current (A) 0 T J = 50 C T J = 25 C V GS = 0 V V SD,SourcetoDrain Voltage (V) I I D, Drain Current (A) 00 0 OPERATION IN THIS AREA LIMITED BY R DS(on) 0us 00us ms TC = 25 C T = 50 0ms J C Single Pulse V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 4

5 2.0 V DS R D I D, Drain Current (A) T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature R G V GS 0V Pulse Width µs Duty Factor 0. % D.U.T. Fig 0a. Switching Time Test Circuit V GS t d(on) t r t d(off) t f 0% 90% V DS Fig 0b. Switching Time Waveforms V DD 0 Thermal Response (Z thjc ) 0. D = SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J= P DM x Z thjc TC t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase 5

6 Fig 2a. Unclamped Inductive Test Circuit I AS V DS L R G D.U.T V DD IAS A 20V DRIVER tp 0.0Ω 5V E AS, Single Pulse Avalanche Energy (mj) I D TOP 0.49A 0.7A BOTTOM.A Starting T, Junction Temperature ( J C) tp Fig 2c. Maximum Avalanche Energy Vs. Drain Current V (BR)DSS Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 0V Q G 2V.2µF 50KΩ.3µF Q GS Q GD D.U.T. V DS V G V GS 3mA Charge I G I D Current Sampling Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T* ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer V GS R G dv/dt controlled by R G I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD * Reverse Polarity of D.U.T for PChannel Driver Gate Drive Period P.W. D = P.W. Period [ V GS =0V ] *** D.U.T. I SD Waveform Reverse Recovery Current ReApplied Voltage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Ripple 5% Forward Drop [ V DD ] [ ] I SD *** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 4. For PChannel HEXFETS 7

8 DPak (TO252AA) Package Outline Dimensions are shown in millimeters (inches) DPak (TO252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR20 WITH ASS EMBLY LOT CODE 234 ASSEMBLED ON WW 6, 999 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "LeadFree" INTERNATIONAL RECTIFIER LOGO AS S E MBL Y LOT CODE IRFU20 96A 2 34 PART NUMBER DATE CODE YEAR 9 = 999 WEE K 6 LINE A OR INTERNATIONAL RECTIFIER LOGO AS S E MBL Y LOT CODE IRFU PART NUMBER DATE CODE P = DESIGNATES LEADFREE PRODUCT (OPTIONAL) YEAR 9 = 999 WEE K 6 A = ASSEMBLY SITE CODE 8

9 IPak (TO25AA) Package Outline Dimensions are shown in millimeters (inches) IPak (TO25AA) Part Marking Information EXAMPLE: THIS IS AN IRFU20 WITH ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 9, 999 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "LeadFree" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU20 99A PART NUMBER DATE CODE YEAR 9 = 999 WEEK 9 LINE A OR INTERNATIONAL RECTIFIER LOGO AS S E MBLY LOT CODE IRFU PART NUMBER DATE CODE P = DESIGNATES LEADFREE PRODUCT (OPTIONAL) YEAR 9 = 999 WEEK 9 A = ASSEMBLY SITE CODE 9

10 DPak (TO252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA48 & EIA54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA48. 6 mm Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (30) TAC Fax: (30) Visit us at for sales contact information.0/05 0

D-Pak TO-252AA. I-Pak TO-251AA. 1

D-Pak TO-252AA. I-Pak TO-251AA.  1 l Ultra Low OnResistance l PChannel l Surface Mount (IRFR54) l Straight Lead (IRFU54) l Advanced Process Technology l Fast Switching G l Fully Avalanche Rated l LeadFree Description Fifth Generation HEXFETs

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