l Advanced Process Technology

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1 l Advanced Process Technology D l Dynamic dv/dt Rating l 75 C Operating Temperature l Fast Switching l Fully Avalanche Rated G l Ease of Paralleling l Simple Drive Requirements S l Lead-Free Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. PD IRFP260MPbF HEXFET Power MOSFET V DSS = 200V R DS(on) = 0.04Ω I D = 50A The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-28 package because of its isolated mounting hole. TO-247AC Absolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V V 50 I T C = 0 C Continuous Drain Current, V V 35 A I DM Pulsed Drain Current 200 P C = 25 C Power Dissipation 300 W Linear Derating Factor 2.0 W/ C V GS Gate-to-Source Voltage ±20 V E AS Single Pulse Avalanche Energy 560 mj I AR Avalanche Current 50 A E AR Repetitive Avalanche Energy 30 mj dv/dt Peak Diode Recovery dv/dt ƒ V/ns T J Operating Junction and -55 to 75 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (.6mm from case ) Mounting torque, 6-32 or M3 srew lbf in (.N m) Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 0.50 R θcs Case-to-Sink, Flat, Greased Surface 0.24 C/W R θja Junction-to-Ambient /0/

2 IRFP260MPbF Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 200 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.26 V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance 0.04 Ω V GS = V, I D = 28A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA g fs Forward Transconductance 27 S V DS = 50V, I D = 28A I DSS Drain-to-Source Leakage Current 25 V µa DS = 200V, V GS = 0V 250 V DS = 60V, V GS = 0V, T J = 50 C I GSS Gate-to-Source Forward Leakage 0 V GS = 20V na Gate-to-Source Reverse Leakage -0 V GS = -20V Q g Total Gate Charge 234 I D = 28A Q gs Gate-to-Source Charge 38 nc V DS = 60V Q gd Gate-to-Drain ("Miller") Charge V GS = V t d(on) Turn-On Delay Time 7 V DD = 0V t r Rise Time 60 I D = 28A ns t d(off) Turn-Off Delay Time 55 R G =.8Ω t f Fall Time 48 V GS = V Between lead, L D Internal Drain Inductance 5.0 6mm (0.25in.) nh G from package L S Internal Source Inductance 3 and center of die contact C iss Input Capacitance 4057 V GS = 0V C oss Output Capacitance 603 pf V DS = 25V C rss Reverse Transfer Capacitance 6 ƒ =.0MHz D S Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 50 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 200 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage.3 V T J = 25 C, I S = 28A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 28A Q rr Reverse Recovery Charge µc di/dt = 0A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L =.5mH R G = 25Ω, I AS = 28A. ƒ I SD 28A, di/dt 486A/µs, V DD V (BR)DSS, T J 75 C Pulse width 400µs; duty cycle 2%. 2

3 IRFP260MPbF I D, Drain-to-Source Current (A) 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, Drain-to-Source Current (A) 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH T J = 75 C V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) 00 0 T J = 75 C T J = 25 C V DS= 50V 20µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 3.5 I D = 50A V GS= V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 3

4 C, Capacitance(pF) IRFP260MPbF Ciss Coss Crss V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd V GS, Gate-to-Source Voltage (V) I D = 28A V DS= 60V V DS= 0V V DS= 40V V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I SD, Reverse Drain Current (A) 00 0 T J = 75 C T J = 25 C V GS = 0 V V SD,Source-to-Drain Voltage (V) I D, Drain Current (A) 00 0 OPERATION IN THIS AREA LIMITED BY R DS(on) us 0us ms TC = 25 C ms TJ = 75 C Single Pulse 0 00 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 IRFP260MPbF I D, Drain Current (A) I D, Drain Current (A) R D V DS V GS D.U.T. R G V Pulse Width µs Duty Factor 0. % Fig a. Switching Time Test Circuit V DS 90% V - DD T C, Case Temperature ( C) T C, Case Temperature ( C) % V GS t d(on) t r t d(off) t f Fig 9. Maximum Drain Current Vs. Case Temperature Fig b. Switching Time Waveforms Thermal Response(Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t Peak T J= P DM x Z thjc TC t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5

6 IRFP260MPbF 5V V DS L DRIVER R G D.U.T IAS - V DD A 20V tp 0.0Ω Fig 2a. Unclamped Inductive Test Circuit V (BR)DSS tp E AS, Single Pulse Avalanche Energy (mj) TOP BOTTOM I D A 20A 28A Starting T, Junction Temperature ( J C) Fig 2c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF V Q GS Q GD D.U.T. V - DS V GS V G 3mA Charge Fig 3a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 3b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit IRFP260MPbF D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4. For N-Channel HEXFETS 7

8 IRFP260MPbF TO-247AC Package Outline (Dimensions are shown in millimeters (inches)) ( ( 4 ( ; ' % / / 6(( 9,(:% [E [E % F E H [ /('7,3 3 % 6 ' 9,(:% 7(50/3' 3/7,* %6(0(7/ ( F % 9,(: EEE 6(&7,2&&''(( TO-247AC Part Marking UCDTDT6IDSAQ@" XDUC6TT@H7G` Q6SUIVH7@S GPU8P9@%& DIU@SI6UDPI6G 6TT@H7G@9PIXX"! DIUC@6TT@H7G`GDI@C S@8UDAD@S GPBP,5)3( 96U@8P9@ I r)qv h r iy yv rƒ v v v qvph r GrhqA rr 6TT@H7G` GPU8P9@ `@6S 2! X@@F" GDI@C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information.03/20 8

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