D 2 Pak TO

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1 l Logic-Level Gate Drive l dvanced Process Technology l Surface Mount (IRLZ24NS) l Low-profile through-hole (IRLZ24NL) l 75 C Operating Temperature l Fast Switching l Fully valanche Rated l Lead-Free Description PD IRLZ24NSPbF IRLZ24NLPbF HEXFET Power MOSFET V DSS = 55V R DS(on) = 0.06Ω I D = 8 Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D 2 Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D 2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRLZ24NL) is available for lowprofile applications. D 2 Pak TO-262 bsolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V 0V 8 I T C = 00 C Continuous Drain Current, V 0V 3 I DM Pulsed Drain Current 72 P = 25 C Power Dissipation 3.8 W P C = 25 C Power Dissipation 45 W Linear Derating Factor 0.30 W/ C V GS Gate-to-Source Voltage ±6 V E S Single Pulse valanche Energy 68 mj I R valanche Current E R Repetitive valanche Energy 4.5 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and -55 to 75 T STG Storage Temperature Range Soldering Temperature, for 0 seconds 300 (.6mm from case ) C Thermal Resistance Parameter Typ. Max. Units R θjc R θj Junction-to-Case Junction-to-mbient ( PCB Mounted,steady-state)** C/W 07/20/04 G D S

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 55 V V GS = 0V, I D = 250µ V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.06 V/ C Reference to 25 C, I D = m V GS = 0V, I D = R DS(on) Static Drain-to-Source On-Resistance Ω V GS = 5.0V, I D = 0.05 V GS = 4.0V, I D = 9.0 V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µ g fs Forward Transconductance 8.3 S V DS = 25V, I D = I DSS Drain-to-Source Leakage Current 25 V DS = 55V, V GS = 0V µ 250 V DS = 44V, V GS = 0V, T J = 50 C I GSS Gate-to-Source Forward Leakage 00 V GS = 6V n Gate-to-Source Reverse Leakage -00 V GS = -6V Q g Total Gate Charge 5 I D = Q gs Gate-to-Source Charge 3.7 nc V DS = 44V Q gd Gate-to-Drain ("Miller") Charge 8.5 V GS = 5.0V, See Fig. 6 and 3 t d(on) Turn-On Delay Time 7. V DD = 28V t r Rise Time 74 I D = ns t d(off) Turn-Off Delay Time 20 R G = 2Ω, V GS = 5.0V t f Fall Time 29 R D = 2.4Ω, See Fig. 0 L S Internal Source Inductance 7.5 nh Between lead, and center of die contact C iss Input Capacitance 480 V GS = 0V C oss Output Capacitance 30 pf V DS = 25V C rss Reverse Transfer Capacitance 6 ƒ =.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 8 (Body Diode) showing the G I SM Pulsed Source Current integral reverse 72 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage.3 V T J = 25 C, I S =, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = Q rr Reverse Recovery Charge nc di/dt = 00/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. ) V DD = 25V, starting T J = 25 C, L = 790µH R G = 25Ω, I S =. (See Figure 2) ƒ I SD, di/dt 290/µs, V DD V (BR)DSS, T J 75 C Pulse width 300µs; duty cycle 2%. Uses IRLZ24N data and test conditions ** When mounted on " square PCB ( FR-4 or G-0 Material ). For recommended footprint and soldering techniques refer to application note #N

3 I D, Drain-to-Source Current () 00 0 VGS TOP 5V 2V 0V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 2.5V 20µs PULSE WIDTH 0. T J = 25 C V DS, Drain-to-Source Voltage (V) I D, Drain-to-Source Current () 00 0 VGS TOP 5V 2V 0V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 2.5V 20µs PULSE WIDTH 0. T J = 75 C V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current () 00 0 T = 25 C J T = 75 C J V DS= 5V 20µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) I D = 8 V GS = 0V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 3

4 C, Capacitance (pf) V GS = 0V, f = MHz C iss = C gs C gd, C ds SHORTED C rss = Cgd C oss = C ds Cgd C iss C oss C rss V GS, Gate-to-Source Voltage (V) I D = V DS = 44V V DS = 28V V DS, Drain-to-Source Voltage (V) 0 FOR TEST CIRCUIT SEE FIGURE Q, Total Gate Charge (nc) G Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I SD, Reverse Drain Current () 00 0 T = 75 C J T = 25 C J I D, Drain Current () OPERTION IN THIS RE LIMITED BY RDS(on) 0µs 00µs V GS = 0V V SD, Source-to-Drain Voltage (V) T C = 25 C ms T J = 75 C Single Pulse 0ms 0 00 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating rea 4

5 20 V DS R D I D, Drain Current (mps) T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 0a. Switching Time Test Circuit V DS 90% R G V GS 5.0V Pulse Width µs Duty Factor 0. % D.U.T. 0% V GS t d(on) t r t d(off) t f Fig 0b. Switching Time Waveforms - V DD 0 Thermal Response (Z thjc ) 0. D = SINGLE PULSE (THERML RESPONSE) 2. Peak T J = P DMx Z thjc T C t, Rectangular Pulse Duration (sec) Notes:. Duty factor D = t / t 2 P DM t t 2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5

6 L V DS D.U.T. R G V - DD 5.0 V I S t p 0.0Ω Fig 2a. Unclamped Inductive Test Circuit V (BR)DSS t p V DD E S, Single Pulse valanche Energy (mj) I D TOP BOTTOM V DD = 25V Starting T J, Junction Temperature ( C) V DS I S Fig 2b. Unclamped Inductive Waveforms Fig 2c. Maximum valanche Energy Vs. Drain Current Current Regulator Same Type as D.U.T. 50KΩ 0 V Q GS Q G Q GD 2V.2µF.3µF D.U.T. V - DS V G V GS 3m Charge I G I D Current Sampling Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =0V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-pplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4. For N-Channel HEXFETS 7

8 D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information T HIS IS N IRF530S WIT H LOT CODE 8024 SS EMBLED ON WW 02, 2000 IN THE SSEMBLY LINE "L" Note: "P" in as s embly line pos ition indicates "L ead-f ree" OR INTERNTIONL RECT IFIER LOGO SSEMBLY LOT CODE F530S PRT NUMBER DT E CODE YER 0 = 2000 WEEK 02 LINE L INTE RNT IONL RECTIFIER LOGO SSEMBLY LOT CODE F530S PRT NUMBER DTE CODE P = DESIGNTES LED-FREE PRODUCT (OPTIONL) YER 0 = 2000 WEEK 02 = SS EMBLY SIT E CODE 8

9 TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXMPLE: THIS IS N IRL303L LOT CODE 789 S S E MBLED ON WW 9, 997 IN THE SSEMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "L ead-f ree" OR INTERNTIONL RECTIFIER LOGO S SEMBLY LOT CODE PRT NUMBER DT E CODE YE R 7 = 997 WEEK 9 LINE C INTERNTIONL RECTIFIER LOGO SSEMBLY LOT CODE PRT NUMBER DTE CODE P = DESIGNTES LED-FREE PRODUCT (OPTIONL) YER 7 = 997 WEEK 9 = S S E MB L Y S IT E CODE 9

10 D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR.60 (.063).50 (.059) 4.0 (.6) 3.90 (.53).60 (.063).50 (.059) (.045) (.035) FEED DIRECTION TRL.85 (.073).65 (.065) 0.90 (.429) 0.70 (.42).60 (.457).40 (.449) 6.0 (.634) 5.90 (.626).75 (.069).25 (.049) 5.42 (.609) 5.22 (.60) (.957) (.94) 4.72 (.36) 4.52 (.78) FEED DIRECTION 3.50 (.532) 2.80 (.504) (.079) (.94) (4.73) MX (2.362) MIN. NOTES :. COMFORMS TO EI CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION HUB. 4. INCLUDES FLNGE OUTER EDGE (.039) (.96) (.97) MX. 4 Data and specifications subject to change without notice. IR WORLD HEDQURTERS: 233 Kansas St., El Segundo, California 90245, US Tel: (30) TC Fax: (30) Visit us at for sales contact information. 07/04 0

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