Three Port Converter Topology for grid interfacing of Renewable Energy Sources

Transcription

1 Internatinal Jurnal f Advanced Infrmatin Science and Technlgy (IJAIST) ISSN: 2319:2682 l.30, N.30, Octber 2014 Three Prt Cnverter Tplgy fr grid interfacing f Renewable Energy Surces Christy Mary Jacb Electrical and Electrnics Department,Saintgits Cllege Of Engineering,Pathamuttm,Kttayam, Kerala, Ina christymary30@gmail.cm Jisha James Electrical and Electrnics Department,Saintgits Cllege Of Engineering,Pathamuttm,Kttayam, Kerala, Ina jishajamesm@gmail.cm Abstract- The systematic methd fr deriving a three prt cnverter frm a full bridge cnverter is scussed in this paper. This methd splits the tw switching legs f the FBC int tw switching cells and cnnect it t fferent surces. The FB-TPC cnsists f tw birectinal prts and an islated utput prt. The primary circuit f the cnverter functins as a buck-bst cnverter.the prpsed dc-dc cnverter can adapt t applicatin with a wide surce vltage range. The prpsed cnverters has the advantages such as it ffers simple tplgies and cntrl, and als it requires nly a less n f devices such that grid interfacing f the dc-dc cnverter is nt cmplex.the MATAB/SIMUINK is used fr the sftware implementatin. Key wrds: Pht-ltaic (P), Bst-buck, dc-dc cnverter, full-bridge cnverter (FBC), renewable pwer system, three-prt cnverter (TPC),zer vltage switching(zs),space vectr pulse wih mdulatin(spwm). I. INTRODUCTION Nwadays the use f Renewable energy surces such as fuel cells, phtvltaic (P) arrays are increasing day by day. But they are fluctuating in nature. Inrder t vercme this prblem an energy strage device is incrperated.a dc-dc cnverter is required t interface renewable resurces, strage and lads.recently cnventinal cnverters are replaced by thre prt cnverters which can interface multiple surces simultaneusly. cnventinal structure [2]-[3]requires many cnversin stages t intercnnect multiple surces.it is inherently cmplex and has a high cst.three tplgy fr multiprt cnveters are Fully islated tplgies,fully nn-islated tplgies andpartly islated tplgies. In Fully islated tplgy islatin, birectinal capabilities f all the prts and zer-vltage-switching (ZS) can be achieved. But it has t many active switches and the circuit is mre cmplex.[10],[13],[14].in fully Nn-islated tplgy [15],[16] it has cmpact design and high-pwer density. But the drawback is that vltage levels f all prts are nt flexible and ZS is nt easy. In Partly islated tplgy [2],[5],[17],[18] it can prvide necessary islatin fr the lad and vltage level are flexible. Als has advantages such as cmpact design and high pwer density. This paper is rganized as fllws. In sectin II scusses abut the derivatin f three prt cnverter and sectin 111 explains abut the verall blck agram.sectin 1 explains the circuit agram and peratin f the FB-TPC.cntrl strategy f three prt cnverteris scussed in sectin.sectin 1 explains grid interfacing f FB-TPC.simulatin results are explained in sectin 11.finally cnclusin and future scpe will be given in sectin 111 and 1X. II.DERIATION OF THREE PORT CONETER In the Fig.1(a), the primary side f the FBC is cnnected t a vltage surce s and has tw switching legs with switches S A1, S A2 and S B1, S B2. The cnstraint cntin fr peratin f FBC in the primary side is vltage-secnd balance principle f the magnetizing inductr m.therefre the tw switching legs f the FBC can a be split int tw switching cells A and B, as shwn in Fig.1(b). These tw cells can be rectly cnnected t fferent surces, sa and sb, respectively, as shwn in Fig.1(c).thus a TPC is derived frm a FBC. (a) 150

2 Internatinal Jurnal f Advanced Infrmatin Science and Technlgy (IJAIST) ISSN: 2319:2682 l.30, N.30, Octber 2014 I.CIRCUIT DIAGRAM AND OPERATION OF THE FB-TPC The peratin f the FB-TPC can be analysed with Fig.3. (b) Fig. 3 prpsed FB-TPC (c) Fig.1 derivatin f FB_TPC (a) Full-bridge Cnverter. (b) Tw-switching cells. (c) Full-bridge three-prt cnverter In FB-TPC tplgy bth sa and sb can supply pwer t the grid.a buck bst cnveter is integrated in the prpsed FB-TPC.It can adapt t applicatin with a wide surce vltage ranges.zs f all the primary side switches can als be btained with the prpsed tplgy. In a three prt cnverter a single stage pwer cnversin any tw f the three prts and als a high level f integratin can be achieved. III.OERA BOCK DIAGRAM P cell and battery are cnnected t tw surce prts f the three prt cnveter and utput prt is cnnected t the three phase dc dc cnverter.the three phase utput f the dc-dc cnveter is cnnected t the grid. The tw surce prts are cnnected t P cell and battery and utput prt is cnnected t the inverter. Fr a stand-alne P pwer systems there are three pwer flws 1) frm P t lad; 2) frm P t battery; and 3) frm battery t lad. The FB-TPC has three pssible peratin mdes: (1) In dual-utput (DO) mde, with p p,,slar pwer is greater s bth lad and battery absrbs pwer frm P. (2) In dual-input (DI) mde, with p p and p > 0, bth P and battery give pwer t the lad. (3) In single-input single-utput (SISO) mde,with p = 0, the battery supplies the lad pwer alne. When p = p exactly, the slar supplies the lad pwer alne and the cnverter perates in a bundary state f DI and DO mdes. This state can either be treated as DI r DO mde. Fr simplicity, the fllwing assumptins are made: 1) During steady state C, Cb and C are large enugh and the vltage f three prts,b and are cnstant 2) b case is taken fr the switching state analysis. There are fur switching states in ne switching cycle.each f the fur states are explained belw with keywavefrm and circuit agram in fig(4)and (5). Fig.2Overall blck agram Fig.4wavefrms ffb-tpc 151

3 Internatinal Jurnal f Advanced Infrmatin Science and Technlgy (IJAIST) ISSN: 2319:2682 l.30, N.30, Octber 2014 State I [t0 t1]:sa2 AND SB2 are ON and SA1 and SB1 are OFF befre t. But at t SA1 turns ON and SA2 turns OFF.Psitive vltage appear acrss the primary winng f transfrmer. i p m i Fig 5(a)-Equivalent circuits f switching state [t0, t1] m m n ni (2) i m i Fig 5(c)-Equivalent circuits f switching state [t2, t3] m b nb ni p m (4) State I [t3 t4]: At t3 S B1 turns OFF and S B2 turns ON. vltage acrss the primary winng is clamped at zer. State II [t1 t2 ]: At t1, S B2 turns OFF and S B1 turns ON. A psitive vltage is applied acrss the primary winng f the transfrmer. Fig 5(d)-Equivalent circuits f switching state [t3, t4] i p m i m Fig 5(b)-Equivalent circuits f switching state [t1, t2] n( m ni b ) b State III [t2 t3]: S A2 turns ON and S A1 turns ff at t2. Acrss the primary winng f the transfrmer a negative vltage is applied. (3) m 0 (5) T the magnetizing inductr f the transfrmer m, and the utput filter inductr,when Applying the vltsecnd balance principle, we have: DB 1 b D A! n[ D 1 D2 ( b ) D3 b] 2nD 3 b (6) The equivalent duty cycles f States I III,are represented by D 1 D 3. D 3 is the verlapped sectin f the driven signal fr S A1 and S B2. D A1 and D B1 are the duty cycles f S A1 and S B1 in the steady state. By fllwing the same analysis fr the < b case, utput vltage can be given by n[ D 1 D2 ( b ) D3 b] 2nD1 (7) The vltage f the P surce can be regulated with D A1 and D B1 fr the maximum pwer pint tracking (MPPT), taking the battery vltage b as cnstant and the utput vltage can be tightly regulated with D 1 and D

4 Internatinal Jurnal f Advanced Infrmatin Science and Technlgy (IJAIST) ISSN: 2319:2682 l.30, N.30, Octber CONTRO STRATEGY OF THREE PORT CONETER 1.GRID INTERFACING OF FB-TPC Renewable pwer generated are cnnected t the grid by means f cnverters.grid means intercnnected substatins.here the dc utput f the slar panel and battery is cnverted t ac by means f a inverter.the utput f the inverter is interfaced with the grid.the SPWM technique is used fr the gating signal generatin f the inverter.thus a 230v utput vltage is fed t the grid.the space vectr methd is a d-q mdel pwm methd.the blck agram f the inverter sectin is shwn in the fig(8). Fig 6-Cntrl agram The gating signals fr the switches are generated by cntrlling the utput and input side f the three prt cnverter.a clsed cntrl architecture is used here.the bjective is t regulate the utput vltage and prevent utput lad transitins frm affecting the peratin f the cnverter.the cntrl scheme simultaneusly regulate P pwer t achieve MPPT r battery charging cntrl and als the utput vltage. The basic cntrl agram is shwn in fig(6). Fr the FB-TPC sinusidal Pulse wih mdulatin scheme can be applied.the prpsed PWM scheme is shwn in Fig. 8, where tri is the peak-t-peak value f the carrier vltage v tri, and v c1, v c2 are cntrl vltages. In prpsed PWM scheme, when v >v b, as shwn in Fig. 7, there are nly three switching states, states II I, in ne switching cycle. By regulating the turned OFF time f SA1 with v c1, the P pwer can be cntrlled t get the MPPTr battery charging cntrl. By adjusting turn OFF time f SB 1 with v c2 utput side vltage v can be cntrlled.when v decreases, as shwn in Fig. 7, and there are three switching states, I III.PID cntrller is used t generate cntrl vltages v c1 and v c2. I Fig.8 Blck agram f the inverter 11. SIMUATION RESUTS The MATAB (R2011a) is used fr the simulatin f the prject. Overall Simulink mdel is shwn in Fig(9).mdel f FB-TPC is shwn in the Figure (10).The P and battery vltage is adjusted between 38-76and respectively. Switching frequency is 100 KHz. Output vltage f FB-TPC is maintained at 42. Fig.9 MATAB/Simulink mdel f the grid cnnected cnverter Fig. 7-PWM scheme fr the FB-TPC [1]. Fig 10-MATAB/Simulink mdel f the FB-TPC 153

5 Internatinal Jurnal f Advanced Infrmatin Science and Technlgy (IJAIST) ISSN: 2319:2682 l.30, N.30, Octber 2014 The drain t surce vltage and driving vltage f the switches,in DO mde is shwn in the fig.11.it incates that all switches are turned n at ZS. f the full bridge cnverter int tw cells and cnnecting them t fferent surces. A buck bst cnverter is als integrated in the full bridge three prt cnverter, which helps t handle a wide surce vltage range. The cntrl scheme prpsed here has tw feedback cntrl lps which simultaneusly regulate P pwer t achieve MPPT and the utput vltage. The utput f the dc-dc cnverter is inverted and is fed t the grid. Simulatin results validated the effectiveness f the prpsed cnverter. The prpsed cnverter has the advantages such as it ffers simple tplgy and cntrl, reduce number f devices and single stage pwer cnversin between any tw f three prts. It is suitable fr renewable pwer system with vary ver a wide range. II. SCOPE FOR FUTURE STUDY The principle f three prt cnverters can be extended t fur-prt r multi-prt cnverters. The analysis and cntrl methds and designing fr such cnfiguratins have t be explred. Fig.11 Driving vltage and drain t surce vltage Output vltage f the cnverter is shwn in the fig.12,which is maintained at 42. Fig.12 utput f FB-TPC Output f the inverter which is cnnected t the grid is shwn in the fig utput vltage is fed t the grid. Fig 13-Output f the inverter. I11.CONCUSION A Systematic methd fr generating a three prt cnverter is scussed in this paper. The three prt cnverter is develped by splitting the tw switching legs REFERENCES [1] Hngfei Wu,, Kai Sun, Runru Chen, Haibing Hu, Member, IEEE,and Yan Xing, Full-Bridge Three-Prt Cnverters With Wide Input ltage Range fr Renewable Pwer Systems IEEE Transactins On Pwer Electrnics, l. 27, N. 9, September 2012 [2] H.Wu, R. Chen, J. Zhang, Y. Xing, H. Hu, and H. Ge, A family f threeprt half-bridge cnverters fr a stand-alne renewable pwer system, IEEE Trans. Pwer Electrn., vl. 26, n. 9, pp , Sep [3] H. Ta, A. Ktspuls, J.. Duarte, and M. A. M. Hendrix, Family fmultiprt birectinal dc-dc cnverters, Inst. Electr. Eng. Prc. Elect.Pwer Appl., vl. 153, n. 15, pp , May [4] S. Falcnes and R. Ayyanar, Simple cntrl design fr a three-prt DCDC cnverter based P system with energy strage, presented at the IEEE Appl. Pwer Electrn. Cnf., Palm Springs, CA, [5] Z. Wang and H. i, Integrated MPPT and birectinal battery charger fr P applicatin using ne multiphase interleaved three-prt DC-DC cnverter, in Prc. 26th IEEE Appl. Pwer Electrn. Cnf. Exp., 2011,pp [6] D. Xu,C. Zha, andh. Fan, APWM plus phase-shift cntrl birectinaldc-dc cnverter, IEEE Trans. Pwer Electrn., vl. 19, n. 5, pp , May 2004 [7] S. Waffler and J. W. Klar, A nvel lw-lss mdulatin strategy fr high-pwer birectinal Buck+Bst cnverters, IEEE Trans. Pwer Electrn., vl. 24, n. 6, pp , Jun [8] A. Kwasinski, Quantitative evaluatin f DC micrgrids availability:effects f system architecture and cnverter tplgy design chices, IEEE Trans. Pwer Electrn., vl. 26, n. 3, pp , Mar [9]. Sler, A. idzzi, and J. A. Pmili, Design f multiple-input pwer cnverter fr hybrid vehicles, in Prc. IEEE Applied Pwer Electrnics Cnference and Expsitin (APEC 04), Anaheim, Califrnia, Feb. 2004, pp [10] H. Ta, J.. Duarte, and A. M. Marcel, Three-prt triple-halfbridge birectinal cnverter with zer-vltage switching, IEEE Trans. PwerElectrn., vl. 23, n. 2, pp , Mar [11] H. Ta, A. Ktspuls, J.. Duarte, and M. A. M. Hendrix, Multi-input birectinal DC-DC cnverter cmbining DC-link and magnetic-cupling fr fuel cell systems, in Prc. IEEE Industry Applicatin Sciety Cnference and Annual Meeting (IAS 05), Hng Kng,China, Oct. 2005, pp [12] G. J. Su and F. Z. Peng, A lw cst, triple-vltage bus DC-DC cnverter fr autmtive applicatins, in Prc. IEEE Applied Pwer 154

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