(c) Compute the maximum instantaneous power dissipation of the transistor under worst-case conditions. Hint: Around 470 mw.
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1 Hmewrk b ECE (F) 8 prblems fr 00 pts Due Oct A. Unidirectinal Current Bster Analysis ) Cnsider the current bster shwn in Fig.. Assume an ideal p amp with V CC = 9V. The transistr is a N904, and use data sheet values at C. NOTE: Yu want t use h FE (e.g. DC current gain, r pulsed current gain) rather than h fe (e.g. small signal AC current gain). (a) Use the Glden Rules t determine V OUT /V IN. (b) The input vltage is V IN = 00 mv and the lad is R L = 00 hm. Cmpute V OUT and I LOAD. (c) Cmpute the typical and wrst-case (max) p amp utput current. Express yur answers in ma. (d) Cmpute the wrst-case (max) transistr pwer dissipatin in mw. Hint: Arund 00 mw. (e) Des the transistr need a heat sink? 0kΩ 9kΩ Fig. : is a cnstant vltage. ) Cnsider the current bster shwn in Fig.. The input is a 0V PP triangle wave and the lad is R L = 00 hm. Assume an ideal p amp with +/-V CC = +/-V. The transistr is a N440. (a) Sketch V IN, V OUT, and I LOAD. Label imprtant features (e.g. maximum and minimum V OUT ). (b) Cmpute the typical and wrst-case (max) p amp utput current fr V IN = V. Express yur answers in ma. NOTE: The N440 data sheet uses nrmalized h FE, which is kind f annying. Assume a nrmalized value f is equivalent t h FE = 0. +V -V Fig. : is a triangle wave. (c) Cmpute the maximum instantaneus pwer dissipatin f the transistr under wrst-case cnditins. Hint: Arund 470 mw. t 00kΩ 00kΩ
2 B. Push-Pull Analysis ) We ve seen hw a Class B push-pull stage (by itself) suffers frm crssver distrtin fr analg signals. Hwever, ttem-ple stages wrk extremely well fr digital signals. Suppse V IN is a % duty cycle square wave (see Fig. ) that alternates between +V (HIGH) and -V (LOW). These vltage levels are typical f RS- cmmunicatin lines. The lad is R L = 7 hm. The transistrs are N440 and N440. (a) Yu must chse between V CC =,, r 8V. Explain which value is the best chice. (b) Sketch V IN, V OUT, i E ( emitter current), and i E ( emitter current). Assume typical values fr V BE frm the data sheet. Yu can assume the N904 and N90 have identical V BE. Label imprtant features. t Vut (c) Given yur chice f V CC, estimate the pwer dissipatin in and assuming max V BE and wrst-case h FE. Hint: Smething arund 0 mw and 0 mw fr and, respectively. (d) Suppse yu nly had V CC = V. Cmpute the wrst-case pwer dissipatin in and. Fig. : is a square wave with % duty cycle. 00Ω 4) Cnsider the push-pull stage shwn in Fig. 4. V IN is a V PP sine wave. The pwer supplies are +/- V CC = +/- 8V. Bth dides have V F = 0.7V. Bth pwer transistrs have V BE,ON =.V, V CE,SAT = V, and = 40. D 0.Ω Vlad (a) Cmpute the minimum R L that can be driven withut distrtin (i.e. n transistr saturatin r cut-ff). HINT #: The current thrugh the 00 hm resistr is minimum when is maximum. D 0.Ω HINT #: Yu shuld get min R L near hm. 00Ω (b) Assuming R L = hm, what is the effective input impedance R IN f the push-pull stage? Hint: Arund 47 hm. Fig. 4: V IN is a V PP sine wave. ) Cnsider the Class AB current bster in Fig.. The input vltage is a V PP sine wave at khz, the minimum lad is R L = 0 hm. The p amp utput swing is shwn in the plt belw. Bth dides have V F = 0.7V. Bth transistrs have V BE,ON = 0.7V, V CE,SAT = 0.V, and = 00. (a) Cmpute the maximum lad vltage and current (e.g. assume the entire circuit wrks prperly). (b) What is the minimum V CC necessary t prvide enugh base current t when V LOAD is maximum? (c) Cmpute the peak p amp utput current. (d) Yu must chse between V CC =, 9,, r V. Explain yur chice.
3 Fig. : (Left) Op amp with Class AB utput stage. (Right) Op amp max utput swing. C. Push-Pull Design ) Design a nn-inverting vltage amplifier based n an p amp and Class B current bster (see Fig. ). The design requirements are the fllwing: Vltage gain is G + db The signal is a PWM wavefrm (e.g. it is NOT sinusidal). The amplifier can drive 00 mw int a 7 hm lad when the PWM duty cycle is 00% (e.g. DC signal). The design cnstraints are the fllwing: LF4CN R Fig. : Nn inverting p amp with ttem ple stage. must be a N904, N440, r TIP transistr. NOTE: The pnp versins are the N90, N440, and TIP. V CC must be 4.,, 9, r V. The p amp is the LF4. All resistrs are standard % tlerance. (a) Chse and explain why. Shw all wrk! Assume the pnp versins have cmparable prperties. (b) Chse V CC and prve that the transistrs and p amp can perfrm prperly. Shw all wrk! NOTE: The V headrm is a sft rule, s it is OK if yu reduce it by half a vlt r s. (c) Assuming the amplifier is driving 00 mw int a 7 hm lad, cmpute the wrst-case pwer dissipatin f the transistr that is n. (d) Are heat sinks necessary fr the transistrs?
4 7) Design an inverting vltage amplifier based n an p amp and Class AB stage (see Fig. 7). The design requirements are the fllwing: Drive 00 mw int a 0 hm lad. The input signal is a sine wave with a maximum amplitude f V PP. The input impedance must be R IN 0 khm. The lw frequency cut-ff is < 00 Hz. The design cnstraints are the fllwing: must be a N904, N440, r TIP transistr. NOTE: The pnp versins are the N90, N440, and TIP. V CC must be 4.,, 9, r V. Use an LM74 p amp and dides. All resistrs are standard % tlerance. C OUT must be, 0, 47, 00, r 470 uf. (a) Chse and explain why. Shw all wrk! Assume the pnp versins have cmparable prperties. (b) Chse V CC and explain why. Shw all wrk! NOTE: The V headrm is a sft rule, s it is OK if yu reduce it by half a vlt r s. (c) Chse RB and RB. Pick standard % values. (d) Shw that the p amp can prvide the required utput vltage and current. If it des nt, then yu must increase V CC t a higher value and repeat part (c) and (d). (e) Chse and R. Remember that R IN = fr an inverting amplifier. R shuld be kept belw Mhm. (f) Chse C OUT. Shw all wrk! RB D LM74CN D Cut RB R Fig. 7: Inverting amplifier with Class AB utput stage.
5 8) Design a nn-inverting vltage amplifier t drive a DC mtr. The design requirements are the fllwing: The DC mtr is rated at V with a stall current f 900 ma. The input signal is a DC vltage between -0.V and +0.V. The design cnstraints are the fllwing: must be a MPSA9, TIP0, r TIP00 Darlingtn transistr (see Fig. 8). NOTE: The pnp versins are the MPSA, TIP, and TIP0. V CC must be 4.,, 9, r V. The p amp is the LF. All resistrs are standard % tlerance. (a) Chse and explain why. Shw all wrk! Assume the pnp versins have cmparable prperties. (b) Chse V CC and explain why. Shw all wrk! NOTE: The V headrm is a sft rule, s it is OK if yu reduce it by half a vlt r s. (c) Chse RB and RB. Pick standard % values. (d) Shw that the p amp can prvide the required utput vltage and current. If it des nt, then yu must increase V CC t a higher value and repeat part (c) and (d). Hint: It is OK t treat the mtr as a simple resistr fr this prblem (in general this is a terrible apprximatin). (e) Chse and R. R shuld be kept belw Mhm. RB D LFN D D D4 MOTOR RB R Fig. 8: Nn inverting amplifier with Darlingtn Class AB utput stage.
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