ANALOG-TO-DIGITAL (ADC) & DIGITAL-TO-ANALOG (DAC) CONVERTERS

Transcription

1 ANALOG-TO-DIGITAL (ADC) & DIGITAL-TO-ANALOG (DAC) CONVERTERS 37

2 Many events mnitred and cntrlled by the micrprcessr are analg events. ADC & DAC CONVERTERS These range frm mnitring all frms f events, even speech, t cntrlling mtrs and like devices. These devices are used t interface the micrprcessr t the analg wrld. The DAC0830 Digital-t-Analg Cnverter A fairly cmmn and lw-cst digital-t-analg cnverter is the DAC0830. (Natinal Semicnductr Crp.) An 8-bit cnverter that transfrms an 8-bit binary number int an analg vltage. Other cnverters are available that cnvert frm 10-, 12-, r 16-bit binary numbers int analg vltages. 38

3 The DAC0830 Digital-t-Analg Cnverter The number f vltage steps generated by the cnverter is equal t the number f binary input cmbinatins. ADC & DAC CONVERTERS an 8-bit cnverter generates 256 vltage levels a 10-bit cnverter generates 1024 levels 39

4 The DAC0830 Digital-t-Analg Cnverter The DAC0830 is a medium-speed cnverter that transfrms a digital input t an analg utput in apprximately 1.0 µs. The device has eight data bus cnnectins fr the applicatin f the digital input cde. Analg utputs labeled IOUT1 & IOUT2 are inputs t an external peratinal amplifier. Because this is an 8-bit cnverter, its utput step vltage is defined as VREF (reference vltage), divided by 255. the step vltage is ften called the reslutin f the cnverter. Fr VREF=-5.1v, find the utput fr

5 The DAC0830 Digital-t-Analg Cnverter 41

6 The DAC0830 Digital-t-Analg Cnverter This device cntains tw internal registers. the first is a hlding register the secnd cnnects t the R 2R internal ladder cnverter The tw latches allw ne byte t be held while anther is cnverted. The first latch is ften disabled and the secnd fr entering data int the cnverter. Bth latches within the DAC0830 are transparent latches. when G input is lgic 1, data pass thrugh when G input becmes lgic 0, data are latched 42

7 The DAC0830 Digital-t-Analg Cnverter The utput f the R 2R ladder within the cnverter appears at IOUT1 and IOUT2. These utputs are designed t be applied t an peratinal amplifier such as a 741 r similar device. 43

8 Example: Cnnecting the DAC0830 t the Micrprcessr. The DAC0830 is decded at I/O prt address 20H. when an OUT 20H,AL instructin is executed, cntents f data bus cnnectins AD0 AD7 are passed t the cnverter in the DAC0830 Address Decder 20H 44

9 The ADC080X Analg-t-Digital Cnverter A cmmn, lw-cst ADC, cmpatible with a wide range f micrprcessrs. while there are faster ADCs available with mre reslutin, this device is ideal fr applicatins that d nt require a high degree f accuracy ADC080X requires up t 100 µs t cnvert an analg input vltage int a digital utput cde. T perate the cnverter, the WR pin is pulsed with CS grunded t start the cnversin prcess. 45

10 The ADC080X Analg-t-Digital Cnverter timing diagram shws the interactin f the cntrl signals. If a time delay is used that allws at least 100 µs f time, there is n need t test INTR pin. Anther ptin is t cnnect the INTR pin t an interrupt input, s when the cnversin is cmplete, an interrupt ccurs. 46

11 The ADC080X Analg-t-Digital Cnverter Befre ADC0804 can be cnnected, the tw analg inputs must be understd: VIN(+) and VIN( ) These differential inputs are summed by the peratinal amplifier t prduce a signal fr the internal analg-t-digital cnverter. These inputs are cnnected t an internal peratinal amplifier 47

12 The ADC080X Analg-t-Digital Cnverter Generating the Clck Signal: ADC0804 requires a clck surce t perate. It can be an external clck applied t CLK IN pin r can be generated with an RC circuit. permissible range f clck frequencies is 100KHz-1460 KHz. desirable t use a frequency as clse as pssible t 1460 KHz s cnversin time is minimized If generated with an RC circuit, CLK IN and CLK R pins are cnnected t an RC circuit 48

13 The ADC080X Analg-t-Digital Cnverter ADC0804 interfaced t an 8086 VREF is nt attached t anything, which is nrmal 49

14 The ADC080X Analg-t-Digital Cnverter ADC0804 interfaced t an

15 Using the ADC0804 and the DAC0830 This illustrates an example using an ADC0804 and a DAC0830 t capture and replay audi signals r speech. a speech synthesizer has been used in the past t generate speech, but quality was pr Fr human quality speech, we can use an ADC0804 t capture an audi signal and stre it fr later playback thrugh a DAC

16 Using the ADC0804 and the DAC0830 Address Decder 20H 52

17 Using the ADC0804 and the DAC0830 This illustrates an example using an ADC0804 and a DAC0830 t capture and replay audi signals r speech. a speech synthesizer has been used in the past t generate speech, but quality was pr Fr human quality speech, we can use an ADC0804 t capture an audi signal and stre it fr later playback thrugh a DAC