Analysis and Optimized Design of a Distributed Multi-Stage EMC Filter for an Interleaved Three-Phase PWM-Rectifier System for Aircraft Applications

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1 Analysis and Optimized Design f a Distributed Multi-Stage EMC fr an Interleaved Three-Phase PWM-Rectifier System fr Aircraft Applicatins Nic Hensgens, Marcel Silva, Jesús A. Oliver, Pedr Alu, Oscar Garcia, Jsé A. Cbs Abstract Different pssible input filter cnfiguratins fr a mdular three-phase PWM rectifier system cnsisting f three interleaved cnverter cells are studied. The system is designed fr an aircraft applicatin where MIL-STD-46E cnducted standards have t be met and system weight is a critical design issue. The imprtance f a LISN mdel n the simulated nise levels and the effect f interleaving and pwer unbalance between the different cnverter mdules is discussed. The effect f the number ffilterstages and the degree f distributin f the filter stages amng the individual cnverter mdules n the weight and lsses f the input filter is studied and ptimal filter structures are prpsed. Index Terms EMC,, input filter, ptimizatin, threephase, PWM rectifier, MIL-STD-46E, LISN CELL D O I. INTRODUCTION Pwer electrnic cnverters are surces f electrmagnetic interferences () where it riginates frm semicnductr switches perating at high frequency [], [2], [3]. In rder t prevent disturbances in ther appliances cnnected t the same grid, internatinal standards have been established which define the maximal levels f that pwer cnverters are allwed t emit. Depending n the applicatin area, different standards are applicable. In case f industrial r residential envirnments, the Class A and Class B limits as defined in the CISPR standards [4], [5] have t be met. In case f aerspace applicatins, the military standard MIL-STD-46E [6] is applicable. Besides the use f ther mitigatin techniques [7], in general an input filter is necessary t cmply with the standards. The filter hwever cntributes significantly t the weight and vlume f the pwer cnverter system [8] as well as t its lsses. Therefre an ptimized design is desirable, especially in aerspace applicatins, where a lw weight f the cnverter system is f high imprtance. This paper presents the analysis and ptimized design f the EMC input filter fr a three-phase cnverter system fr aerspace applicatins. The cnverter cnsists f three individual and identical mdules. This allws fr an additinal degree f freedm in the input filter design space, i.e. the degree f Fig.. Simplified schematic f the cnverter system cnsisting f three mdular cnverter cells distributin f the input filter between the individual cnverter mdules. The effect f a distributed design f the input filter and the number f filter stages n the expected weight and lsses is analyzed and an ptimized design is prpsed. Additinally an issue regarding the influence f the EMC measurement equipment, i.e. the line impedance stabilizatin netwrk (LISN) is addressed, which plays an imprtant rle when perfrming cnverter simulatins t btain the cnverter input current spectrum. II. SYSTEM A mdular three-phase pwer cnverter system has been designed fr an aircraft applicatin. The system cnsists f three individual cnverter cells which are cnnected in parallel and perated in an interleaved mde, i.e. with a phase shift f 20 degrees with respect t each ther. Each individual cell cnsists f a three-phase buck-type PWM rectifier [9], tgether with a vltage-fed phase-shifted full-bridge t regulate the utput vltage and prvide galvanic islatin. The basic cnverter structure is shwn in Fig. and Table I summarizes the main cnverter specificatins. Fig. 2 shws a mre detailed schematic f ne single cnverter cell.

2 CELL B? B} Fig. 2. Detailed view f an individual cnverter cell cnsisting f a three-phase buck-type PWM rectifier and a vltage-fed full-bridge cnverter TABLE I SPECIFICATIONS Input Vltage V n Output Vltage V ut Nminal Output Pwer P 0 Rectifier Switching Frequency f sw Full-bridge Switching Frequency n ect f sw,fb 5 Vrms / 400 Hz 270 V dc 0 kw (3 x 3.3 kw) 60 khz 80 khz measurement f nise spectrum vi LISN ^ LISN L H IU measurement f input current SYSTEM Fig. 4. Cnverter system with LISN and tw methds f btaining the input current spectrum LISN Fig. 3. Three-phase LISN mdel (nly ne f the three phases is shwn in detail) III. EMC SIMULATIONS ANDMIL-STD-46E The cnducted emissin levels f the cnverter system have been btained thrugh simulatin, in rder t start the input filter design befre a wrking prttype was available. In all cnverter simulatins a mdel f the line impedance stabilizatin netwrk (LISN) as defined in [6] and shwn in Fig. 3 has been included, cnnected between the threephase surce and the pwer cnverter. Tw different input nise spectra have been calculated, ne time via an FFT f the current as measured at the input prt f the cnverter system multiplied by a 50Q standard resistance, and ne time as a vltage drp ver the same standard resistance inside the LISN. The tw methds are depicted schematically in Fig. 4. In Figs. 5a and 5b the input current spectrum f the cnverter system is shwn as btained by methd ne and methd tw respectively. One can clearly see that in the frequency range between 0 khz and several 00 khz the nise levels measured by the LISN are lwer than thse cnsidering the cnverter input current directly. This fact is due t the impedance characteristic f the LISN which is shwn in Fig. 6. At the rectifier switching frequency f 60 khz, the LISN impedance is apprximately 0. instead f 50Í Thus the nise levels measured in the LISN at 60 khz are 20g(^) ~ 9dB/jV lwer than thse btained frm the direct measurement f the input current. A design based n the current spectrum as measured at the cnverter input prt wuld lead t an versized and thus subptimal input filter. This is ften neglected in applicatins where nly the frequency range 50 khz - 30 MHz is cnsidered. In that case the effect can effectively be neglected since its influence is very small. In the frequency range 0 khz - 0 MHz, i.e. fr aircraft applicatins, it needs hwever t be cnsidered. IV. EMC INPUT FILTER DESIGN Cnducted standards fr industrial r residential equipment cver the frequency range f 50 khz - 30 MHz [5] which allws ignring all switching frequency harmnics belw 50 khz in the design f the input filter [0]. This cnverter system hwever has t cmply with military cnducted EMC standards [6] which cver the frequency range f 0 khz - 0 MHz. Unless a very lw switching frequency belw 0 khz is selected, the first input current harmnic needs t be cnsidered fr the input filter design. Mrever the line frequency in aerspace applicatins is 400 Hz which in case f a lw cutff frequency f the designed filter may lead t a deteriratin f the system pwer factr [2] and renders unfeasible the use f t lw cutff frequencies leading t a high ttal harmnic distrtin. This puts significant cnstraints

3 i Current spectrum MIL-STD-46E CISPR22ClassA 50 khz MIL-STD-46E CISPR22 Class B L 0 0 UrPf i f Current spectrum MM Sill 4liU ( ISI'li-V ( I.JSSA ( ISI'li-V ( I.JSSH Fig. 7. Frequency range between grid frequency and frequency range cnsidered by cnducted standards fr residential/industrial and aerspace applicatins respectively. ml L±JL i- T "\ - DM/CM Stage ^_ z J] Fig. 8. Differential mde (DM) and cmmn mde (CM) filter stage 0 0 Fig. 5. Simulated DM nise spectrum f the cnverter system: btained by measuring the cnverter input current (tp) and via the LISN (bttm). S 30 a. E Q z B 'usn " ' ISN => 4= C 0= 0 Fig. 6. Impedance characteristic f the LISN (a simplified LISN mdel as shwn in the Figure has been used) n the frequency range in which the filter cutff frequency can be placed, as depicted in Fig. 7. A. Distributin In the fllwing we will analyze the influence f the number f input filter stages and and their degree f distributin n the ttal filter weight. Nte that every differential mde (DM) filter stage cnsists in its basic cnfiguratin, i.e. withut additinal " damping elements, f three DM chkes and three line-t-line capacitrs (X-capacitrs) and every cmmn mde (CM) filter stage cnsists f ne three-phase CM chke and three linet-grund capacitrs (Y-capacitrs). Additinal RC damping netwrks have been included in every DM filter stage t prvide damping f the filter resnance [3] [4]. This is shwn in Fig. 8. Als ther damping netwrks than the parallel- RC netwrk culd be cnsidered. Hwever ther tplgies, e.g. series-rl r parallel-rl damping [3], add an additinal three inductrs per filter stage, whereas the RC netwrk adds capacitrs with a cnsiderably lwer weight. Since it is ur gal t design a filter with minimal weight, the RC damping presents the best slutin. The input filter fr this cnverter system can be distributed in different ways. Either ne cmmn input filter can be designed fr all three cnverter cells r individual input filters fr every single cnverter cell. In case f a multi-stage filter, als a distributed filter structure with individual filters as well as a cmmn filter can be cnsidered. These three different filter structures are depicted in Fig. 9. The ntatin "N + M" is prpsed t describe the degree f distributin f the input filter. N dentes the number f filter stages which are cmmn fr all cnverter cells and M the number f filter stages fr every individual cnverter cell. Fr example " + 2" dentes a three stage filter with ne cmmn filter stage fr all three cells and tw individual filter stages in frnt f every cnverter cell. B. DM Design In case f a perfectly balanced system and cnsidering the fact that the three cnverter cells wrk in interleaved peratin with a phase shift f 20 degrees with respect t each ther the first tw switching frequency harmnics at f SWt R ec t = 60kHz and 2f sw,rect = 20kHz are canceled ut. In the cnverter specificatins hwever a maximal pwer unbalance f up t 0% is specified, i.e. ne cnverter cell prvides 0% f its nminal pwer P 0 /3 and the ther tw a pwer f 95% f

4 N +0 CELL CELL O l wi f lililí Jll I f -\ MIL-STD-46E CISPR22ClassA - lillililil im^,. CISPR22Class B j íkááiu,, ; ^ HIllItlLitill i' Pi i M I [ MIL-STD-46E CISPR22ClassA - CISPR22Class B [ CELL N + M I 0 0 IWJ U.I-j'IL m Ir :! \ Fig. 9. Different degrees f distributin f the inputfilter:ttally cncentrated filter "N+0" (blue), ttally separated filter "0+M" (red) and distributed filter "N+M" (green) 43dBu,v/ i : h Current spectrum MIL-STD-46E CISPR22ClassA ( ISI'li )) ( l.jss H their nminal pwer P 0 /3. Fr the design f the input filter this wrst case perating pint needs t be cnsidered. In that case these first switching frequency harmnics are nt canceled ut anymre and a significant nise peak appears at the frequency f SWt R ec t = 60kHz. The nise spectra f the cnverter system withut interleaving, the system with interleaving and perfect pwer balance and the system with interleaving and a 0% pwer unbalance are shwn in Fig. 0 respectively. It can be seen that in the system withut interleaving, nise peaks appear at all switching frequency harmnics. In the interleaved system, the amplitude f the first tw nise peaks is cnsiderably reduced and the mst imprtant nise peak appears at the third switching frequency harmnic at 3f SWj R ect = 80kHz. In the unbalanced system a critical nise peak reappears at f SWt R ec t = 60kHz with an amplitude f lasáb^v (cmpared t laqdb iv in the cmpletely unbalanced system). The design f the DM filter is based n the spectrum shwn in the bttm picture f Fig. 0. The cutff frequencies f the filters have been calculated such as t distribute the required attenuatin equally ver all filter stages. This design where all filter stages prvide the same amunt f attenuatin leads t a simple design where all filter stages cnsist f the same cmpnents (L'a and Cs) and als t a design with L 0 0 Fig. 0. Input current spectra f the cnverter in case f a system, withut emplying interleaving (tp), an interleaved and perfectly balanced system (middle) and an interleaved system with a pwer unbalance f 0% (bttm). minimal vlume and weight []. The individual filter stages are designed as fllws: First the cutff frequency OJcutff f the individual filter stages are calculated accrding t ( cutff 2-KGOkHz VlO 0 "/ 20 where att is the attenuatin (in db/jv) the filter stage under cnsideratin has t prvide and L and C are the inductance ()

5 and capacitance values used in that same filter stage. In rder t btain the values f L and C first a capacitance value is calculated in rder t minimize the effect f the filter stage n the cnverter pwer factr [2]: C = 2 j cutff where uj gr id is the grid frequency, i.e. 400 Hz fr aircraft applicatins and RL is the lad impedance f the input filter (in case f a PFC cnverter a simple resistive mdel can be used). Then a capacitr C with the clsest cmmercially available value is selected and finally in rder t achieve the required attenuatin, the inductance is calculated as grid (2) JP6.0 K cncentrated Ü Ml M Weight MB Fig.. Optimal weight f different input filter cnfiguratins - different number f stages and different distributin schemes C. CM Design L.2 cutff The filter design has been perfrmed withut access t the final cnverter layut, which made an estimatin f the parasitic capacitance t grund and thus an estimatin f the prspected CM nise levels very difficult. It has been decided t include tw CM filter stages in the input filter t prvide sufficient attenuatin fr CM nise. Additinally nly cmmercially available three-phase nancrystalline CM chkes have been cnsidered since thse cres exhibit the best perfrmance t size/weight rati [6]. K (3) g 60 is cncentrated mil n Lsses D. Optimizatin The design f the individual filter tplgies has been ptimized in rder t btain a gd trade-ff between weight and lsses where the weight is cnsidered as the mre critical design issue. The cre size and the wire selectin have been free variables t btain the inductance value btained with 3, i.e. (P = pwer lsses, W = weight) with and min cre size wire size (k w Wtt + kpptt) V* tt V* cres > V' wire > '"capacitrs ^tt Scres i ±wire i capa apacitr s The calculated weights and lsses f different filter structures with varying number f filter stages ("N+M" =...4) (with "N+M" defined as befre, i.e. N the number f cmmn filter stages and M the number f individual filter stages) and the different distributin schemes are shwn in Figs. and 2. On can bserve that a single filter stage leads in bth cases ("+0" and "0+") t a very bulky and heavy design and cnsiderable imprvements can be achieved using a higher number f filter stages. Independently f the distributin scheme, the ptimal number f filter stages w.r.t. weight is always three ("3+0", "0+3", "+2") with a ttal weight clse t 2.5 kg. The existence f such an ptimum in the number (4) (5) (6) Fig. 2. Lsses f the different input filter cnfiguratins - different number f stages and different distributin schemes Weight 2+0 i+i I 2 QJ0 O 8 Lsses 2+0 i+i 0+2 Fig. 3. Weight and lsses f different distributin schemes f a tw-stage CM filter emplying cmmercially available cmpnents [6] f filter stages can be explained in each case by the tradeff between the smaller cmpnents which can be emplyed in multi-stage filters and the increasing number f cmpnents. Mrever the analysis shws that in all cases the ptima are very clse t each ther. This shws that even thugh in case that individual filter stages are emplyed using cmpnents with lwer current rating (e.g. smaller cres and thinner wire), the imprvements in weight are cmpensated by the increased number f filter cmpnents.

6 TABLE II INPUT FILTER COMPONENTS OF COMMON FILTER STAGE DM Inductr CM inductr DM Capacitr CM capacitr Magnetics High Flux Pwder Cre [5] VAC T60405-S623-X363 [6] EPCOS 2.2 /LÍF Film Capacitr Murata 2 x 2.2 nf Y-capacitr TABLE III INPUT FILTER COMPONENTS OF INDIVIDUAL FILTER STAGE DM Inductr CM inductr DM Capacitr CM capacitr Magnetics High Flux Pwder Cre [5] VAC T60405-S623-X37 [6] EPCOS.0 /LÍF Film Capacitr Murata 2.2 nf Y-capacitr Fig. 4. CAD drawing f a three-stage DM / tw-stage CM input filter fr all three cnverter mdules Fig. 5. CAD-drawing f a three-stage DM / tw-stage CM input filter fr a single cnverter mdule V. FILTER IMPLEMENTATION AND VERIFICATION Fr experimental validatin f the results, different input filters have been designed. Fig. 4 shws a drawing f a cmpletely cncentrated filter slutin with three DM filter stages and 2 CM filter stages(dm "3+0" and CM "2+0"). Fig. 5 shws an input filter fr ne individual cnverter cell, als cnsisting f 3 DM stages and 2 CM stages (DM "0+3" and CM "0+2"), nte that the cmplete input filter wuld cnsist f three f these mdules. The emplyed cmpnents are shwn in Tables II and III VI. CONCLUSION The imprtance f a crrect mdel f the line impedance stabilizatin netwrk and the accurate way t measure the input current spectrum has been addressed. This issue can be and ften is neglected in cnducted simulatins fr residential/industrial equipment where the frequency range f interest starts at 50 khz. Fr aerspace applicatins hwever, where the frequency range f interest starts at 0 khz, it needs t be cnsidered, therwise the nise spectrum will be estimated t high leading t a subptimal input filter design. Based n simulated nise spectra f a mdular three-phase PWM rectifier system, an input filter has been designed. In these simulatins the effect f a pssible pwer unbalance between the individual cnverter mdules has been cnsidered. The pssible degrees f distributin f the input filter between fully cncentrated filter slutin and individual filter slutins fr the cnverter mdules has been discussed and an ptimal design w.r.t. weight has been prpsed, cnsidering the degree f distributin, the number f filter stages and the tradeff between cmpnent weight and lsses. The ptimal number f filter stages has been determined t be three, independent f the degree f distributin. REFERENCES [i] T. Carter, "Switch mde pwer supplies: and engineer's pint f view", Prceedings f Suthcn, 994 [2] L. Tihanyi, "Electrmagnetic cmpatibility in pwer electrnics", IEEE Press / butterwrth-heinemann, 995 [3] H. W. Ott, "Electrmagnetic cmpatibility engineering", Jhn Wiley & Sns, 2009 [4] C.I.S.P.R., "Industrial, scientific and medical (ISM) radi-frequency equipment - electrmagnetic disturbance characteristics - limits and methds f measurement", Publicatin, Geneva, Switzerland, IEC Internatinal Special Cmmittee n Radi Interference [5] C.I.S.P.R., "Infrmatin technlgy equipment - radi disturvbance characteristics - limits and methds f measurement", Publicatin 22 Geneva, Switzerland, IEC Internatinal Standard Cmmittee n Radi Interference [6] MIL-STD-46 IE, "Department f defense interface standard requirements fr the cntrl f electrmagnetic interference characteristics f subsystems and equipment", August 999 [7] K. Mainali, R.Oruganti, "Cnducted mitigatin techniques fr switch-mde pwer cnverters: a survey", IEEE Transactins n Pwer Electrnics, Vl. 25, N. 9, September 2009, pp [8] M. L. Heldwein, J. W. Klar, "Impact f EMC filters n the pwer desnsity f mdern three-phase PWM cnverters", IEEE Transactins n Pwer Electrnics, Vl. 24, N. 6, June 2006, pp [9] A. Stupar, T. Fridli.J. Minibck, M. Schweizer, J. W. Klar, "Twards a 99% efficient three-phase buck-type PFC rectifier fr a 400V DC distributin system", Prceedings f the 26th Annual Applied Pwer Eclectrnics Cnference and Expsitin (APEC), 20, pp [0] T. Nussbaumer, M. L. Heldwein, J. W. Klar, "Differential mde input filter design fr a three-phase buck-type PWm rectifier based n mdeling f the EMC test receiver", IEEE Transactins n Industrial Electrnics, Vl. 53, N. 5, Octber 2006, pp [] M. L. Heldwein, J. W. Klar, "Design f minimum vlume EMC input filters fr an ultra cmpact three-phase PWM rectifier", Prceedings f the 9th Brazilian Pwer Electrnics Cnference (COBEP), 2007 [2] M. Silva, N. Hensgens, J. Oliver, P. Alu, O. García, J. A. Cbs, New cnsideratins in the input filter design f a three-phase buck-type PWM rectifier fr aircraft applicatins, Prceedings f the 3rd Annual IEEE Energy Cnversin Cngress and Expsitin (ECCE), 20, pp [3] R. W. Ericksn, "Optimal single resistr damping f input filters", Prceedings f the 4th Annual IEEE Applied Pwer Electrnics Cnference and Expsitin (APEC), 999, pp [4] L. Xing, J. Sun, "Optimal damping f multi-stage filters", Prceedings f the 26th Annual IEEE Applied Pwer Electrnics Cnference and Expsitin (APEC), 20, pp [5] Magnetics Pwder Cres catalg 20, available nline: [6] Vacuumschmelze Nancrystalline Vitrperm EMC prducts Catalg, available nline:

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