FEATURES DESCRIPTIO TYPICAL APPLICATIO. LTC6943 Micropower, Dual Precision Instrumentation Switched Capacitor Building Block APPLICATIO S

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1 FEATRES Low Power, I S = µa(max) Robust, Latch p Proof Instrumentation Front End with db CMRR Precise, Charge-Balanced Switching Operates from to V Internal or External Clock Operates up to MHz Clock Rate Two Independent Sections with One Clock Tiny SSOP- Package APPLICATIO S ltra Precision Voltage Inverters, Multipliers and Dividers VF and FV Converters Sample-and-Hold Current Sources Precision Instrumentation Amplifiers, LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS is a trademark of Linear Technology Corporation. LTC Micropower, Dual Precision Instrumentation Switched Capacitor Building Block DESCRIPTIO The LTC is a monolithic, charge-balanced, dual switched capacitor instrumentation building block. A pair of switches alternately connects an external capacitor to an input voltage and then connects the charged capacitor across an output port. The internal switches have a break-before-make action. An internal clock is provided and its frequency can be adjusted with an external capacitor. The LTC can also be driven with an external CMOS clock. The LTC, when used with low clock frequencies, provides ultra precision DC functions without requiring precise external components. Such functions are differential voltage to single-ended conversion, voltage inversion, voltage multiplication and division by,,,, etc. The LTC is manufactured using Linear Technology s enhanced LTCMOS TM silicon gate process, and it is functionally compatible with the LTC. TYPICAL APPLICATIO Precision Voltage Controlled Current Source with Ground Referred Input and Output INPT V TO.V LTC POSITIVE OR NEGATIVE RAIL Precision Current Sensing in Supply Rails I E R SHNT.µF / LTC k / LTC k E I = E R SHNT. I OT = Ω. OPERATES FROM A SINGLE SPPLY TAb TAa f

2 LTC ABSOLTE AXI RATI GS (Note ) W W W Supply Voltage... V Input Voltage at Any Pin....V V.V Operating Temperature Range (Note )... C to C Specified Temperature Range (Note )... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C W PACKAGE/ORDER I FOR ATIO CB CB V SB SB SA SA SHA TOP VIEW SB V C OSC SB SA SA CA CA GN PACKAGE -LEAD NARROW PLASTIC SSOP T JMAX = C, θ JA = C/W ORDER PART NMBER LTCCGN LTCIGN LTCHGN GN PART MARKING C I H Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V = V, V = V LTCC LTCI LTCH SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS I S Power Supply Current Pin Connected High or Low µa µa C OSC (Pin to V ) = pf µa µa I I OFF Leakage Current Any Switch, Test Circuit (Note ) pa na R ON ON Resistance Test Circuit, = V, = ±.ma Ω V = V, V = V Ω R ON ON Resistance Test Circuit, =.V, = ±.ma Ω V =, V = V kω f OSC Internal Oscillator Frequency C OSC (Pin to V ) = pf khz C OSC (Pin to V ) = pf khz Test Circuit khz I OSC Pin Source or Sink Current Pin at V or V µa µa Break-Before-Make Time ns Clock to Switching Delay C OSC Pin Externally Driven ns f M Maximum External CLK Frequency C OSC Pin Externally Driven with CMOS Levels MHz CMRR Common Mode Rejection Ratio V =, V =, < V CM < db DC to Hz Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : All versions of the LTC are guaranteed functional over the operating temperature range of C to C. The LTCCGN is guaranteed to meet C to C specifications and is designed, characterized and expected to meet the specified performance from C to C but it is not tested or QA sampled at these temperatures. The LTCIGN is guaranteed to meet specified performance from C to C. The LTCHGN is guaranteed to meet specified performance from C to C. Note : OFF leakage current at C is guaranteed by design and it is not % tested in production. f

3 LTC TYPICAL PERFOR A CE CHARACTERISTICS W (Test Circuits through ) SPPLY CRRENT (ma) Power Supply Current vs Power Supply Voltage C OSC = pf, T A = C C OSC = pf, T A = C C OSC = pf, T A = C C OSC = pf, T A = C C OSC = pf, T A = C C OSC = pf, T A = C RON (Ω) R ON vs R ON (PEAK) I = µa I = µa I = ma V = V = V T A = C R ON (Ω) R ON vs R ON (PEAK) I = µa I = µa I = ma V = V V = V T A = C. V SPPLY (V) (V) (V) TPC LTC TPC LTC TPC R ON (Ω) R ON vs R ON (PEAK) I = µa I = µa (V) I = ma V = V = V T A = C LTC TPC R ON (Ω) R ON (Peak) vs Power Supply Voltage =.V V V V V = V T A = C.V R ON (PEAK) V V SPPLY (V).V I = µa V LTC TPC R ON (Ω) R ON (Peak) vs Power Supply Voltage and Temperature T A = C T A = C R ON (PEAK) T A = C V SPPLY (V) I = µa LTC TPC I OSC (khz) Oscillator Frequency, f OSC vs C OSC T A = C V S = V S = V S = V. C OSC (pf) TPC f OSC (khz) Oscillator Frequency, f OSC vs Supply Voltage T A = C C OSC = pf C OSC = pf V SPPLY (V) TPC OSCILLATOR FREQENCY NORMALIZED TO fosc AT SPPLY..... Normalized Oscillator Frequency, f OSC vs Supply Voltage T A = C C OSC = pf C OSC =,pf C OSC =,pf V SPPLY (V) C OSC = pf TPC f

4 LTC TYPICAL PERFOR A CE CHARACTERISTICS W (Test Circuits through ) f OSC (khz) Oscillator Frequency, f OSC vs Ambient Temperature V S = V S = V V S = TEMPERATRE ( C) C OSC = pf PIN SORCE OR SINK CRRENT (µa) C OSC Pin I SINK, I SORCE vs Supply Voltage I SORCE, T A = C I SORCE, T A = C I SINK, T A = C I SINK, T A = C I SINK, T A = C I SORCE, T A = C t NOV (ns) Break-Before-Make Time, t NOV, vs Supply Voltage T A = C V SPPLY (V) TPC LTC TPC LTC TPC BLOCK DIAGRA W SA SA SH A C A C A SA SA CHARGE BALANCING CIRCITRY SB SB C B C B SB SB CHARGE BALANCING CIRCITRY V V C OSC NON-OVERLAPPING CLOCK OSCILLATOR V V THE CHARGE BALANCING CIRCITRY SAMPLES THE VOLTAGE AT S WITH RESPECT TO S (PIN HIGH) AND INJECTS A SMALL CHARGE AT THE C PIN (PIN LOW). THIS BOOSTS THE CMRR WHEN THE LTC IS SED AS AN INSTRMENTATION AMPLIFIER FRONT END. FOR MINIMM CHARGE INJECTION IN OTHER TYPES OF APPLICATIONS, SA AND SB SHOLD BE GRONDED THE SWITCHES ARE TIMED AS SHOWN WITH PIN HIGH BD f

5 LTC TEST CIRCITS Test Circuit. Leakage Current Test Test Circuit. R ON Test (,,, ) (,,, ) (,,, ) (,,, ) V TO V A (,,, ) NOTE: TO OPEN SWITCHES, S AND S PIN, SHOLD BE CONNECTED TO V. TO OPEN S, S, THE C OSC PIN SHOLD BE CONNECTED TO V C OSC TC VIN µa to ma CRRENT SORCE A (,,, ) TC Test Circuit. Oscillator Frequency, f OSC Test Circuit. CMRR Test V OT (TEST PIN) V V LTC C OSC CAPACITORS ARE NOT ELECTROLYTIC IV TC V V CM V V CMRR = LOG ( CM ) NOTE: V OT FOR OPTIMM CMRR, THE C OSC SHOLD BE LARGER THAN.µF, AND THE SAMPLING CAPACITOR ACROSS PINS AND SHOLD BE PLACED OVER A SHIELD TIED TO PIN TC APPLICATIO S I FOR ATIO W Common Mode Rejection Ratio (CMRR) The LTC, when used as a differential to single-ended converter rejects common mode signals and preserves differential voltages (Figure ). nlike other techniques, the LTC s CMRR does not degrade with increasing common mode voltage frequency. During the sampling mode, the impedance of Pins, (and, ) should be balanced, otherwise, common mode signals will appear differentially. The value of the CMRR depends on the value of the sampling and holding capacitors (C S, C H ) and on the sampling frequency. Since the common mode voltages are not sampled, the common mode signal frequency can well exceed the sampling frequency without experiencing aliasing phenomena. The CMRR of Figure is measured by shorting Pins and and by observing, with a V D V CM / LTC C C S C C S, C H ARE MYLAR OR POLYPROPYLENE AI Figure. Differential to Single-Ended Converter V D C H f

6 LTC APPLICATIO S I FOR ATIO CMRR (db) W precision DVM, the change of the voltage across C H with respect to an input CM voltage variation. During the sampling and holding mode, charges are being transferred and minute voltage transients will appear across the holding capacitor. Although the R ON on the switches is low enough to allow fast settling, as the sampling frequency increases, the rate of charge transfer increases and the average voltage measured with a DVM across it will increase proportionally; this causes the CMRR of the sampled data system, as seen by a continuous instrument (DVM), to decrease (Figure ). Switch Charge Injection Figure shows one out of the eight switches of the LTC, configured as a basic sample-and-hold circuit. When the switch opens, a hold step is observed and its magnitude depends on the value of the input voltage. Figure shows charge injected into the hold capacitor. For instance, a pcb of charge injected into a. capacitor causes a µv hold step. As shown in Figure, there is a predictable and repeatable charge injection cancellation when the input voltage is close to half the supply voltage of the LTC. This is a unique feature of this product, containing charge-balanced switches fabricated with a self-aligning gate CMOS process. Any switch of the LTC, when powered with symmetrical dual supplies, will sample-and-hold small signals around ground without any significant error. C S = C H = C S =, C H =. Shielding the Sampling Capacitor for Very High CMRR Internal or external parasitic capacitors from the C pin(s) to ground affect the CMRR of the LTC (Figure ). The common mode error due to the internal junction capacitances of the C Pin(s) and is cancelled through internal circuitry. The C pin, therefore, should be used as the top plate of the sampling capacitor. A shield placed underneath the sampling capacitor and connected to C helps to boost the CMRR to db (Figure ). Excessive external parasitic capacitance between the C pins and ground indirectly degrades CMRR; this becomes visible especially when the LTC is used with clock frequencies above khz. Because of this, if a shield is used, the parasitic capacitance between the shield and circuit ground should be minimized. It is recommended that the outer plate of the sampling capacitor be connected to the C pin(s). C OSC Pin () The C OSC pin can be used with an external capacitor, C OSC, connected from Pin to Pin, to modify the internal oscillator frequency. If Pin is floating, the internal pf capacitor, plus any external interpin capacitance, set the oscillator frequency around khz with ± supply. The typical performance characteristics curves provide the necessary information to set the oscillator frequency for various power supply ranges. Pin can also be driven with an external CMOS level clock to override the internal oscillator. / LTC pf / LTC V OT k k k f OSC (Hz) V V SAMPLE HOLD TO PIN AI AI Figure. CMRR vs Sampling Frequency Figure f

7 LTC APPLICATIO S I FOR ATIO W V = V = V CHARGE INJECTION (pcb) V = V = V V = V V = V OTSIDE FOIL C S PRINTED CIRCIT BOARD AREA LTC (V) AI AI Figure. Individual Switch Charge Injection vs Input Voltage Figure. Printed Circuit Board Layout Showing Shielding the Sampling Capacitor Divide by Multiply by ltra Precision Voltage Inverter / LTC V OT = / V OT / LTC / LTC V OT =... V OT = / ± ppm V V V TA V OT = ± ppm V / V V TA V OT = ±ppm V < < V V =, V = TA f

8 LTC Precision Multiply by Divide by LTC LTC V OT V OT. V OT. V OT = ±ppm < < V / V < V < V TA V OT = / ±ppm V TA.% V/F Converter k LT. / LTC f OT : khz TO khz V TO V GAIN.k.k** LT.* *POLYPROPYLENE **% FILM RESISTOR k pf k Q NA TA f

9 LTC.% Analog Multiplier / LTC k LT-.V Y INPT.k* NA (FOR START-P) LT pf k. k X INPT OPERATE LTC FROM ± POLYPROPYLENE, MONT CLOSE * % FILM RESISTOR ADJST OTPT TRIM SO X Y = OTPT ±.% / LTC..k*. LT k OTPT TRIM OTPT XY ±.% TA Single Supply, ltra Precision Low Power with True Rail-to-Rail In/Out Instrumentation Amplifier LTC LTCCS OTPT A V = INPT Ω.k V = k.µf k N NONPOLARIZED.. INPT AND OTPT VOLTAGE RANGE INCLDES GROND. INPT REFERRED OFFSET ERRORS ARE TYPICALLY µv WITH µv OF PEAK-TO-PEAK DC TO Hz NOISE CMRR ~ db TA f

10 LTC Voltage Controlled Current Source with Ground Referred Input and Output INPT V TO V / LT.µF k Ω / LTC I OT = Ω. OPERATES FROM A SINGLE SPPLY TA Lock-In Amplifier (= Extremely Narrow-Band Amplifier) THERMISTOR BRIDGE IS THE SIGNAL SORCE SYNCHRONOS DEMODLATOR Hz SINE DRIVE T.k RT.k.k LT k Ω k* k* / LTC LT M LT V OT = DC BRIDGE SIGNAL k k PHASE TRIM.. µf k LT T = TFSXZZ, TOROTEL R T = YSI THERMISTOR.k AT. C * MATCH.%.k = VISHAY S- OPERATE LTC WITH ± SPPLIES LOCK-IN AMPLIFIER TECHNIQE SED TO EXTRACT VERY SMALL SIGNALS BRIED INTO NOISE TA ZERO CROSSING DETECTOR f

11 LTC MHz Thermal RMS/DC Converter BRN mv V RMS INPT T GRN k** RED. k** k k RED T GRN BRN / LTC. LT CALIBRATION ADJST k k* Ω* k LT k k % ACCRACY DC-MHZ : CREST FACTOR CAPABILITY T T = YELLOW SPRINGS INST. CO. THERMISTOR COMPOSITE ENCLOSE T AND T IN STYROFOAM *% RESISTOR **.% RESISTOR DC OTPT V TO. TA Single Supply Precision Linearized Platinum RTD Signal Conditioner k* (LINEARITY CORRECTION LOOP) / LT.k* k* k ZERO ADJST.k LT. k. / LTC Ω*.k* / LTC / LT k GAIN ADJST.k* V TO V = C TO C ±. C k LINEARITY ADJST ma R p Ω AT C. R p = ROSEMONT MFRTD * % FILM RESISTOR TRIM SEQENCE: SET SENSOR TO C VALE. ADJST ZERO FOR V OT SET SENSOR TO C VALE. ADJST GAIN FOR V OT SET SENSOR TO C VALE. ADJST LINEARITY FOR V OT REPEAT AS REQIRED TA k* f

12 LTC.% F/V Converter k* k GAIN TRIM k LT-.C FREQENCY IN khz TO khz / LTC LT V TO V OTPT pf** * % FILM RESISTOR ** POLYPROPYLENE TA Frequency-Controlled Gain Amplifier A / LTCA A B / LTCB B GAIN CONTROL khz TO khz = GAIN TO A A. A khz B B pf B A A B B FOR DIFFERENTIAL INPT, GROND PIN A AND SE PINS A AND A FOR INPTS f IN. GAIN = ; GAIN IS NEGATIVE AS SHOWN khz pf FOR SINGLE-ENDED INPT AND POSITIVE GAIN, GROND PIN A AND SE PIN A FOR INPT OPERATES THE LTC'S WITH ± SPPLIES LT. V OT TA f

13 LTC Battery Powered Relative Humidity Sensor Signal Conditioner. pf.k.k* k % TRIM LT.V.k* Ω % TRIM. LTC pf SENSOR RESPONSE RH% CAPACITANCE.pF.pF.pF.pF.pF. SENSOR. M A LT OTPT -.V = -% RH * = % FILM RESISTOR = POLYPROPYLENE SENSOR = PANAMETRICS TYPE RHS pf AT RH = %.pf/rh TA Powered, Frequency Output, Relative Humidity Sensor Signal Conditioner OT R SET.k* khz N GND LTC O V CHARGE PMP.k*. Ω LT V k* LTC TO ALL V POINTS * = % METAL FILM RESISTOR = WIMA, TYPE MKP- SENSOR = PANAMETRICS MC- % RH =.pf % RH =.pf.pf/rh SENSOR k* k RH = % TRIM (.pf) V V k S V pf A LTC BAT D Q VNL INTEGRATOR V N V k k* k* k RH = % TRIM (.pf) RESET COMPARATOR L C LT pf CLOCK Q V Q OT % TO % RH = Hz TO khz TA f

14 LTC Linear Variable Differential Transformer (LVDT), Signal Conditioner.µF k.µf / LTC AMPLITDE STABLE SINE WAVE SORCE k Q N.k LT k N LT.V.kHz YEL-BLK YEL-RED LVDT RD-BLE BLE GRN BLK k / LT OTPT V ±. mm ±.mm k.k µf.k / LTC k GAIN TRIM LVDT = SCHAEVITZ E- k k PHASE TRIM. LT k TO PIN, LTC TA V BE Based Thermometer Requires No Calibration k k*.k* M Q N k C Q TEMPERATRE SENSOR TRANSISTOR. LTC C A LTC -VOT = - C, C ACCRACY C. M* *.% FILM RESISTOR SENSOR TRANSISTOR MAY BE ANY SMALL SIGNAL NPN-N,, ETC. DO NOT SE GOLD DOPED TRANSISTORS. k LT. k*.k* TA f

15 LTC PACKAGE DESCRIPTIO GN Package -Lead Plastic SSOP (Narrow. Inch) (Reference LTC DWG # --). ±...* (..). (.) REF. MIN.... (..)..** (..). ±. RECOMMENDED SOLDER PAD LAYOT. TYP.. (..). ±. (. ±.) TYP.. (..).. (..).. (..) NOTE:. CONTROLLING DIMENSION: INCHES INCHES. DIMENSIONS ARE IN (MILLIMETERS). DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE **DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE.. (..). (.) BSC GN (SSOP) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. f

16 LTC Powered Voltage-to-Frequency Converter IN LTC f OT khz TO khz k µf LT.V C**. µf k FLL SCALE TRIM INPT V TO V k* N k IN A / LT D N pf.m (Hz TRIM) C pf TA k * = % FILM RESISTOR, TYPE TRW-MTRppm/ C ** = POLYPROPYLENE RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC Dual Precision Instrumentation db CMRR, V to V Operation Switched Cap, Building Block LTC Rail-to-Rail In/Out, Zero Drift Op Amp Operates p to V Supply Voltage LTC Zero Drift Op Amp Single Supply Operation on.v to V, SOT- Package LTC Zero Drift Dual Op Amp Dual LTC, -Lead DFN, MS Packages LTC Zero Drift Quad Op Amp Dual LTC, GN Package LTC Precision, Rail-to-Rail Zero Drift I.A. db CMRR at Low Gains LTC Low Power, Zero Drift Op Amp µa Supply Current, SOT- Package LTC Low Cost, Rail-to-Rail I.A. V OS(MAX) = µv, DFN Package LTC Precision Instrumentation Amplifier Levels of Programmable Gain, db CMRR with Digitally Programmable Gain Linear Technology Corporation McCarthy Blvd., Milpitas, CA - f LT/TP K PRINTED IN SA () - FAX: () - LINEAR TECHNOLOGY CORPORATION

FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LTC1046 Inductorless 5V to 5V Converter

FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LTC1046 Inductorless 5V to 5V Converter LTC Inductorless V to V Converter FEATRES ma Output Current Plug-In Compatible with ICL/LTC R OT = Ω Maximum µa Maximum No Load Supply Current at V Boost Pin (Pin ) for Higher Switching Frequency 9% Minimum