Research and Implementation of A Novel DC High Voltage Power Supply

Transcription

1 WSEAS TRANSACTONS n CRCTS AND SYSTEMS Research an mplementatin f A Nvel DC High Vltage Pwer Supply ZHAO YANLE Schl f Electrical & Electrnic Engineering Shanng niversity f Technlgy N. 1 Zhangzhu Ra, Zhangian District, Zib, Shanng Prvince CHNA eeaeea@163.cm Abstract: - The high vltage pwer supply is wiely use in varius fiels. The paper presents etailely the tplgy, the peratin an the key techniques f a high precise irect current (DC) negative high vltage pwer supply. T enhance the pwer factr f input sie an the vltage precisin f utput sie, the pwer supply uses BOOST cnverter fr pwer factr crrectin an vltage regulatin. t cnverts DC t high frequency (HF) alternating current (AC) square wave with phase-shifte full brige. The vltage f the AC square wave is bste by HF transfrmer, then the HF high vltage AC square wave is uble rectifie t DC high vltage utput. The HF high vltage transfrmer, which is esigne an manufacture with special material plytetraflur ethylene (F4) an special technique, slves several technical ifficulties incluing influence f istributing parameters an insulatin, an meets emans f high frequency, high vltage an high pwer. The supply s utput vltage is 5kV an its maximal utput current is 100mA.The experimental result shws the pwer supply has high input pwer factr, stable utput vltage an small ripple. Key-Wrs: - Pwer supply high vltage Bst Transfrmer ZVS phase-shifte cntrl 1 ntructin The high vltage pwer supply inclues psitive vltage surce an negative ne, which is willy use in varius fiels such as scientific research, inustry an meical treatment. Of these fiels, t satisfy usage emans, the high vltage pwer supply shul has high precisin an lw ripple. At present, the rapi evelpment f pwer electrnics prmpts the trens f high vltage pwer supply t high switch frequency. Hwever, the technique in the HF high vltage pwer supply whse utput pwer is mre than 1 kw isn t mature yet. There are three main prblems [1~3] : (1) input pwer factr is lw; () the utput vltage ripple is high; (3) it s ifficult t eal with the insulatin, parasitical inuctance an istribute capacitr f the high vltage high frequency transfrmer. Accring t actual applicatin eman, the paper researches n an evelps a high precise negative high vltage pwer supply use fr inustrial analysis, whse utput vltage is 5kV. The paper uses BOOST cnverter fr pwer factr crrectin an vltage regulatin, which imprves input pwer factr an reuces utput ripple f the pwer supply. An the paper apts special material an esign meth, which slves the prblems f insulatin an parasitical parameters f transfrmer uner high vltage an high frequency. The steay utput current f the pwer supply is abut 60 ma an the maximal 100 ma. The main circuit an the cntrl scheme As illustrate by Fig. 1, the high vltage pwer supply is cmpse f rectifier, primary stabilizing an pwer factr crrectin (PFC) circuit, zer vltage switching (ZVS) phase-shift full-brige inverter, HF high vltage transfrmer an uble-vltage rectifier. The first rectifier, using full-brige uncntrlle rectifier, changes the gri vltage t DC pulsant ne. The primary stabilizing an pwer factr crrectin (PFC) circuit is realize by a BOOST cnverter, which has tw functins: (1) t make input current is track input vltage us by current feeback, which guarantees input pwer factr f the pwer supply is clse t 1; () t ajust the utput vltage f PFC circuit, which guarantees the utput vltage f the pwer supply is stable. T reuce switching lsses an t iminish vltage ripple, the inverter apt ZVS phase-shift full-brige circuit, which cnverts smth DC vltage t AC square wave with high frequency. The HF high vltage transfrmer is the key f the pwer supply, which bsts AC square wave t scheule high vltage. Duble-vltage 55

2 WSEAS TRANSACTONS n CRCTS AND SYSTEMS rectifier, incluing rectifier circuit an filter ne, changes the HF high vltage AC square wave t smth DC negative high vltage. Fig. 1 Structure iagram f the main circuit n the pwer supply, the uty cycle f the switches f the phase-shift full-brige inverter is cnstant an equal t 0.95, hence the ajustment f utput vltage is realize nly relying n primary stabilizing an PFC circuit. The switch Q5 in BOOST cnverter is realize by GBT (Tshiba MG50Q1ZS50) an the switches Q1~Q4 are realize by GBTs (Mitsubishi CM50D-4F). The cntrl structure f the whle pwer supply is illustrate as Fig.. Fig. Structure f the cntrl system kus --sampling gain f pulsant DC vltage u s ; kil -- sampling gain f incuctance current i ; k -- sampling gain k m 1 f utput vltage ; --the gain f BOOSTcnverter ; km -- the gain f inverter ; t --the transfrming rati f transfrmer; k r -- the gain f mulitple-vltage rectifier ; ref --the reference value f utput vltage; reference value f current cntrller k L1 i L1 --the 3 The key implementatin techniques 3.1 The primary stabling an PFC circuit [3~6] T make the input current track input vltage, BOOST cnverter runs in current-cntrl me. The errr between reference vltage an feeback f ref utput vltage is ajuste by P cntrller, whse utput is multiplie by the measure signal f pulsant DC vltage us an gains the reference current. n the cntrl f the pwer supply, the i * L1 switching frequency is invariable. When the current il1 f inuctr L1 increases t i * L 1, the switch Q5 is switche ff fr a while; when the switching peri is ver, Q5 is switche n again. An the prcess abve mentine is circulate repeately, which nt nly realizes pwer factr crrectin, but als guarantees the stabilizatin f utput vltage. The paper selects the integral cntrl C--C3854, which can realize these functins expeiently. ner the cnitin that the switching frequency is invariable, the uty cycle D changes when input vltage changes an there is the belw relatinship: us = 1 D (1) in the esign, is selecte as 350V. Suppse BOOST cnverter runs in ieal state, the input pwer is equal t the transient pwer, by which the ripple vltage f filter capacitr C5 can be euce: 1 Δ ( t) ic5t = sin ωt () C 5 ωc 5 in frmula (), ω is the frequency f the gri vltage; is the average current flwing t the back circuit. ner the circumstance that the la f the pwer 5kV 100mA supply is maximal, = 7A. 350V Accring t frmula () an ripple restricting cnitin-- Δ =%, the filter capacitr C5 can gaine by calculatin: C5 = 3185uF, an is selecte as 3000uF. n aitin, a LC cmpse f L f an C f, whse resnant frequency is ω, can effectively eliminates lw rer harmnics. 3. The HF high vltage transfrmer The HF high vltage transfrmer is the cre an the ifficult pint in the whle high vltage pwer supply, uner the cnitin f high vltage an high frequency, whse parasite parameters an istribute nes irectly influence the perfrmance f the high vltage pwer supply. n the esign prcess, three factrs are cnsiere: (1) the leakage inuctance f the transfrmer. The leakage inuctance at high frequency shall restrict the utput pwer f the pwer supply, at the same time, the leakage inuctance, being as resnant inuctr f phase-shift full-brige inverter, shul guarantees the switches in the inverter switch uner zer vltage. () the istribute capacitr f the transfrmer. The istribute capacitr at high frequency shall reuce pwer factr an increase empty-la current. (3) the insulatin f 56

3 WSEAS TRANSACTONS n CRCTS AND SYSTEMS the transfrmer. The insulatins between lw vltage sie an high vltage sie, between ifferent winings, between layers are shul cnsiere. n the esign prcess, transfrming rati f the transfrmer shul be etermine firstly. Cnsiering the lss f uty cycle f transfrmer s secn sie uner ZVS phase-shift, the uty cycle f transfrmer s secn sie is etermine as 0.85, s the vltage f transfrmer s secn sie is: + Δ 5kV + 1% 5kV sec = = = 15kV (3) Dsec 0.85 in frmula (3), is utput vltage; Δ is vltage rp f the filer inuctance. S the transfrming rati f transfrmer is: sec 15kV n = = 4.86 (4) 350V n is selecte as 43. The paper selects ferrite magnetic cre (F96), whse effective area A e cnucting magnetism is 9cm an saturatin magnetic inuctin intensity B S = 4700GS. T avi magnetic saturatin, the maximal single irectin magnetic inuctin intensity is selecte as: 1 Bm = BS = 350GS = 0. 35T (5) switching frequency f the inverter f s = 40kHz, the wining turns f transfrmer s primary sie is: D N 1 = 10 = fs Ae Bm the wining turns f transfrmer s secn sie is: N = n N1 = = 817. T slve the prblems aruse by parasite inuctin, istribute capacitr an insulatin in transfrmer, sme measures are taken with regar t the structure an the material f the transfrmer: (1) the lw vltage winings an the high vltage nes are islate by using tw framewrks f ifferent imensin, which are cuple insie an utsie, respectively. () the high vltage wining framewrk is mae f special material plytetraflur ethylene (F4), which has g insulatin perfrmance. (3) there are 1 grves in the surface f the high vltage wining framewrk, an the brere grves are islate by F4 with apprpriate thickness. The wining is ivie averagely an there are 39 turns f winings in each grve which is ivie 4 layers, inserting the plyester film between layer an layer. As a result, the vltagea grve bears is nly abut 70V, an there is a vltage abut 180V between layer an layer in each grve. (4) t iminish the vltage between layer an layer an reuce istribute capacitr, the high vltage winings is ivie int many subsectin, then is cile. (5) the surface f the transfrmer is seale by epxy clphny an the winings is immerse by paint in the vacuum cnitin. (6) the high vltage wining is cvere by a F4 cver, which prevents air ischarge. The verall picture an the partial ne f the HF high vltage transfrmer are shwn as Fig. 3. a. The verall picture f the HF high vltage transfrmer b. a. The partial picture f the HF high vltage transfrmer Part A -- the high vltage winings an their framewrk; Part B -- the F4 cver f the transfrmer; Part C -- the magnetic cre f the transfrer; Part D -- the lw vltage winings an their framewrk. Fig. 3 The real picture f the HF high vltage transfrmer 3.3 ZVS Phase-shift full-brige inverter 57

4 WSEAS TRANSACTONS n CRCTS AND SYSTEMS As shwn in Fig. 1, C1~C4 are utput junctin capacitrs f the switches Q1~Q4, an L r is resnant inuctr, C6 is the capacitr blcking DC an use t prevent transfrmer s DC magnetizatin. C s is mainly use t absrb the peak vltage f transfrmer. Accrring t [6], the leaing arm can easily realize zer vltage switching (ZVS), while the lagging arm is ifficlut t realize ZVS. Take Q3 fr example, t achieve ZVS, the fllwing frmula must be meet: 1 L r P > C3 (6) in which, p is the current f tranfrmer primary sie when Q3 is switche ff. n the esign prcess, it s estine that the lagging arm realizes ZVS when utput current is equate t r mre than 30mA. At this pint the current equivalent t transfrmer primary sie is: P 43 30mA. 6A. Knwn frm manual ata f GBT CM50D-4F that its typical junctin capacitance value is 0.85nF, Accring frmula (6), in rer t ensure that lagging armcan achieve ZVS, L r > 30. 8uH. The transfrmer leakage inuctance is abut 9uH in the esign f the paper, s it can wrk as a resnant inuctr. n the cnitin f ne thir f the maximum la, lagging arm can realize ZVS. Hence, in this pwer supply esign, resnant inuctr is als transfrmer leakage inuctance in ZVS phase-shift full-birge inverter. The lss f uty cycle f transfrmer s secn sie is ecie by frmula: n {( + Δ ) [ ( Δ )]} 8nL r f S D lss = L r = T S (7) when utput current is 100mA, substitutes the actural values f the remaining variables int frmula (7), it s can be gaine that the largest uty cycle lss is When the inverter maintains cnstant uty cycle f 0.95, in such a lss f uty cycle, the utput vltage can be ajuste by primary stabling an PFC circuit t ensure its stability. The inverter is cntrlle by C-- C The uble-vltage rectifier an sampling f utput vltage The main parameters f the uble-vltage rectifier are as belw: maximum input vltage is 30kV; maximum input current is 500mA; maximum utput vltage is 50kV; maximum utput current is 00 ma; the ripple cefficient is 1% when the frequency f its input vltage is 10kHz an 0.% 30kHz; in aitin, there are built-in filtering circuit an resistrs fr vltage sampling. The vltage signal gaine by the built-in resistrs is sent t a vltage fllwer, whse utput signal is amplifie by a linear ptcupler an sent t back signal ealing circuit. The mel f peratinal amplifier use as vltage fllwer is LF444A, an the mel f ptcupler is HCNR00 (Agilent). T prevent vltage sampling resistrs frm wiening arc t generate peak vltage which will amage vltage fllwer, a TVS (transient vltage suppressr) clamp circuit an a RC filter circuit are installe in the input f vltage fllwer. Sampling circuit is shwn in Fig. 3. Fig. 4 The circuit f the utput vltage sampling 4 The experimental results The experimental results inicates that: the lagging arm can realize ZVS when the utput current f the pwer supply is equal t r mre than 8mA; the input current can track the input vltage well an utput vltage has g stability when the la alters in a wie scale. When la current is 85 ma, the input pwer factr is 0.99 an ripple cefficient f utput vltage is belw 0.3% (peak-t-peak). Fig. 5 shws the vltage f the riving signal an cllectr-emitter f Q3 an Fig. 6 the vltage f primary sie f the transfrmer. Fig. 7 shws the wavefrms f input current an input vltage, an Fig. 8 utput vltage an its spectrum. 58

5 WSEAS TRANSACTONS n CRCTS AND SYSTEMS Fig.5 The vltage f the riving signal an cllectr-emitter f Q3 Fig.6 The vltage f primary sie f the transfrmer Fig.7 nput vltage an input current Fig.8 Output vltage an its frequency spectrum 5 Cnclusin (1) The high vltage pwer supply esigne in the paper, using tw high frequency cnverters as well as high vltage high frequency transfrmer an rectifier, nt nly iminishes utput vltage ripple, but greatly increases the input pwer factr, s avis the pllutin t the gri in great egree. () The transfrmer esigne an manufacture by special material an technique, slves several technical ifficulties such as the influence f parasite parameters an insulatin, an meets emans f high frequency, high vltage an high pwer. (3) The experimental result shws the pwer supply has high input pwer factr, stable utput vltage an small ripple. References: [1] Barry C Pllar, Nelms R M. sing the series parallel resnant cnverter in capacitr charging applicatins[c]. The 7th applie pwer electrnics cnference an expsitin, Bstn, MA, SA, 199: 45~5 [] Sua M, En F, Yamazaki C, et al. Develpment f high pwers capacitr charging pwer supply fr pulse pwer applicatin[c]. The 1th internatinal pulse pwer cnf, Mntery, CA, SA, 1999: 1414~1416 [3] Biebach J, Ehrhart P, Muller A, et al.cmpact mular pwer supplies fr supercnucting inuctive strage an fr capacitr charging[j]. EEE Trans n Magnetics, 001, 37(1): 353~357 [4] RM G H, Jeng W, Gusev G. A cnstant current high vltage capacitr charging pwer supply fr pulse pwer applicatin[c]. EEE internatinal cnference n plasma science, Las Vegas, 001: [5] Ye Hanmin.A nvel DC high vltage pwer supply use fr electrn beam weler[j]. High Vltage Technlgy, 003, 9(8): 14 [6] Ruan Xinb, Yan Yangguang.PWM DC/DC full-brige cnverter sft switching technique [M].Beijing: Science press,001 [7] Chambers D, et al.new high frequency high vltage pwer supplies fr micrwave heating applicatins[c]. Prceeings f the 9th Micrwave pwer sympsium. Chicag,1994 [8] Marcel Brunr,Jse Luiz F.Vzeira. A High-perfrmance ZVS Full-brige DC-DC 59

6 WSEAS TRANSACTONS n CRCTS AND SYSTEMS 0-50V/0-10A Pwer Supply with Phase-shift Cntrl[C].EEE PESC 99:495~505 60