H02N60 Series N-Channel Power Field Effect Transistor

Transcription

1 6 Series -hannel Power ield ffect Transistor escription This high voltage OST uses an advanced termination scheme to provide enhanced voltage-blocking capability without degratding performance over time. In addition, this advanced OST is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain-to-source diode with a fast recovery time. esigned for high voltage, high speed switching applications in power supplies, converters and PW motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and saafety margin against unexpected voltage transients. eatures Robust igh Voltage Termination valanc he nergy Specified Source-to-rain iode Recovery Time omparable to a iscrete ast Recovery iode iode is haracterized for Use in Bridge ircuits I SS and V S(on) Specified at levated Temperature bsolute aximum Ratings Page o. : /7 6 Series Pin ssignment 6 Series Symbol: -ead Plastic TO-5 Package ode: Pin : ate Pin & : rain Pin : Source -ead Plastic TO-5 Package ode: I Pin : ate Pin & : rain Pin : Source -ead Plastic TO-B Package ode: Pin : ate Pin & : rain Pin : Source -ead Plastic TO-P Package ode: Pin : ate Pin : rain Pin : Source S Symbol Parameter Value Units I rain to urrent (ontinuous) I rain to urrent (Pulsed) 8 V S ate-to-source Voltage (ontinue) ± V Total Power issipation (T =5 o ) 6I (TO-5) / 6 (TO-5) 6 (TO-B) 6 (TO-P) P erate above 5 6I (TO-5) / 6 (TO-5) 6 (TO-B) 6 (TO-P) T j, T stg Operating and Storage Temperature Range -55 to 5 S Single Pulse rain-to-source valanche nrgy-tj=5 (V =V, V S =V, I =, =m, R =5Ω) T aximum ead Temperature for Soldering Purposes, /8 from case for seconds W W/ 5 m 6 6I, 6, 6, 6

2 Page o. : /7 Thermal haracteristics Symbol Parameter Value Units TO-5 / TO-5 R θ Thermal Resistance unction to ase ax. TO-B /W TO-P. R θ Thermal Resistance unction to mbient ax. 6.5 /W ectrical haracteristics (Tj=5, unless otherwise specified) Symbol haracteristic in. Typ. ax. Unit V (BR)SS rain-source Breakdown Voltage (V S =V, I =5u) V I SS rain-source eakage urrent (V S =6V, V S =V) - - u rain-source eakage urrent (V S =48V, V S =V, T j =5 ) u I SS ate-source eakage urrent-orward (V gsf =V, V S =V) - - n I SSR ate-source eakage urrent-reverse (V gsr =-V, V S =V) n V S(th) ate Threshold Voltage (V S =V S, I =5u) - 4 V R S(on) Static rain-source On-Resistance (V S =V, I =)* Ω g S orward Transconductance (V S 5V, I =)* - - mhos iss Input apacitance oss Output apacitance V S =V, V S =5V, f=z Reverse Transfer apacitance rss t d(on) Turn-on elay Time - - t r Rise Time (V =V, I =, R =8Ω, - - t d(off) Turn-off elay Time V S =V)* - - all Time t f Q g Total ate harge - Q gs ate-source harge (V S =V, I =6, V S =V)* - - ate-rain harge Q gd S Internal rain Inductance (easured from the drain lead.5 from package to center of die) Internal rain Inductance (easured from the drain lead.5 from package to source bond pad) *: Pulse Test: Pulse Width us, uty ycle % Source-rain iode p ns n n n Symbol haracteristic in. Typ. ax. Units V S orward On Voltage() I S =, V S =V, T =5 o V t on orward Turn-On Time - ** - ns I S =, V S =V, d IS /d t =/us Reverse Recovery Time ns t rr **: egligible, ominated by circuit inductance 6I, 6, 6, 6

3 Page o. : /7 haracteristics urve On-Region haracteristic apacitance haracteristics 9 VS=V I, rain-source urrent () VS=8V VS=6V VS=5V apacitance (p) iss VS=4V VS, rain-source Voltage (V) rss oss. VS, eain-source Voltage (V) RS(O), rain-source On-Resistance Typical On-Resistance & rain urrent VS=V I, rain-source urrent () VS= V rain urrent Variation with ate Voltage and Temperature T= 5 o I, rain urrent () VS, ate-source Voltage (V) ate harge Waveforms aximum Safe Operating rea VS (V) I, rain urrent () VS=V ms ms ms 4 5 Q, ate harge (n). VS, rain-source Voltage (V) 6I, 6, 6, 6

4 Page o. : 4/7 TO-5 imension a5 arking: Pb ree ark Pb-ree: ". " (ote) ate ode 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate.rain.Source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax *. a ead TO-5 Plastic Surface ount Package S Package ode: B y I y y y y O -ead TO-5 Plastic Surface ount Package S Package ode: arking: Pb ree ark Pb-ree: ". " (ote) ate ode 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate.rain.Source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax B * I O y - 5 o y - o 6I, 6, 6, 6

5 Page o. : 5/7 TO-5 imension arking: Pb ree ark Pb-ree: ". " (ote) ate ode I 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate.rain.Source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax *. -ead TO-5 S Package ode: I B y y y I arking: Pb ree ark Pb-ree: ". " (ote) ate ode I 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate.rain.Source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax B * *.8 - *9. I - *6. - * * y - 5 o y - o y y -ead TO-5 S Package ode: I 6I, 6, 6, 6

6 Page o. : 6/7 TO-B imension I P B O arking: Pb ree ark Pb-ree: ". " (ote) ate ode 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate &.rain.source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax B *6.5 I - * *.54 O P ead TO-B S Package ode: TO-P imension α α α α5 I α4 O arking: Pb ree ark Pb-ree: ". " (ote) ate ode 6 ontrol ode ote: reen label is used for pb-free packing Pin Style:.ate.rain.Source aterial: Sn/.g/.5u or Pure-Tin (Pb-free) old ompound: poxy resin family, I in. ax I O..96 α//4/5 - *5 o α - *7 o -ead TO-P S Package ode: Important otice: ll rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of S. S reserves the right to make changes to its products without notice. S semiconductor products are not warranted to be suitable for use in ife-support pplications, or systems. S assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. ead Office nd actory: ead Office (i-sincerity icroelectronics orp.):.,o. 6, Sec., hung-shan. Rd. Taipei Taiwan R.O.. Tel: ax: , actory : o. 8, uang u S. Rd., u-ou sin-hu Industrial Park sin-hu Taiwan. R.O. Tel: ~5 ax: I, 6, 6, 6

7 Page o. : 7/7 Soldering ethods for S s Products. Storage environment: Temperature= o ~5 o umidity=65%±5%. Reflow soldering of surface-mount devices igure : Temperature profile TP Ramp-up tp ritical Zone T to TP T Tsmax t Temperature Tsmin ts Preheat Ramp-down 5 t 5 o to Peak Time Profile eature Sn-Pb utectic ssembly Pb-ree ssembly verage ramp-up rate (T to T P ) < o /sec < o /sec Preheat - Temperature in (Ts min ) - Temperature ax (Ts max ) - Time (min to max) (ts) o 5 o 6~ sec 5 o o 6~8 sec Tsmax to T - Ramp-up Rate < o /sec < o /sec Time maintained above: - Temperature (T ) - Time (t ) 8 o 6~5 sec 7 o 6~5 sec Peak Temperature (T P ) 4 o +/-5 o 6 o +/-5 o Time within 5 o of actual Peak Temperature (t P ) ~ sec ~4 sec Ramp-down Rate <6 o /sec <6 o /sec Time 5 o to Peak Temperature <6 minutes <8 minutes. low (wave) soldering (solder dipping) Products Peak temperature ipping time Pb devices. 45 o ±5 o 5sec ±sec Pb-ree devices. 6 o +/-5 o 5sec ±sec 6I, 6, 6, 6