1. (2pts) Why is the Q-point of a common source amplifier often placed near the middle of the load line?
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1 EE 330 Exam 3 Fall 2014 Name Instructions: This is a 50 minute exam. Students may bring 3 page of notes (front and back) to this exam. There are 10 questions and 5 problems. There is also an optional extra credit problem. The points allocated to each question and each problem are as indicated. Please solve problems in the space provided on this exam and attach extra sheets only if you run out of space in solving a specific problem. If references to semiconductor processes are needed beyond what is given in a specific problem or question, assume a CMOS process is available with the following key process parameters; ncox=100a/v 2 pcox=ncox/3,vtno=0.5v, VTPO= - 0.5V, COX=2fF/ 2, = 0, and If reference to a bipolar process is made, assume this process has key process parameters JS=10-15 A/ 2, β=100 and VAF =. Specify clearly what process parameters you are using in any solution requiring process parameters. Also attached to this exam is a table discussed in class that relates to the basic amplifier configurations. 1. (2pts) Why is the Q-point of a common source amplifier often placed near the middle of the load line? 2. (2pts) In terms of the small-signal model parameters, give the small-signal equivalent circuit of a diode-connected n-channel MOSFET 3. (2pts) In the Common Gate amplifier, why is the input on the source rather than on the drain? 4. (2pts) The cascode configuration is actually a cascade of two basic amplifier stages. In a bipolar process, what type of basic amplifier is the first stage of the cascode configuration? Page 1 of 11
2 5. (2pts) Part way through the design of an integrated circuit, the system was represented as an interconnection of a number of multiple-input NOR gates. At what level (Behavioral, Structural, or Physical) in the design hierarchy was the designer at with this interconnection of gates? 6. (2pts) There are many different desirable characteristics of a logic family but one is generally viewed as more important than all of the rest. Which is the most important? 7. (2pts) What is a standard cell library? 8. (2pts) Resistors and capacitors are widely used for biasing discrete bipolar amplifiers. What circuit element is most widely used in biasing integrated MOS integrated circuits? 9. (2pts) Consider a MOS transistor and a BJT transistor biased at the same current levels with the MOS device operating in the saturation region and the BJT operating in the forward active region. Circle the appropriate letter to indicate which of the following is true. a) The output impedance of the MOS transistor is much larger than that of the BJT b) The output impedance of the MOS transistor and the BJT are comparable c) The output impedance of the MOS transistor is much smaller than that of the BJT 10. (2 pts) Which of the basic bipolar amplifier structures has a low input impedance and a high output impedance? Page 2 of 11
3 Problem 1 (16 Pts.) Assume the capacitor in the following circuit is large. a) Determine W so that the quiescent drain voltage is 0V b) Parametrically determine the small-signal voltage gain in terms of the smallsignal model parameters of the transistor and the resistors R1 and R2. c) Numerically determine the small-signal voltage gain if the quiescent drain voltage is 0V. 2.5V R K V OUT V IN W=? L=1u C R 2 10K -2.5V Page 3 of 11
4 Problem 2 (16 Pts.) Determine the voltage VOUT. 5V M 3 W=10µ L=1u 2K R 4 V OUT Q 1 Q 2 A E1 =100µ 2 A E2 =800µ 2 Page 4 of 11
5 Problem 3 (16 Pts.) Assume the MOSFET and the BJT are biased to operate in the saturation region and the forward active region respectively. Obtain the amplifier twoport model for the following circuit in terms of the small signal model parameters of Q1 and M2. V IN Q 1 M 2 V OUT Page 5 of 11
6 Problem 4 (16 Pts) Assume the capacitors in the following amplifier are large. Also assume the transistors are biased to that all BJTs are operating in the Forward Active region and all MOSFETs are operating in the saturation region. a) Draw the small-signal equivalent circuit b) Obtain an expression for the small-signal voltage gain in terms of the small-signal model parameters and the resistors in the circuit 2.5V R 2 R 4 M 4 V IN M 1 C 1 W=? L=1u R 3 10K Q 3 Q 2 C 2 V OUT R 1 R 5 R 6-2.5V Page 6 of 11
7 Problem 5 (16 Pts) Assume the nonlinear three-terminal device in the circuit shown below is characterized by the equations I V e 2V1 1 1 I 10V V V a) Determine the small signal model in terms of V1Q and V2Q. b) Determine the Q-point for the circuit given below c) Determine the small-signal voltage gain for the circuit given below d) Give the total output voltage for the circuit given below if VIN=0.0002sin500t 5V 100Ω 100Ω I 1 I 2 V 1 Three-terminal Device V 2 Page 7 of 11
8 Problem 6 (15 pts extra credit) The detective problem! Assume you were told that the circuit shown in the shaded rectangle was part of a hardware Trojan embedded in a large IC and that the value for W/L and the resistor R are needed to fully understand how the Trojan works. Since the circuit was embedded, it was not possible to see what was inside the integrated circuit so a client decided to make electrical measurements to determine W/L and R. So, power was supplied with an 8V and -2V supply as indicated and the first thing that was measured was the dc power dissipation when the small signal input was 0. The power dissipation was 1mW. Then the small signal voltage gain was measured; it was - 6. When a third measurement was attempted, the circuit self-destructed into a pile of dust so no additional measurements could be made. Determine R and W/L from the limited measurements that were made before the circuit selfdestructed. Assume you know the circuit was fabricated in the process that has model parameters listed on the first page of this exam. 8V R V OUT V IN M 1-2V Page 8 of 11
9 TRANSISTOR PARAMETERS W/L N-CHANNEL P-CHANNEL UNITS MINIMUM 3.0/0.6 Vth volts SHORT 20.0/0.6 Idss ua/um Vth volts Vpt volts WIDE 20.0/0.6 Ids0 < 2.5 < 2.5 pa/um LARGE 50/50 Vth volts Vjbkd volts Ijlk <50.0 <50.0 pa Gamma V^0.5 K' (Uo*Cox/2) ua/v^2 Low-field Mobility cm^2/v*s COMMENTS: XL_AMI_C5F FOX TRANSISTORS GATE N+ACTIVE P+ACTIVE UNITS Vth Poly >15.0 <-15.0 volts PROCESS PARAMETERS N+ACTV P+ACTV POLY PLY2_HR POLY2 MTL1 MTL2 UNITS Sheet Resistance ohms/sq Contact Resistance ohms Gate Oxide Thickness 144 angstrom PROCESS PARAMETERS MTL3 N\PLY N_WELL UNITS Sheet Resistance ohms/sq Contact Resistance 0.78 ohms COMMENTS: N\POLY is N-well under polysilicon. CAPACITANCE PARAMETERS N+ACTV P+ACTV POLY POLY2 M1 M2 M3 N_WELL UNITS Area (substrate) af/um^2 Area (N+active) af/um^2 Area (P+active) 2308 af/um^2 Area (poly) af/um^2 Area (poly2) 53 af/um^2 Area (metal1) af/um^2 Area (metal2) 32 af/um^2 Fringe (substrate) af/um Fringe (poly) af/um Fringe (metal1) af/um Fringe (metal2) 48 af/um Overlap (N+active) 206 af/um Overlap (P+active) 278 af/um Page 9 of 11
10 Basic Amplifier Gain Table BJT CE/CS MOS CC/CD CB/CG CEwRE/CSwRS BJT MOS BJT MOS BJT MOS R D V R in E R S R D R E R S R D A V gm - gmr 1 g C mrc gm ge ICQRC 2IDQR D - I V CQRE 2IDQR V E ICQRC t EB ICQR E + Vt 2IDQR E + VEB Vt 2IDQR C VEB RE R in R out βvt ICQ r r π + βre π Vt β R E I CQ Vt ICQ -1 g m VEB 2IDQ Vt ICQ -1 g m VEB 2IDQ r π + βre Vt β R E I CQ Page 10 of 11
11 Page 11 of 11
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