Metal-Oxide-Silicon (MOS) devices PMOS. n-type

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1 Metal-Oxide-Silicon (MOS devices Principle of MOS Field Effect Transistor transistor operation Metal (poly gate on oxide between source and drain Source and drain implants of opposite type to substrate. Gate is biased to invert channel below oxide apply voltage bias to gate, which... gives field across oxide modulates current in conducting channel PMOS transistor can be used as switch (digital or amplifier (analogue L p W p n-type 12

2 MOS Field Effect Transistor Operation - input signal is voltage on gate very high input impedance > Ω I-V behaviour nmos V G > V T to switch on, vary V DS linear region source G oxide D I DS body pmos S gate D G body nmos S n-fet drain I DS ~ (V G - V T V DS saturation region n type channel pinch off near drain I DS ~ (V G - V T 2 p type inverted channel depleted region substrate I DS / V GS = i ds /v gs = g m = (2µC ox I DS W/L 1/2 transconductance defined by geometry & current only - important for IC design 13

3 Designing with MOSFETs Mostly operate in saturation - choice of gate-source voltage determines current but often bias with current source, so gate voltage "selected by" current 2SK3019 small signal switching linear region saturation region slope g m in saturation region 14

4 Simple MOSFET applications Voltage controlled switch very high resistance in OFF state R ON ~ 5-100Ω fast response ~nsec bi-directional Voltage controlled resistor operate in linear region R DS ~ 1/(V G - V T convenient for IC design i in +V 0V input on off Multiplexer A[0:3] output V control CSample and Hold in 0 in 1 in 2 in 3 output Address decoder v out 15

5 ElectroStatic Discharge MOS circuits are prone to damage from ESD gate oxides are thin layers - few nm in advanced technologies oxide breakdown field < 1000MV/m = 1V/nm Human body can easily charge to 30-40kV walking across carpet on a dry day precautions: circuits designed with protection diodes stand on conductive pad and earth body with wrist strap 4000V ESD test 16

6 CMOS = Complementary MOS Both pmos and nmos transistors on same wafer by putting p-type "wells" into n-type wafer (or vice-versa build nmos transistors in locally p-type region Why? NMOS inverter CMOS inverter V DD V DD V DD R 0 V DD 0 NMOS consumes power in low state basis of almost all modern logic CMOS version consumes power only when switching In IC technologies, accurate resistors are harder to make than C and transistors 17

7 Junction FET Almost identical to MOSFET - difference is Gate is implanted p-n junction voltage on gate depletes bulk silicon current conducting channel reduced or enlarged V GS -> I DS G D S Characteristics - similar to MOSFET gate is reverse biased diode high input impedance ( 10 9 Ω small current from diode leakage usually operated in saturation channel 'pinched off' by depletion. drain p type gate source typical values g m ~ 10mA/V = 1/100Ω = 10mS n type I DS n + depleted region 18

8 FET circuits Building blocks resemble bipolar circuits Source follower (cf emitter follower i ds = g m (v g - v s = g m (v in - v s v out = v s = i ds = g m (v in - v s v out /v in = g m /(1 + g m 1 R in ~ Ω R out = R DS = /(1 + g m not low v in i d = v gs g m v out Common Source amplifier - v out /v in = -g m R D /(1 + g m R in high R out R D R DS = R D /(1 + g m R D v out v in R D = v in g m v in i out but more common configuration uses current source with suitable load i out = g m v in 19

9 FET limitations On Resistance although small, it contributes to RC time in fast switches Capacitance inevitable capacitances between nodes, important for high speed circuits C gate ~ C ox WL for MOSFETs Relevance to op-amps FET amplifiers have much higher input impedance and draw much lower currents Cautions Latch-up under certain conditions, parasitic bipolar transistors formed MOS circuits can go into high current states - destructive ESD care needed in handling protection networks can degrade performance 20

10 Another building block - the current mirror (if time Q 1 & Q 2 are identical transistors V BE1 = V BE2 and V BE (kt/qlog e I E so I out = I ref R load widely used in ICs where closely matched transistors are easy to construct - useful to program currents add a resistor I out =(kt/qrlog e (I ref /I out eg R = 1kΩ, I ref = 1mA => I out = 67µA add another resistor V BE1 V BE2 I 1 /I 2 = R 2 /R 1 R also works for discrete circuits R 1 R 2 21

11 Band-gap circuit To be more precise, V BE ~ log(current density so in non-matched transistors with same current, and ratio of emitter areas r V BE1 -V BE2 = (kt/qln(r easy to achieve in IC technology Principle of AD590 T sensor Proportional To Absolute Temperature (PTAT I 1 = I 2 V BE = (kt/qln(r = I 1 R I = I 1 + I 2 = (2kT/qRln(r r = 8 R 1kΩ I 300K R should vary little with T AD590 precision actual AD590 only slightly more complicated R + I 1 I r 1 I - 22

12 Transistor differential amplifier (for the ambitious DC R 1 is large, to act as current source V A = V EE + IR 1 V E1 = V A + I 1 R E V E2 = V A + I 2 R E (ignoring r e AC v 1 V CC R C R C v o v 2 I 1 R E A R E I 2 v 1 = v A + i 1 R E = ir 1 + i 1 R E v 2 = v A + i 1 R E = ir 1 + i 2 R E I R 1 i = i 1 + i 2 v 1 - v 2 = (i 1 - i 2 R E v 0 = - i 2 R C For differential inputs v 1 = - v 2 so i = 0 G diff = v 0 /(v 2 - v 1 = R C /2R E Common mode v 1 = v 2 = v cm /2 v 1 + v 2 = 2iR 1 + (i 1 + i 2 R E = i(2r 1 +R E V EE Variants - R C in Q1 loop omitted - replace R by current source - omit R E s - differential outputs G cm = v 0 /v cm = -R C /(2R 1 +R E CMRR 2R 1 /R E R 1 >> R E 23

13 What's inside an op-amp Look for the building blocks... MOS IC amplifiers look similar but currents determined by transistor aspect ratios 24

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