I D1 I D2 V X D 1 D 2 EE 330. Homework Assignment 6 Spring 2017 (Due Friday Feb 17)

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1 EE 330 Homework Assignment 6 Spring 2017 (Due Friday Feb 17) Unless specified to the contrary, assume all n-channel MOS transistors have model parameters μncox = 100μA/V 2 and VTn = 1V, all p-channel transistors have model parameters μpcox = 33μA/V 2 and VTp= -1V. Correspondingly, assume all npn BJT transistors have model parameters JS= A/μ 2 and β=100 and all pnp BJT transistors have model parameters JS= A/μ 2 and β = 25. If the emitter area of a transistor is not given, assume it is 100μ 2. If parameters are needed for process characterization beyond what is given, use the measured parameters from the ON 0.5μ process given below as model parameters. Problem 1 Size an n-channel transistor in the ON 0.5µ CMOS process so that the impedance in the switch-level model is 4000Ω when operating with a 3.5V power supply. Repeat for an n-channel transistor in the IBM 0.13µ CMOS process when operating with a 1.5V supply. Problem 2 If a minimum-sized inverter designed in the ON 0.5µ CMOS process could directly drive a minimum-sized inverter designed in the IBM 0.13µ CMOS process, what would be thl and tlh? Assume a supply voltage of 1.5V. Neglect any interconnect parasitics. Problem 3 Assume the junction area of D1 is 200μ 2 and that of D2 is 4 times as large. Determine the current ID1 if VX=1.5V. Assume JS for the process where the diodes are fabricated is 5fA/μ 2. 1K V X I D1 I D2 D 1 D 2 Page 1 of 12

2 Problem 4 Analytically determine the variable indicated by a? in the following circuits. Assume the devices are in a process with VTN=1V, VTP=-1V, μncox=100μav -2 and μpcox=33μav -2. 5V 5V 5V 3V 4K W=6u L=2u =? 2V 25K =? W=12u L=1.5u 3V W=6u L=2u 5K =? Problem 5 Analytically determine the variable indicated by a? in the following circuits. Assume the devices are in a process with VTN=1V, VTP=-1V, μncox=100μav -2 and μpcox=33μav -2 6V 10V M 2 W=2u L=6u W=8u L=2u M 2 W=12u L=4u =? I OUT =? W=6u L=2u I 1 400μA R 2 1.5K Problem 6 Consider the following circuit. a) If VIN=3V, determine the dimensions of M1 that will result in an output voltage of 3.5V. Assume that the dimensions of M2 are W2=6µ and L2=2µ. The relevant model parameters of the devices are VTN=1V, VTP=-1V, μncox=100μav -2 and μpcox=33μav -2. b) Repeat part a) if the goal is to have an output voltage of 0.5V. 5V M 2 VOUT V IN Page 2 of 12

3 Problem 7 Assume the op amp is ideal and biased with VDD=20Vand VSS=-20V and the diode is characterized by model parameters: area of the junction is 300u 2. a) Determine VOUT if T= -20 o C b) Repeat part a) if T= 40 o C. c) Repeat part a) if T=120 o C J SX =0.5A/μ 2, V G0 =1.17V, m=2.3. Assume the 10K 0.575V Problem 8 Determine VOUT for the following circuit. Assume the devices M1 and M2 are identically sizes with W=L=5u. The relevant model parameters of the devices are VTN=1V, VTP=- 1V, μncox=100μav -2 and μpcox=33μav -2. 5V 3V M 2 Problem 9 Design a circuit using only MOS transistors that has an output voltage of 2V. In addition to the transistors, you have a single dc power supply of 10V available. You may use as many MOS transistors as you want and can specify any size for the devices. Problem 10 Assume a junction capacitor has a capacitance of 500fF with zero volts bias. What will be the value of this capacitor with a reverse bias of 2V? With a forward bias of 250mV? Problem 11 Design a voltage programmable capacitor that varies between 2pF at 0V bias and 2.5pf at a bias of 4V. Problem 12 Sketch a cross-sectional view along the BB cross-section for the CMOS layout shown below. Assume a basic CMOS process in which the n-select mask is generated from the compliment of the p-select mask. Page 3 of 12

4 Problem 13 Repeat Problem 12 along the CC cross-section C D A A B C D B Layer Map : Active n-well Poly 1 Metal Contact p- select Poly 2 Problem 14 (weighted as two problems) Using ModelSim create a 4-bit ripple-carry Adder/Subtractor. Hint: You should be able to make this using the components from the last 3 weeks of Verilog problems. Create a test bench for the code and show the following results/waveforms Page 4 of 12

5 Page 5 of 12

6 AMI 0.5u Process Description Continued Page 6 of 12

7 Page 7 of 12

8 IIBM 0.13u Process Description Continued Page 8 of 12

9 Problem 5 Assume the junction area of D1 is 100μ 2 and that of D2 is 9 times as large. Determine the current ID1 if VX=1.5V. Assume JS for the process where the diodes are fabricated is 5fA/μ 2. 1K V X I D1 I D2 D 1 D 2 Problem 25 Using Verilog, build a counter that outputs to a seven segment display. Whenever the INPUT makes a low to high transition, the counter should increase by one. This should be reflected by the seven segment display. Each bit of the seven segment display is controlled by an individual output. A high output corresponds to a lit segment while a low output causes an unlit segment. The counter should go back to zero upon passing 9. Label your outputs clearly and prove your design with sufficient testing. Problem 26 (weighted as two problems) Using Verilog, build a 3-8 bit decoder. For an input of 000 to 111 it should decode into an 8-bit number with ones from position 0 to the position noted by the decimal equivalent of the 3-bit binary number. For example, 011 will correspond to and 100 corresponds to Your design should be verified with a computer simulation. Problem 27 (Extra credit) Using Verilog, build a two-digit counter that goes back to zero after passing 99. Problem 3 Using the short-channel α-law model, determine the impedance in the switch-level model of the MOSFET for a square (W=L) n-channel device if the short-channel device has the same μcox and VT as in the IBM 0.13μ process but with short-channel parameters θ1=θ2=1/2 and α=1.25. Comment on how the short-channel effect changes the switching performance of the MOSFET. Problem 4 Consider the following circuit a) Obtain the voltage VOUT if VIN=-4V. b) Obtain the current through R2 if VIN=8V c) Obtain an expression for and plot VOUT for one period of the input if VIN = 12sin1000t Page 9 of 12

10 1K R 1 V IN D 1 R 2 Problem 9 Determine the currents indicated with a? in the following circuits. Assume the diodes are ideal. 10V I 1 =? 15V I 2 =? 15V 9V Problem 10 Determine the currents indicated with a? in the following circuits. Assume the diodes are ideal. 20V I 1 =? 20V I 2 =? 7V 4K 30V 4K Problem 13 Determine the output voltage for the following circuits Page 10 of 12

11 8V 8V 3K 6K 600K 400K A E =200μ 2 A E =500μ 2 Problem 14 Determine the currents labeled with a? 8V 8V W=10μ L=2μ I=? M 2 W=15μ L=4μ I=? A E =100μ 2 W=40μ L=2μ Problem 21 Assume the emitter area for the BJT is 400μ 2, the base area is 800 μ 2, β=100, and JS=50fA/μ 2. Determine the output voltage VOUT for the two circuits shown if A=0V. 12V 12V 400K 1.5K 400K 200uF 1.5K Asin(1000t) Problem 22 The process parameter β for a BJT is quite variable from one process run to another. If the β in a process varies between 85 and 125, what is the corresponding variation in the output voltage VOUT for the circuit shown? Page 11 of 12

12 12V 400K R 1 1.5K Problem 23 The 400K resistor in the previous problem is often termed a biasing resistor since it is used to establish the desired value of the quiescent output voltage and the biasing scheme whereby this single resistor is used to establish the base current is termed a self-bias. An alternative biasing scheme is shown below. In this circuit, the resistor R1 has been reduced to 40K and a second resistor R2 has been added to the circuit. This scheme is often termed a fixed-bias scheme. In this circuit, determine R2 so that the quiescent output voltage is the same as that for the circuit of Problem 9 when the value of β is the nominal value of V R 1 40K 1.5K R 2 R 3 0.5K Problem 24 Using the value of R2 determined in the previous problem, compare the variation of the output voltage of the self-bias circuit to that of the fixed-bias circuit if β varies between 85 and 125 Problem 16 Repeat Problem 15 if instead of using MOS transistors, you have available only BJTs. Page 12 of 12

500K V C C 1 R 1. V OUT (t) M 1 -2V

500K V C C 1 R 1. V OUT (t) M 1 -2V EE 330 Homework 8 Spring 2017 Due Friday March 3 Solve Problem 15 and any 8 of the remaining problems. Each problem is worth 10 points except Problem 15 which is worth 20 points. Unless stated to the contrary,