Carleton University ELEC Lab 1. L2 Friday 2:30 P.M. Student Number: Operation of a BJT. Author: Adam Heffernan

Transcription

1 Carleton University ELEC 3509 Lab 1 L2 Friday 2:30 P.M. Student Number: Operation of a BJT Author: Adam Heffernan October 13, 2017

2 Contents 1 Transistor DC Characterization Calculations for DC Bias Network Saturation Region Active Region Choosing Values of R c Terminal Voltages I c V. V CE V BE V. V Ce Early Voltage (V A ) and β Current Mirror Current Mirror I L V. I ref Derivation Determining Component Values :2 Current Mirror Calculations :1 Mirror Output Impedence :2 Mirror I OUT V. R L PNP Current Mirror I OUT V. R L Transistor AC Characterization h ie and h fe Calculations Current Gain-Frequency Plot Hybrid-π Model Calculations Calculating g m Calculating r π Calculating r x Calculating r µ Calculating r o Calculating ω β Calculating C π Conclusion 20 1

3 List of Figures 1 Test Circuit Under Investigation I C V. V CE for the 2N3904 used. The error on I C is 1.5% and the Error on V CE is 0.5% from the DMM manual (Fluke 17 B+) V BE V. V CE for the NPN Transistor used Linear Fit in the Active Region Linear Fit in the Active Region Showing the x-intercept Forward β V. V CE NPN Current Mirror Used in Pre-Lab Calculations I out V. R load 1:1 Current Mirror R o Output Impedence 1:1 Current Mirror in the Active Region I out V. R load 1:2 Current Mirror I out V. R load PNP Current Mirror Gain V. Frequency Plot List of Tables 1 Table of Test R c Values Junction Voltages- 2N3904 The possitive lead of the multimeter was connected to the base of the transistor. As expected there was practically no reading between the collector and emitter Junction Voltages-2N3906. The negative lead of the multimeter was placed on the base of the transistor. There was no reading between emitter and collector Table of Test R L Values

4 1 Transistor DC Characterization Figure 1: Test Circuit Under Investigation 1.1 Calculations for DC Bias Network Figure 1 is a circuit which will be used to plot the I C V.V CE curves. To determine the base current the following formula may be used 15V = (R 1 + R 2 )(I 1 + I B ) + I 1 R 3 (1) 15V = (R 1 + R 2 )(I 1 + I B ) + I B R B + V BE (2) Since the purpose of this voltage division serves to provide a voltage source to properly bias the transistor. Therefore the output impedance at this node should be substantially larger than the input impedance at the base of the BJT. This means that the current through R 1 should be much larger than I B. To begin my calculations for values of R B, R 1 and R 2 I assumed that the current through R 1 is approximately 500 times that of the base current. 3

5 Assuming β to be around 150 in the active region, and I c to be 2mA; I B should be around 13.33µA I 1 = 6.665mA I 2 = 6.65mA (3) Because I 2 is connected directly to ground. V o = I 2 500Ω V o = 3.325V R Ω = (V c V o )/I 1 R Ω = (15V 3.325V )/6.665mA (4) R 1 = 1751Ω 500Ω R 1 = 1251Ω We also know that the emitter is directly grounded, V B should be around 0.7V. R B = (V o V B )/I B R B = (3.325V 0.7V )/13.33µA (5) R B = 196kΩ 4

6 1.2 Saturation Region In this Circuit we know that V E is constantly grounded. This means that V B will have an approximate Voltage of 0.7V. The V CE of the transistor can be a minimum of 0.5V. Since the I C in the active mode is about 2mA, we can use this value to compute the lower bound of the transistors Active Region. 0.7V = 15V R 1 2mA R C = 15V 0.5V/2mA (6) R C = 7.25kΩ Any value of R C greater than 7.25kΩ will put the transistor into saturation mode. 1.3 Active Region The Active Region will hold for just about any value of R C below 7.25kΩ. 1.4 Choosing Values of R c As I C is chosen to be 2mA, the value of V CE can be determined for various values of R C : The values that were chosen to test are in the following table, there actual values and theoretical value are included. These values were selected because they cover a wide range of both the saturation and active region for the BJT. 2 Terminal Voltages As seen in Table 2 the junctions both appear as diodes with a forward bias voltage drop of approximately 0.7V. The possitive lead of the multimeter was places on the base of the transistor, this means that the anode of both the diodes is the base of the transistor, the emitter and collector are cathodes. The 2N3904 was found to be a NPN transistor. As seen above in Table 2, the junctions both appear as diodes with a forward bias drop of approximately 0.7V. In this case the negative lead of 5

7 Number R c (kω) Theoretical R c (kω) Actual V CE V V V V V Saturation Saturation Saturation Saturation Saturation Table 1: Table of Test R c Values Junction B-E C-B C-E V f V V 0 V Table 2: Junction Voltages- 2N3904 The possitive lead of the multimeter was connected to the base of the transistor. As expected there was practically no reading between the collector and emitter. the multimeter was placed on the base of the transitor. This means that in this configuration the base is the cathode of both diodes. The emitter and collector both are the anodes of the respective diodes. The 2N3906 was found to be a PNP transistor. 6

8 Junction B-E C-B C-E V f V V 0 V Table 3: Junction Voltages-2N3906. The negative lead of the multimeter was placed on the base of the transistor. There was no reading between emitter and collector. 2.1 I c V. V CE Figure 2: I C V. V CE for the 2N3904 used. The error on I C is 1.5% and the Error on V CE is 0.5% from the DMM manual (Fluke 17 B+). Above is the plot of I C V. V CE. As expected, the transitor enter the active mode at around 0.5V. Once the transistor is in the active mode, the collector current is quite stable around 1.99mA. 2.2 V BE V. V Ce The following is a picture of the V BE V. V Ce. 7

9 Figure 3: V BE V. V CE for the NPN Transistor used 2.3 Early Voltage (V A ) and β The following is a graph depicting a linear fit for the active region of the 2N3904 transistor. Figure 4: Linear Fit in the Active Region 8

10 Figure 5: Linear Fit in the Active Region Showing the x-intercept I = 5.00µA/V V CE µA (7) Above is the equation for the Linear curve projected back to the X-Axis Solvinng for y = 0 the x-intercept and therefore the Early Voltage is 380V. This is a fairly high value for the early voltage. Because it s very sensitive to the error in measurement, it s possible that calculating it at higher values of I C would yield a lower V A. To recap the findings below: the average value of β was found to be 212. This is within the typical range for a 2N3904 transistor. 9

11 3 Current Mirror Figure 6: Forward β V. V CE 3.1 Current Mirror I L V. I ref Derivation Figure 7: NPN Current Mirror Used in Pre-Lab Calculations 10

12 Using the equation for current I L I L = βi B2 (8) KVL through the I ref down through the emitter of the second transistor: V CC R ref I ref V BE2 R E2 (I L + I B2 ) = 0 (9) Substituting into the first equation: Solving for I L I L = β 2 R E2 (V CC R ref I ref V BE2 ) β 2 I L (10) I L = Using the experession solving for I ref β 2 R E2 (1 β 2 ) (V CC R ref I ref V BE2 ) (11) I ref = β 1 I B2 = I B1 = I ref β 1 (12) The KVL expression for the left branch through the base can be simplified to: V CC R ref I ref V BE1 R E1 (I ref IB 1 ) V CC R ref I ref V BE1 R E1 I ref (1 1 β 1 ) (13) Solving for the above R ref R ref = 1 I ref (V CC V BE1 R E1 I ref (1 1 β 1 )) (14) The above equation may be inserted into the experession for I L I L = Assuming that V BE1 = V BE2 β 2 R E2 (1 β 2 ) (V BE 1 V BE2 R E1 I ref (1 1 β 1 )) (15) and β is large: I L = R E 1 R E2 I ref (16) 11

13 3.1.1 Determining Component Values Since R E1 was specified to be around 2kΩ, for the 1:1 current mirror we know to set R E2 to the same value of 2kΩ To calculate the value of R ref, note that for the 1:1 current mirror I ref = I E1, then the following equations may be used to solve for R ref V B = V CC I ref R ref = I E1 R E1 + V BE1 V CC I ref R ref = I ref R E1 + V BE1 R ref = V CC I ref R E1 V BE1 I ref (17) R ref = 15V (0.5mA)(2kΩ) 0.7V 0.5mA R ref = 26.6kΩ Therefore R ref was measured to be 26.65kΩ To chose values of R L we must consider which values of R L will drop too much voltage bringing the rightmost transistor into saturation. Since the bias causing the current is due to the value of Rref it is reasonable to assume that the value of R L must me less than or equal to Rref to avoid saturation. Following this rule the following table was constructed for values of R L to test. 12

14 Number R L (kω) Theoretical R L (kω) Actual V CE V V V V V Saturation Saturation Saturation Saturation Saturation Table 4: Table of Test R L Values 3.2 1:2 Current Mirror Calculations Since I L I ref is approximately R E 1 R E2 when V BE1 = V BE2 and β is large, we can calculate the relationship between R E1 and R E2 needed to obtain a 1:2 current mirror. I L = 2(I ref ) I L = R E 1 R E2 I ref (18) R E 1 R E2 = 2 2R E2 = R E1 Therefore if R E2 is chosen to be 2kΩ then R E1 must be chosen to be 1kΩ 3.3 1:1 Mirror Output Impedence As seen in the figure below, at low load resistances the current appears to be constant, however as the load resistance increases beyond approximately 28kΩ the output current starts to drop dramatically. This point was predicted in the theory as the value of R ref, as the output transistor goes into saturation as V C goes too low. 13

15 Figure 8: I out V. R load 1:1 Current Mirror Figure 9: R o Output Impedence 1:1 Current Mirror in the Active Region As seen in Figure 9 the output resistance of the 1:1 current mirror was 1.05MΩ. Note that only the active mode of the current mirror was taken since that is where the circuit is supposed to operate. The output resistance was found to be sufficiently high. A high output resistance is desirable since it acts in parallel to the current source and allows large voltage swing with 14

16 minimal current swing :2 Mirror I OUT V. R L Figure 10: I out V. R load 1:2 Current Mirror As seen in Figure 10 the output current is approximately constant throughout the different load resistors applied. The output current is also approximately 2 times the reference current. 3.5 PNP Current Mirror I OUT V. R L A seen in Figure 11 the output current is approximately constant over the different load resistances. The output current is approximately equal to the output current of the NPN mirror, showing that the PNP mirror is indeed mirroring the current across at a 1:1 ratio. When the base and collector of a transistor are shorted together it behaves as just a diode from the base emitter junction. It cannot enter saturation, since the base and collector will always be at the same voltage. The voltage of the base and collector cannot go below the voltage of the emitter since they are in the same current path and will therefore always be kept one diode drop lower. 15

17 Figure 11: I out V. R load PNP Current Mirror 4 Transistor AC Characterization 4.1 h ie and h fe Calculations The RMS value of V be was found to be 3.212mV. The RMS value of i base was set to 0.999µA then h ie can be calculated h ie = V be = 3.212mV i base 1µA = 3.215kΩ (19) The RMS value of i c was measured to be 21.8mV and the measured value of the load resistor was 99.1Ω. The value of h fe can be calculated: i c = V c R L = 21.8mV 99.1Ω = µA h fe = i c i b = µA 0.999µA = 220 (20) Both the values ofh ie and h fe are within the nominal range of the 2N3904. There are several reasons for why the load resistance cannot be made to be 0. First of all, if it was actually zero, the low frequency cutoff would go up a lot. Even if the ground path had a resistance of 1Ω, which is more than a 16

18 straight short, the low frequency cutoff would be roughly: F L = 1 2πRC = 1 2π 1Ω 100µF = 1.5kHz (21) This frequency is already greater then the driven frequency. Furthermore, because h fe is a low frequency parameter the frequency cannot be increased to compensate. Another reason that the resistance cannot be zero would be because it would not allow for a voltage drop to measure the current over. Even if an ammeter was connected as the ground path, it would still have a resistance to measure the voltage drop over. The only possibility around this would be to use a current transducer to passively measure the current in the path, however the first problem would just become worse if this was done. From part 2, the slope of I C V. V CE was found to be 5.00 µa. This is V the value of h oe and this value is within the accepted range for a 2N Current Gain-Frequency Plot The plot from day 2 of lab 1 is below: The source Voltage was measured to be 143mV peak peak The average gain for low frequencies is approximately Figure 12: Gain V. Frequency Plot A 3dB drop corresponds to about 100.5KHz The calculated f T is 17

19 therefore: f T = h fe f β = kHzf T = MHz (22) This value is just less than the specified minimum value of 300 MHz. However, if the x-intercept of the regression of the dropout line is used, the value approximately 400 MHz. There are not very many points to do a regression with so the error on this value is likely very high. 4.3 Hybrid-π Model Calculations Calculating g m g m is the transconductance for the BJT used. Which specifies the slope of the voltage controlled source in the Hybrid-π model. g m = I C V T g m = µA 25mV (23) g m = 8.80mS(Siemens) Calculating r π r π is the apparent input resistance for the hybrid-π model of the given transistor. The voltage across this resistor is proportional to the current in the transistor. r π = h fe g m r π = mS (24) r π = 25.02kΩ 18

20 4.3.3 Calculating r x r x is the resistance which appears in series with the base of the transistor, it is usually negligible. Due to experimental error in this case h ie r π is a negative value. Therefore let us set r x to 0Ω Calculating r µ r µ is the feedback resistance across the base and collector in the hybrid-π model. It is usually a very large value as very little current flows from the base to the collector. r µ = r π h r e r µ = 25.02kΩ 0 (25) r µ = Calculating r o r o is the resistance across the emitter and collector of the transistor, usually acting as a large load resistor, which is negligible compared to the load on the transistor. r o and r µ together result in the early voltage of the BJT. r o = h oe 1 r o = (3.23 µa V ) 1 (26) r o = 200kΩ 19

21 4.3.6 Calculating ω β ω β is the cut-frequency for the transistor expressed in radians per second. ω β = 2πf β ω β = 2π MHz (27) ω β = 1383 Mrad s Calculating C π C π is a parasitic capacitance of the bjt which shorts r π across the base and emitter at high frequencies. As it shorts r π, v π decreases, lowering the gain of the transistor at high frequencies. The following yielded a negative value, therefore let C π = 0. C π = 1 r π ω β C µ (1 + v o v b e ) C π = 1 (25.02kΩ)(1383 Mrad ) s (4pF )( mV 25mV ) (28) C π = negative 5 Conclusion Using the diode test function on a DMM, the 2N3904 was found to be an NPN transistor and the 2N3906 was found to be a PNP transistor. The 2N3904 DC characteristics were found to all be within the nominal range specified on the datasheet. A 1:1 current mirror was made with the 2N3904 transistors and it s load matching characteristics matched the expected range. Then the current mirror was modified to have a 1:2 ratio and it also worked as expected. Then the NPN current mirror was connected to a PNP current mirror and the load characteristics were analysed. Next, the AC characteristics of the 20

22 transistor were found. As before they were all within the nominal range. Using these characteristics, the Hybrid-Pi model values were calculated. 21