EE 501 Lab 1 Exploring Transistor Characteristics

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1 Objectives: Tasks: EE 501 Lab 1 Exploring Transistor Characteristics Lab report due on Sep 8th, Make sure you have your cadence 6 work properly 2. Familiar with characteristics of MOSFET such as gain, speed, power, transconductance, output impedance and so on. 3. Explore how the I-V curves vary with operation conditions. 4. Explore how MOSFET threshold voltage varies with operation conditions. 5. Explore how MOSFET g m and g ds varies with operations conditions, biasing, and sizing. 1. Generate i D vs. v GS and i D vs v DS relationships for various transistor sizes, various biasing, and various operation conditions. Present the I-V relationships in ways easy to interpret. 2. Use one single minimum-sized transistor circuit to generate one I-V relation, you can then change device size by L=1, 2, 4, 8 times L min, then by W= 1, 2, 4, 8, 16 times W min, to investigate different characteristic of MOSFET. Provide analysis and explanation on any observations you have. 3. You may sweep v GS with about 25mV steps from 0 to 2*V T while letting i D be automatically generated. In this case, you need to be sure that V GS and V DS is selected so that the MOSFET is in your intended region. Alternatively, you can sweep i D by a current source with geometric doubling from 1pA to a few ma, while letting v GS to be automatically generated. 4. When you sweep v DS, let your v DS go from 0 to 2*V T, while setting v GS at a small number of different values (eg 1, 1.2, 1.4, 1.6, and 1.8 times V T ). 5. Plot Log(i D ) vs (v GS V T ) under at least 3 temperatures and three V BS values provide observations and explainations. 6. Plot sqrt(i D *L/W) vs V GS under at least 3 temperatures and three V BS values, provide observations and explainations. 7. Present the results graphically to show g m and g ds vs. current density. 8. Investigate Rout.

2 Suggestions: 1. You can use DC and AC voltage/current sources, any form of dependent sources (eg VCVS), ideal op amps, and so on. 2. Your NMOS V B should always be the lowest voltage in the entire circuit. You can use the components in 1 to set V S, V G, V D, or V DS, V GS, i D and so on. 3. It is recommended that you build test bench yourself. Or you can follow the instruction below. 4. For simultaneous effect of two variables, you may use 3D plot such as those generated using the mesh command of Matlab. 5. Write a report summarizing what you did for simulation and data analysis( half page is sufficient), presenting your results in graphical form (with a couple sentences of explanation for each graph), and draw some conclusions(several sentences). 6. Submit your report electronically in Word or PDF. Examples: Simulation bench NMOS simulation bench Part 1 Ids vs. Vds You can determine each terminal s voltage yourself. Or you can setup configuration as below. In ADE, initial the variables V G = 0.8 V, V B =0V, V S = 0V and V D = 2V. In DC sweep, set the VD start voltage at 0Vand stop at 2V, and step size 1mV. Then open Tools Parametric Analysis. Set the V G 10 steps in between 0.8 and 1V. As shown in figure. Go to Outputs and set drain current of N0/D by clicking to be plotted node. Run a sample simulation on ADE first, and then run the parametric simulation. You can also observe the operation region of the transistor.

3 Repeat the measurements for V B = -0.5V and V B = -1V and analyze results. Change VB=0V again, and choose temperature from -40 to 150 degrees (this is typical range that circuits operating). Part 2 Ids vs. Vgs You can also determine each terminal s voltage yourself. Or you can setup configuration as below. In ADE, initial the variables V G = 0.8 V, V B =0V, V S = 0V and V D = 2V. 1. Do DC sweep. Set the V G start at 0V and stop at 1.5V. Step size is 1mV. Set the V B 5 steps in between 0 and 1V. Plot I d vs. V gs. 2. Setup appropriate sweep range to investigate subthreshold conduction. Then Plot Log(i) vs. Vgs and vs. V gs and see the exponential dependence in subthreshold region. 3. Choose 10 temperatures from -40 to 150 degrees, and run the same V G sweep simulation in ADE, plot the group of Log(i) vs. V gs and vs. V gs in same plot to see how the temperature affects the threshold voltage. Part 3 g m & g ds vs. V gs & i/w(current density) One way to obtain gm & gds plot is to simulate i-v curve and take the derivatives. The other easier way is to plot directly from cadence calculator. Open calculator, click OP. after a pop up window comes out, click the NMOS/PMOS, then click list on the pop up window and select gm or gds, plot it. Once you have collected all data you need, export to either Excel or Matlab. For this lab, Excel is probably more convenient. You can use any software tool to generate the plots you want. For V T, you can use your data and curve-fit with the level 1 model. For g m and g ds, you can either use

4 Cadence generated numbers of you can use your data to compute them (eg gm = delta_i_d / delta_v_gs). Part 4 Output resistance Set test bench as below. Set w n =2.4um, l n =600nm, i d = 10uA, V G =1V, V B =V S =0V, V DD =2.5V. Do parametric analysis about i d. Then plot V D. R out is defined as v ds over i d.

5 Sample graphs to be generated: The graphs below shows some example. You may want to normalize voltages by V T0, and plot i D /W. Instead of i D, you may consider sqrt(i D ) or sqrt(i D /W). For the x-axis, you may consider [v GS V T (T, V BS )]/(kt/q)

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