MOSFET Amplifier Biasing

Transcription

1 MOSFET Amplifier Biasing Chris Winstead April 6, 2015 Standard Passive Biasing: Two Supplies V D V S R G I D V SS To analyze the DC behavior of this biasing circuit, it is most convenient to use the following steps: 1. Specify the desired bias current I D. 2. Using the square law, solve for the required V GS. 3. Because the gate is biased at zero volts, we see that V S = V GS. Then the resistance is simply = (V S V SS ) I D 4. We may then find the maximum allowed while still keeping this device in saturation: Numerical Example V DS > V GS V Th I D V S > V S V Th I D > V Th < V Th + I D Suppose our MOSFET device has the following characteristics: 1

2 k n = 1mA/ V 2 V Th = 0.5V = 5V V SS = 5V and suppose we desire I D = 1mA. Then we arrive at: 1. V GS = 2ID k n = 1.91V. 2. V S = V GS = 1.91V. 3. = 3.090kΩ. 4. < 5.500kΩ. Using a Bypass Capacitor Ideally, a Common-Source amplifier like the one shown should have a gain equal to g m, where g m = 2k n I D Unfortunately the presence of causes the gain to decrease. It can be shown that ( ) A v = g m r o, + + r 0 + g m r o where r o is the MOSFET s built-in output resistance (typically on the order of 100kΩ). The term in parentheses can be much less than 1, resulting in very low gain. When using resistor biasing, we commonly assume that r o, so that the gain becomes A v g m 1 + g m The gain is maximized when = 0, but without the circuit s DC bias becomes very sensitive to calculation errors, component mismatch, temperature changes, and minor environmental factors. This creates a difficult tradeoff. To improve the gain of this circuit configuration, we may insert a bypass capacitor that masks the presence of : V D AC signals R G C B V SS 2

3 When C B is inserted, is has the effect of short-circuiting at higher frequencies. To obtain a value for C B, we may follow this procedure: 1. Specify the lowest frequency f at which the amplifier is to be used. 2. At the specific frequency f, C B can be treated as a resistor with effective resistance R B = 1/2πfC B. This should have a low value, say 1 to 10Ω. Then C B = 1Ω 2πf. The effective resistance of C B appears in parallel with, and becomes very small as f increases. Hence can be utilized to obtain a good DC bias solution, and its effects can be made to disappear at higher frequencies. Numerical Example Suppose our amplifier should operate at frequencies above 100kHz. Then the necessary capacitance is C B = 1.59µF. This capacitance is suitable for implementation on a breadboard or printed circuit board, but is too large for most integrated circuit designs. Active Feedback Bias Another method of biasing is possible in high-performance amplifiers. In this method, we use an amplifier (like an op amp) in a feedback bias arrangement: V D R big R G V D + This bias approach uses the op amp to zero the difference between the desired DC output (V D ) and the actual DC output (V D ). In an integrated circuit, this approach can be realized by implementing a low-quality amplifier for the feedback op amp. Notice that we can eliminate altogether because the 3

4 feedback circuit is able to adapt to minor errors like mismatch, temperature variation and parametric drift. To understand how this feedback adaptation operates, consider what happens if V D V D. First, suppose V D > V D. In this case, V G decreases toward zero, which tends to turn off the MOSFET. Then I D also decreases, so the voltage drop across is reduced, causing V D to increase. On the other hand, if V D < V D, then the op amp will tend toward its positive rail. This will increase V G, and increase the degree to which the MOSFET is on, which tends to pull V D to a lower value. Putting these two analyses together, it is clear that V D will always be changed in a direction that makes it closer to V D. Therefore the stable end-result is that V D = V D. The MOSFET Gain Configurations This section summarizes the characteristics of MOS amplifier configurations with passive bias (i.e. biased with ordinary resistors). Common-Source Characteristics: Input: GATE Output: DRAIN Gain: g m (INVERTING!) Output resistance: R out = 4

5 Common-Gate + + Characteristics: Input: SOURCE Output: DRAIN Gain: g m (NON-INVERTING!) Output resistance: R out = Common-Drain (Source Follower) Characteristics: Input: GATE Output: SOURCE 5

6 Gain: 1 (FOLLOWER!) Output resistance: R out = 1/g m Level-shifts: = ± V GS 6