CHAPTER 8 FIELD EFFECT TRANSISTOR (FETs)

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1 CHAPTER 8 FIELD EFFECT TRANSISTOR (FETs) INTRODUCTION - FETs are voltage controlled devices as opposed to BJT which are current controlled. - There are two types of FETs. o Junction FET (JFET) o Metal Oxide Semiconductor FET (MOSFET) - The basic difference between the two is in terms of their construction. - Both have the advantage of high input resistance and low output resistance as compared to BJT. - Both have an advantage of high power output. 8-1 THE JFET - JFET operate with a reverse biased pn junction to control the current in a channel. - Depending upon the construction, JFETs fall in either of two categories, o n-channel o p-channel - The basic representation of the both is given in Figure 1. - Wires are connected to each end of the n-channel (Figure 1a). - Upper end is the Drain while the lower end is the Source. - Two p-types regions are diffused in the n-channel to form a channel. - Both p-regions are connected to the Gate. Figure 1 Basic structure of JFET Basic Operation - The basic operation of the JFET is illustrated in Figure which shows a biased n-channel JFET. - V DD is the drain-to-source voltage and provides the drain current I D. - V GG sets the reverse bias between the gate and the source. - JFET is always operated with the gate-source pn junction reverse biased. - The reverse bias produces a depletion region along the pn junction and increases the resistance of the channel which controls the current. Prepared By: Syed Muhammad Asad Semester 10 Page 1

2 - Therefore, V GS, the gate-source voltage can be changed to control the amount of drain current I D flowing in the channel. Figure Biased n-channel JFET Figure 3 Effect of V GS on channel width, resistance and drain current 8.1. JFET Symbols - The schematic symbols for n-channel and p-channel JFETs are shown in Figure 4. - The in arrow on the gate indicates an n-channel JFET while the out arrow indicates p-channel. 8. JFET CHARACTERISTICS AND PARAMETERS - JFET is a voltage-controlled, constant-current device. - The controlling voltage for JFET is V GS. - Following is an explanation to understand the characteristics and parameters of JFET (Figure 5a): o Consider the case when gate-to-source voltage V GS = 0V. o As V DD and thus V DS is increased, I D will increase. This is highlighted in the graph of Figure 5b between points A and B. o This region is called the Ohmic Region and in this region channel resistance is constant. o At point B, the curve of Figure 5b levels and enters the active region. o In this region, I D is constant. Figure 4 JFET schematic symbols o As voltage V DS is increased, the drain current I D remains constant between points B and C. Prepared By: Syed Muhammad Asad Semester 10 Page

3 Figure 5 Drain characteristic curve of a JFET for V GS =0V 8..1 Pinch Off - At V GS = 0V, the value of V DS where I D becomes constant (Point B on Figure 5b) is called Pinch-Off voltage, V p. - A given JFET has fixed value of V p given in datasheets. - At V GS = 0V, the value of the constant drain current is called I DSS (Drain to Source current gate Shorted). - I DSS is given in datasheets. - I DSS is the maximum current a JFET can produce. 8.. Breakdown - Breakdown occurs at point C when I D increases very rapidly. - Breakdown can damage the transistor. - JFETs should be operated below breakdown in the active region (between point B and C) VGS controls ID - Connect a bias voltage V GG from gate to source as shown in Figure 6a. - As V GS becomes more negative (V GS < 0V), the resistance of the n-channel increases with the increase in the depletion region. - As we keep on decreasing V GS, a family of drain characteristic curves is produced as shown in Figure 6b. - Drain current I D decreases with more negative V GS. - This behavior illustrates that the drain current is controlled by V GS Cutoff Voltage - The value of V GS that makes I D approximately zero is the cutoff voltage V GS(off). - A JFET must be operated between V GS = 0V and V GS(off) Comparison of Pinch-Off Voltage and Cutoff Voltage - V GS(off) and V p are always equal in magnitude but opposite in sign. - So V GS off = V p. - Anyone one of the two parameters is mentioned in the datasheet but not both. Prepared By: Syed Muhammad Asad Semester 10 Page 3

4 NOTE: REFER EXAMPLE 8-1 PAGE 375 Figure 6 V GS controls I D 8..6 JFET Universal Transfer Characteristic - We now know that V GS controls I D. - Therefore the relationship between V GS and I D is very important. - Figure 7 shows a general characteristic curve that graphically shows how V GS and I D are related. - This graph is known as a transconductance curve. - Following points need to be noticed about the graph: o I D = 0A when V GS = V GS off Figure 7 JFET universal transfer characteristic curve o I D = I DSS 4 when V GS = 0.5V GS off o I D = I DSS when V GS = 0.3V GS off o I D = I DSS when V GS = 0V - The mathematical relation between the drain current I D and V GS can be given approximately as Prepared By: Syed Muhammad Asad Semester 10 Page 4

5 I D I DSS 1 V GS V GS off - The above equation can determine I D for any given value of V GS if I DSS and V GS(off) are known. - I DSS and V GS(off) are given in the datasheets. NOTE: REFER EXAMPLE 8-3 PAGE JFET Forward Transconductance - Transconductance can be roughly defined as the inverse of resistance. - The forward transconductance of the JFET is given by symbol g m. - It is the change in the drain current (ΔI D ) for a given change in the gate-to-source voltage (ΔV GS ) with constant V DS. - It is expressed as a ratio and has a unit of Siemens (S) or mho. g m = ΔI D ΔV GS - As the JFET transfer curve is nonlinear, g m varies in value on different location of the curve. Figure 8 g m varies depending on V GS - g m is greater at the top (near V GS = 0V) of the curve as compared to the bottom (near V GS off ) as shown in Figure 8. - The datasheet normally gives values of g m at V GS = 0V (g m0 ). - Given g m0, we can calculate g m at any point on the curve using the following formula: Prepared By: Syed Muhammad Asad Semester 10 Page 5

6 g m = g m0 1 V GS V GS off - If g m0 is not available, we can use the following formula to calculate it: g m0 = I DSS V GS off NOTE: REFER EXAMPLE 8-4 PAGE Input Resistance - The input resistance of JFETs is extremely high as compared to BJTs. - This is due to the reverse bias at the gate-to-source junction which increases the depletion region at the junction and thus increases the resistance. - The input resistance can be determined by the following formula: R IN = V GS I GSS 8.3 JFET Biasing - The main purpose of DC biasing is to select the proper DC gate-to-source voltage V GS to establish a desired value of drain current I D which is the Q-point of the circuit. - There are 3 types of bias circuit used with JFETs. o Self Bias o Voltage Divider Bias o Current Source Bias Self-Bias - Self-bias is the most common type of bias circuit for JFET. - Figure 9 shows the self-bias circuit for n-channel (Figure 9a) and p-channel (Figure 9b) JFETs. - The gate terminal being grounded through R G results in V G = 0V. Figure 9 Self-bias JFET - This setup achieves the reverse bias condition of the gate required for proper biasing of JFET. NOTE: REFER EXAMPLE 8-6 PAGE 38 Prepared By: Syed Muhammad Asad Semester 10 Page 6

7 8.3. Setting the Q-Point of a Self Biased JFET - For setting a Q-point, first either find I D for some V GS or vice versa. - Then calculate the required R S by the following relation: R S = V GS I D - For a desired value of V GS, I D can be determined in two ways. o Graphical using the transfer curve. o Using Equation of I D I DSS 1 V GS where I DSS and V GS(off) are given. V GS off NOTE: REFER EXAMPLE 8-7 PAGE Midpoint Bias - It is good to bias a JFET near the midpoint of the transfer curve. - At the midpoint I D = I DSS V GS = V GS off 3.4 V D = V DD - Select a value of R D to get the required V D. - Choose R G large enough (mega ohm range). NOTE: REFER EXAMPLE 8-9 PAGE Graphical Analysis of a Self-Biased JFET - The transfer characteristic curve of a JFET can be used to find the Q-point (I D and V GS ) of a self biased circuit. - If the curve is not given then it can be plotted using the equation of I D and using the datasheet values of I DSS and V GS(off). - To determine the Q-point of the circuit, a DC load line must be drawn. - The DC load line is established as follows (illustrated in Figure 10): o At I D = 0A find V GS = I D R S = 0V. This gives us the first point of the load line. o At I D = I DSS find V GS = I D R S = I DSS R S. This gives the second point. Connecting these two points establishes the load line. o The point where the load line intersects the transfer curve is the Q-point. o Note the corresponding values of I D and V GS at the Q-point. Prepared By: Syed Muhammad Asad Semester 10 Page 7

8 Figure 10 Self-bias DC load line NOTE: REFER EXAMPLE 8-10 PAGE Voltage-Divider Bias - An n-channel JFET with voltage-divide bias is shown in Figure For proper biasing, the voltage at the source must be more positive than the voltage at the gate. - This ensures that the gate-source junction is reverse biased. NOTE: REFER EXAMPLE 8-11 PAGE Graphical Analysis of a JFET with Voltage-Divider Bias - A similar approach as JFET self-biased circuit can be used to find the Q-point graphically. - The DC load line is established as follows (illustrated in Figure 1): o At I D = 0A find V GS = V G. This gives us the first point of the load line. o At V GS = 0V find I D = V G R S. This gives the second point. Connecting these two points establishes the load line. o Extending the load line to intersect the transfer curve gives us the Q-point. o Note the corresponding values of I D and V GS at the Q-point. Figure 11 JFET voltagedivider bias Prepared By: Syed Muhammad Asad Semester 10 Page 8

9 Figure 1 DC load line for JFET voltage-divider bias NOTE: REFER EXAMPLE 8-1 PAGE Q-Point Stability - The transfer characteristic curve differs from one JFET to the other of the same type. - This behavior is not suitable for circuit parameter stability. - This difference in curve may cause the Q-point to change significantly. - Figure 13 shows a typical transfer curve of two JFETs N Figure 13a is for self-biased while Figure 13b is for the voltage-divider biased. - As can be seen, both have different transfer curves. - Changing one with the other changes the Q-point dramatically. - It is worth noting that in terms of Q-point stability, voltage-divider bias is better then the self-bias circuit. - This can be seen by the amount of change in the drain current for both the circuits. Prepared By: Syed Muhammad Asad Semester 10 Page 9

10 Figure 13 Variation in transfer curve and Q-point of self-biased and voltage-divider biased JFET of the same type - The change in the drain current value for self-bias is more then the change for the same in voltagedivider. - The reason for this is that the slope of the load line for voltage-divider is much gradual then the slope of the load line for self-biased and thus the change in y-axis is small Current-Source Bias - Current-source bias is a method for increasing the Q-point stability of a self-biased JFET. - This is done by making drain current independent of V GS. - This is accomplished by using a constant current source in series with JFET source as shown in Figure In this circuit, the BJT acts as a constant current source so the emitter current is constant. - This makes the drain current constant because I E I D V EE R E. - As can be seen from the transfer characteristic curve of different JFET, the drain current remains constant thus providing highly stable Q-point. Prepared By: Syed Muhammad Asad Semester 10 Page 10

11 Figure 14 Current-source bias 8.4 THE OHMIC REGION - Ohmic region is the part of the FET characteristic curve where Ohm s law can be applied. - A proper biased JFET exhibits property of variable resistance in this region. - Ohmic region extends from the point where V GS = 0V to the point where I D becomes constant. - The slope of the characteristic curve can be taken to be constant for small values of I D. - The slope of the curve is the DC drain-to-source conductance given by Slope = G DS = I D V DS - As resistance is inverse of conductance, the DC drain-to-source resistance is given by R DS = 1 = V DS G DS I D Figure 15 Ohmic region in shaded area Prepared By: Syed Muhammad Asad Semester 10 Page 11

12 8.4.1 JFET as a Variable Resistance - A JFET is biased in the Ohmic region to be used a voltage-controlled variable resistor. - The controlling voltage is V GS which determines the resistance by changing the Q-point. Figure 16 Load line intersect the curves inside the Ohmic region - To bias the JFET in the Ohmic region, the load line must intersect the curves inside the Ohmic region as shown in Figure This is done by setting the DC saturation current I D(sat) much less than I DSS. - Figure 16 shows 3 Q-points in the Ohmic region. - As you move along the load line or change the Q-point, the resistance R DS changes as the slope at each Q-point are different. - If the Q-point is moved from V GS = 0V to V GS = V, the slope at each point is less then the previous one. - This means less I D and more V DS which results in increase in R DS. NOTE: REFER EXAMPLE 8-14 PAGE THE MOSFET - Metal Oxide Semiconductor FET is another type of FET. - It is different from JFET as it does not contain a pn junction instead the gate is insulated from the channel by a silicon dioxide (SiO ) layer. - There are two types of MOSFET o Enhancement (E) MOSFET most commonly used. o Depletion (D) MOSFET Enhancement MOSFET (E-MOSFET) - Enhancement MOSFET only operates in the enhancement mode and there is no depletion mode. - Figure 17 shows the structure of an n-channel E-MOSFET. - It does not contain any n-channel. Prepared By: Syed Muhammad Asad Semester 10 Page 1

13 - Instead the channel is induced by a positive threshold voltage at the gate that pulls the electrons to make the channel. Figure 17 E-MOSFET schematic symbols Figure 18 E-MOSFET structure - This structure makes it possible to have more conduction by pulling more electrons in the channel. - Figure 18 shows the schematic symbols of n-channel and p-channel E-MOSFETs Depletion MOSFET (D-MOSFET) - Another type of MOSFET is the Depletion MOSFET (D-MOSFET). - The basic structure of n-channel and p-channel D-MOSFET is shown in Figure Unlike the E-MOSFET, there is a small channel in the D-MOSFET. - This channel enables it work in both the enhancement mode as well as the depletion mode. - It operates in depletion mode when V GS < 0V and operates in enhancement mode when V GS > 0V Depletion Mode - Applying negative V GS at the gate terminal of a D-MOSFET repels the electrons in the n-channel and replaces it by hole. - This depletes the channel of any electrons and when V GS = V GS off, the channel is totally depleted and drain current I D becomes zero. Figure 19 D-MOSFET structure Enhancement Mode - Applying positive V GS at the gate terminal of a D-MOSFET attracts more electrons in the n-channel. Prepared By: Syed Muhammad Asad Semester 10 Page 13

14 - This increases or enhances the channel conductivity. - Figure 0 shows the schematic symbols of n-channel and p- channel D-MOSFET. 8.5 MOSFET CHARACTERISTICS AND PARAMETERS - Most of the concepts of JFET characteristics and parameters apply equally to MOSFETs. - We shall discuss the characteristics of both the MOSFETs separately. Figure 0 D-MOSFET schematic symbols E-MOSFET Transfer Characteristics - The E-MOSFET only operates in the enhancement mode. - So an n-channel device requires positive V GS and p-channel requires negative V GS. - Figure 1 shows the transfer characteristic curve of n-channel and p-channel E-MOSFET. - I D = 0A at V GS = 0V so there is no I DSS in E-MOSFETs. - Ideally there is no drain current until V GS reaches a specific value called the threshold voltage, V GS(th). Figure 1 E-MOSFET transfer curve - The equation for the drain current in E-MOSFET differs from JFET and is given by I D = K V GS V GS t and K = I D on V GS V GS t Where values of I D(on) is specified in the datasheets at a given V GS. NOTE: REFER EXAMPLE 8-16 PAGE D-MOSFET Transfer Characteristics - D-MOSFET can operate in both enhancement as well as the depletion mode. - It means it can work with both positive and negative V GS. - Figure shows the transfer curve for n-channel and p-channel D-MOSFETs. - The point on the curve where V GS = 0V corresponds to I DSS. - The point where I D = 0 correponds to V GS(off). Prepared By: Syed Muhammad Asad Semester 10 Page 14

15 - The curve shows that with positive V GS (n-channel) or negative V GS (p-channel) the channel conduction increases allowing more current through the drain as than I DSS. - The same equation of I D as in JFET also applies to D-MOSFET. NOTE: REFER EXAMPLE 8-17 PAGE 403 Figure D-MOSFET transfer curve 8.6 MOSFET BIASING - MOSFET can be biased in three ways. o Voltage-divider bias (For E-MOSFET and D-MOSFET) o Drain-feedback bias (For E-MOSFET and D-MOSFET) o Zero-bias (only for D-MOSFET) E-MOSFET Bias - The purpose of biasing an E-MOSFET is to make V GS greater than the V GS(th). - Figure 3 shows the circuit arrangement for the voltage-divider and drain-feedback bias for an n- channel E-MOSFET. - Equation for the voltage-divider bias are R V GS = V R 1 + R DD V DS = V DD I D R D - Equation for drain-feedback bias is V GS = V DS NOTE: REFER EXAMPLE 8-18 & 8-19 PAGE 405 & 406 Figure 3 E-MOSFET bias arrangement 8.6. D-MOSFET Bias - The simplest bias method for D-MOSFET is to set V GS = 0V. - This enables the AC voltage source to vary above and below this 0V bias point. - Equations for the zero-bias are V GS = 0V then I D = I DSS V DS = V DD I DSS R D Prepared By: Syed Muhammad Asad Semester 10 Page 15

16 - Figure 4 shows an n-channel zero-biased D-MOSFET. Figure 4 Zero-biased D-MOSFET NOTE: REFER EXAMPLE 8-0 PAGE 407 Table 1 JFET Formula Sheet Pinch-Off Voltage V p = V GS off Drain Current I D I DSS 1 V GS V GS off JFET Forward Transconductance Input Resistance g m = g m0 1 g m0 = V GS V GS off I DSS V GS off R IN = V GS I GS V GS = V G V S = I D R S V D = V DD I D R D V DS = V D V S = V DD I D R D + R s Self-Bias Voltage-Divider Bias R S at Q-point is given by R S = V GS I D Midpoint Bias is given by I D = I DSS V GS = V GS off V D = V DD V S = I D R S Prepared By: Syed Muhammad Asad Semester 10 Page 16 R V G = R 1 + R V GS = V G V S V S = V G V GS V DD I D = V S R S = V G V GS R S

17 Ohmic Region Slope = G DS I D V DS R DS = 1 = V DS G DS I D I D sat = V DD R D E-MOSFET Drain Current Table MOSFET Formula Sheet I D = K V GS V GS t I D on K = V GS V GS t D-MOSFET Drain Current I D I DSS 1 V GS E-MOSFET Bias D-MOSFET Bias Voltage Divider Bias V GS = R R 1 + R V GS off V DD V DS = V DD I D R D Drain Feedback Bias V GS = V DS V DS = V DD I D R D Zero-Bias V GS = 0V I D = I DSS V DS = V DD I DSS R D Prepared By: Syed Muhammad Asad Semester 10 Page 17

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