HW#3 Solution. Dr. Parker. Fall 2015

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1 HW#3 Solution Dr. Parker Fall 2015 Assume for the problems below that V dd = 1.8 V, V tp0 is -.7 V. and V tn0 is.7 V. V tpbodyeffect is -.9 V. and V tnbodyeffect is.9 V. Assume ß n (k n )= W/L µ A(microamps)/V 2 and ß p (k p )= 51 W/L µ A/V 2 lambda = 100nm 1. (10%) A PMOS transistor has Vs = 1.3 V, V d =.9 V. V g =.2 V. What region of operation is it in? Vgd= -.7; Vgd= Vg- Vd Vtpbodyeffect= -.9 V (there is body effect; the source is not tied to the highest potential) Vds=.9-1.3= -.4 V Vgs=.2-1.3= -1.1 V Is the transistor ON? Vgs Vtpbodyffect? ? True, so transistor is ON Vds > Vgs-Vtp? -.4 > -1.1 (-.9)? -.4 > -.2? False, transistor is in SATURATION region 2. (10 %) An NMOS transistor has Vs =.2 V. V d = 1.3 V. Is the transistor in the saturation region of operation when Vgs =1.3 V? Vds =Vd-Vs = =1.1 V There is body effect since the source of the transistor is not connected to the lowest potential. Vgs Vtnbodyffect? 1.3.9? True, transistor is ON Vds> Vgs Vtnbodyeffect? 1.1 > ? 1.1 >.4? The transistor is in SATURATION region

2 3. (5%) Show a cross section and identify the parasitic transistors that cause latch up. How does a twinwell technology prevent latchup? The twin-well technology separates the nmos and pmos transistors by using n-well and p-well while using Si material as the substrate. The two wells are separated so there is no current flow between, either by spacing or by very light doping at the well boundaries. 4. (5%) Assume the channel between drain and source of an NMOS transistor is formed so that the transistor is in linear region. If we continuously decrease slowly Vgs voltage while keeping Vds constant, what would happen to the electrons underneath the gate area? Would the transistor be at t=infinity in linear, saturation, or cut off region? The transistor is initially in linear region Vds< Vgs Vt, by decreasing Vgs, the transistor moves to saturation first, then to cut off. Electrons move away from the channel and eventually the transistor moves into cut off region. 5. (7%) Give us 2 design rules that prevent short circuits and 2 design rules that prevent open circuits. Short Circuit: In general, the distance between two materials is considered for the prevention of short circuits. For example, the separation between two n-well materials or the separation between two metal wires of the same type has a minimum distance to prevent short circuits. Open circuit: In general, the minimum width of any material is used to prevent open circuits. An example is the minimum width of a metal wire which is 3 lambda or the minimum width of a poly line which is 2 lambda. Another rule that may help to prevent open circuits is the extension of materials outside the contact cut so that layers can effectively be connected.

3 6. (10%) Identify on the graph the portion(s) affected by the term Vds/2. Why do we typically ignore this term? When can't this term be ignored? The red boxes identify the nonlinear portions of the curve in linear region. We typically ignore this term because we usually want to operate the transistor in linear region with a very small Vds voltage so that we have a linear relationship between current Idsn and voltage Vdsn. This term cannot be ignored when the magnitude of Vds is comparable to Vgs-Vt. 7. a) (5 %) A PMOS transistor is used as a pass transistor (switch). The input voltage is Vin = 0 V. The gate voltage Vg=.2 V. The voltage Vout = 1.4 V at time t = 0+. What is the final output voltage at t = infinity? The source is at the output and initially has a voltage of 1.4V. The gate voltage is fixed to.2v. Analysis at t=infinity We have bodyeffect at t=infinity because the source is not Vdd. the minimum voltage the transistor can send at the output is limited by the threshold of the transistor. Vout Vg+ Vtpbodyeffect for the transistor to be ON. Thus, the output voltage can go as low as Vg+ Vtpbodyeffect =.2+.9= 1.1 V. b) (3%) Does the PMOS transistor have body effect when t approaches infinity? Yes, there is body effect, the output source is different from Vdd.

c) (10%) Assume the transistor width is three times minimum size and the length is twice minimum size. Compute the drain current flow I DS at t = 0+ and at t=infinity. At t=0+, Vds= 0-1.4= -1.

4 c) (10%) Assume the transistor width is three times minimum size and the length is twice minimum size. Compute the drain current flow I DS at t = 0+ and at t=infinity. At t=0+, Vds= 0-1.4= -1.4 V Vgs=.2-1.4=-1.2 V Vtpbodyeffect= -.9 V (the source is lower than the highest potential) Vgs Vtpbodyeffect? If this condition is true, the transistor is ON ? The condition is true, so the transistor is ON. Vds > Vgs-Vtpbodyeffect? -1.4 > -1.2 (-.9)? -1.4 > -.3? False, so the transistor is in SATURATION region Idsp =.5*µp*Cox*W/L*(Vgs-Vtpbodyeffect)^2 =.5*(51x10^-6)((3*(3*lambda))/(2*(2*lambda))(-1.2- (-.9))^2 = ua (negative sign indicates the current flow direction) At t=infinity, Vs= Vout= (Vg+ Vtpbodyeffect )=.2+.9=-1.1 V Vds= 0-1.1V = -1.1 Vgs=.2-1.1= -.9 V Vtpbodyeffect= -.9 V Vgs Vtpbodyeffect? If this condition is true, the transistor is ON ? The condition is true, but Vgs is increasing so transistor eventually turns off. Analysis with Vgs=-.9 V: Vds > Vgs-Vtpbodyeffect? If the condition is true the transistor is in linear region -1.1 > -.9 (-.9)? -1.1 > 0? True, so the transistor is in LINEAR region Idsp = µp*cox*w/l*vds*(vgs-vtpbodyeffect Vds/2) Idsp= 0 A 8. a) (7 %) Identify the sources and drains in a transmission gate at t=0+ when Vin = 1.1 V and Vout =.3 V. Vgn = 1.4 V, and Vgp = 0 V.

5 b) (8 %) What regions are the two transistors in when t approaches infinity? Be sure to justify your answers. NMOS: We have body effect because the source terminal of the nmos is not at the lowest potential. First, let s investigate if the transistor is ON: Vgs= =.3 V Vgs Vtpbodyffect?.3.9? False, so the transistor is in cut-off PMOS: The pmos transistor is ON at t=infinity, the difference in potential between source and gate is sufficiently large to satisfy the condition Vgs Vtpbodyeffect. Vgs= -1.1 V Vds= 0 V Vds < Vgs-Vtpbodyeffect? If this condition is true, then the transistor is in saturation region. 0 < -1.1 (-.9)? False, the PMOS transistor is in LINEAR region 9. a) (10%) In the circuit below, what are the voltages at node A and Out at t=infinity? NMOS: source is connected to node A and drain is connected to node In. PMOS: source is connected to node Out and drain is connected to node A. Initially both transistors are active and in saturation and node VA receives current from both transistors. Since the size of transistors is unknown, we do not know the current flow across each transistor and so the voltage at node A at t=infinity is unknown. The voltage at the output is also unknown, since charge is being removed from the output capacitance (not an ideal voltage source). The voltage at node A can be different according to the assumption made. Charge is shared between capacitances at node A and Out. Different answers will be accepted!

6 b) (5%) If the input Vin cannot be transferred to the output, what would be the range of voltages that you could apply to the gate of the nmos and/or pmos transistors to transfer Vin. Assume you can use a negative power supply. Vgn should be greater than or equal to 1.9 for the NMOS to transfer a 1V to node A. Vgp should be less than or equal than.1 V to ensure that the output node can go down to 1V. Different answers will be accepted! 10. (5%) What is the effective channel resistance of a PMOS transistor of 1.2 microns width and minimum length? Assume Vgs=-1.7 V, Vds= -.5V, Vg=0. Let s first verify that the transistor is ON and in LINEAR region Vgs = -1.7 V Vgs = Vg Vs Vs = Vg Vgs = 1.7 V (we have body effect) Vgs Vtpbodyeffect? True, therefore the transistor is ON. Vds = -.5 V Vds> Vgs Vtpbodyeffect? -.5 > -1.7 (-.9)? -.5 > -.8? This is true, so the PMOS transistor is in LINEAR region. Rchp = 1/( ß p *W/L*(Vgs-Vtpbodyeffect)) Rchp = 1/(51X10^-6*((12*lambda)/(2*lambda))*(-1.7-(-.9)) Rchp = KΩ

HW#3 Solution. Dr. Parker. Fall 2014

HW#3 Solution. Dr. Parker. Fall 2014 HW#3 Solution Dr. Parker Fall 2014 Assume for the problems below that V dd = 1.8 V, V tp0 is -.7 V. and V tn0 is.7 V. V tpbodyeffect is -.9 V. and V tnbodyeffect is.9 V. lambda=100 nm. Assume ß n (k n