4.8 V NPN Common Emitter Output Power Transistor for GSM Class IV Phones. Technical Data AT-36408
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1 4.8 V NPN Common Emitter Output Power Transistor for GSM Class IV Phones Technical Data AT-3648 Features 4.8 Volt Pulsed Operation (pulse width = 577 µsec, duty cycle = 12.5%) +. dm P 9 MHz, Typ. 65% Collector 9 MHz, Typ. 9 d Power 9 MHz, Typ. Internal Input Pre-Matching Facilitates Cascading Applications Output Power Device for GSM Class IV Handsets SOIC-8 Surface Mount Plastic Package Outline P8 Pin Configuration ASE EMITTER EMITTER COLLECTOR ASE EMITTER COLLECTOR EMITTER Description Hewlett Packard s AT-3648 combines internal input prematching with low cost, NPN power silicon bipolar junction transistors in a SOIC-8 surface mount plastic package. This device is designed for use as the output device for GSM Class IV handsets. At 4.8 volts, the device features + dm pulsed output power, superior power added efficiency, and excellent gain, making the AT-3648 an excellent choice for battery powered systems. The AT-3648 is fabricated with Hewlett Packard s 1 GHz Ft Self- Aligned-Transistor (SAT) process. The die are nitride passivated for surface protection. Excellent device uniformity, performance and reliability are produced by the use of ion-implantation, selfalignment techniques, and gold metalization in the fabrication of these devices E
2 AT-3648 Absolute Maximum Ratings Absolute Symbol Parameter Units Maximum [1] V EO Emitter-ase Voltage V 1.4 V CO Collector-ase Voltage V 16. V CEO Collector-Emitter Voltage V 9.5 I C Collector Current [2] A 1.7 P T Peak Power Dissipation [2, 3] W 8.6 T j Junction Temperature C 15 T STG Storage Temperature C -65 to 15 Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. Pulsed operation, pulse width = 577 µsec, duty cycle = 12.5%. 3. Derate at mw/ C for T C > 85 C. T C is defined to be the temperature of the collector pins 3 and 6, where the lead contacts the circuit board. 4. Using the liquid crystal technique, V CE =4.5 V, I c =1 ma, T j =15 C, 1-2 µm hot-spot resolution. Thermal Resistance [4] : θ jc = 6 C/W Electrical Specifications, T C = 25 C Symbol Parameters and Test Conditions Units Min. Typ. Max. Freq. = 9 MHz, V CE = 4.8 V, I CQ = 5 ma, pulsed operation, pulse width = 577 µsec, duty cycle = 12.5%, Test Circuit A,unless otherwise specified P out Output Power [1] P in = +26 dm dm η C Collector Efficiency [1] P in = +26 dm % H2 2nd Harmonic [1] F = 9 MHz dc -5 H3 3rd Harmonic [1] F = 9 MHz dc -4 Mismatch Tolerance, No Damage [1] P out = + dm 7:1 any phase, 2 sec duration V EO Emitter-ase reakdown Voltage I E =.8 ma, open collector V 1.4 V CO Collector-ase reakdown Voltage I C = 4. ma, open emitter V 16. V CEO Collector-Emitter reakdown Voltage I C = 2. ma, open base V 9.5 h FE Forward Current Transfer Ratio V CE = 3 V, I C = 18 ma I CEO Collector Leakage Current V CEO = 5 V µa 5 Note: 1. With external matching on input and output, tested in a 5 ohm environment. Refer to Test Circuit A (GSM). 4-82
3 AT-3648 Typical Performance, T C = 25 C Frequency = 9 MHz, V CE = 4.8 V, I CQ = 5 ma, pulsed operation, pulse width = 577 µsec, duty cycle = 12.5%, Test Circuit A (GSM), unless otherwise specified. OUTPUT POWER (dm) Γ source = Γ load = P out η c INPUT POWER (dm) Figure 1. Output Power and Collector Efficiency vs. Input Power COLLECTOR EFFICIENCY (%) OUTPUT POWER (dm) Γ source = Γ load = V 4.8 V 6. V INPUT POWER (dm) Figure 2. Output Power vs. Input Power Over ias Voltage. COLLECTOR EFFICIENCY (%) Γ source = Γ load = V 4.8 V 6. V INPUT POWER (dm) Figure 3. Collector Efficiency vs. Input Power Over ias Voltage. OUTPUT POWER (dm) Γ source = Γ load = T C = +85 C 28 T C = +25 C T C = 4 C INPUT POWER (dm) Figure 4. Output Power vs. Input Power Over Temperature. OUTPUT POWER (dm) Pin = +26 dm Γ source = Γ load = η c P out FREQUENCY (MHz) Figure 5. Output Power and Collector Efficiency vs. Frequency. Note: Tuned at 9 MHz, then swept over frequency COLLECTOR EFFICIENCY (%) RETURN LOSS (d) Output R.L. -2 Γ source = Γ load = FREQUENCY (MHz) Input R.L. Figure 6. Input and Output Return Loss vs. Frequency. 4-83
4 AT-3648 Typical Large Signal Impedances V CE = 4.8 V, I CQ = 5 ma, Pulsed Operation, P out = +. dm Freq. Γ source Γ load MHz Mag. Ang. Mag. Ang Ccb (pf) Vcb (V) Figure 7. Collector-ase Capacitance vs. Collector-ase Voltage (DC Test). SPICE Model Parameters Die Model Packaged Model Label F IKF ISE NE VAF NF TF XTF VTF ITF PTF XT R IKR ISC NC VAR NR CPad Die Area = 1.2 CPad =.3 pf Value E E E E1 Label TR EG IS XTI CJC VJC MJC XCJC FC CJE VJE MJE R IR RM RE RC CPad Value 1E E E E E2 C CPad E1 C Cpkg1 Cpkg1 Cpkg1 E2 Label Rwire Lwire Cpkg1 Cpkg2 LE1 Cpkg2 Cpkg2 Cpkg2 Value.63 Ω 1.45 nh 1.3 Ω.52 nh.4 pf 1.2 pf.3 nh Lwire Rwire Lwire Rwire Label LE2 Cbase Rwbase Rwbb Lwbb Rwbase Cbase Rwbase L= Rwbase R= 1 Ω Rwbase Cbase L= R=1 Ω Value.64 nh 46. pf.2 Ω 1.19 nh.1 Ω.1 nh Lwbb Rwbb Lwbb Rwbb Lwbb Rwbb Die LE1 LE2 Die LE1 LE2 Die LE1 LE2 Die LE1 LE2 4-84
5 AT-3648 Typical Scattering Parameters, Common Emitter, Z O = 5 Ω V CE = 3.6 V, I c = 2 ma, T c = 25 C Freq. S 11 S 21 S 12 S 22 GHz Mag. Ang. d Mag. Ang. d Mag. Ang. Mag. Ang V CE = 4.8 V, I c = 2 ma, T c = 25 C V CE = 6. V, I c = 2 ma, T c = 25 C Typical Performance MAG MAG MAG GAIN (d) S 21 2 GAIN (d) S 21 2 GAIN (d) S FREQUENCY (GHz) Figure 8. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. V CE = 3.6V, Ic = 2 ma FREQUENCY (GHz) Figure 9. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. V CE = 4.8V, Ic = 2 ma FREQUENCY (GHz) Figure 1. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. V CE = 6.V, Ic = 2 ma. 4-85
6 Test Circuit A: Test Circuit oard 9 MHz (GSM) V V CC 38.1 (1.5) V T1 C1 INPUT C3 R2 R1 R3 C2 PA2 DEMO L1 R4 C4 C6 L2 R5 C7 C5 MFG14 C8 C9 V CC 9/96 C1 OUTPUT C1 C2 C3 C4 C5 C6 C7 C8 C9 C1 R1 R2 R3 R4 R5 T1 L1 L2 39. pf 39. pf 1. nf 12.5 pf 11.5 pf 1. nf 39. pf 1.5 µf 1. µf 39. pf 2.2 Ω 619. Ω 2.2 Ω 1. Ω 1. Ω MT 2222A 18. µh 18. µh Pulse Test V CE = 4.8 V I CQ = 5 ma Freq. = 9 MHz NOTE: Dimensions are shown in millimeters (inches) (3.) Test Circuit: FR-4 Microstrip, glass epoxy board Dielectric Constant = 4.5 Thickness =.79 (.31) Test Circuit A: Test Circuit Schematic 9 MHz (GSM) 2.2 Ω V 619 Ω Pulse Test V CE = 4.8 V I CQ = 5 ma Freq. = 9 MHz V CC C E DC Transistor 2.2 Ω 1 nf 1 Ω 1 Ω 18 µh 39 pf 39 pf 8 Ω 8 Ω 9 MHz 9 MHz 1 nf 1.5 µf 1 µf 18 µh RF IN 39 pf 5 Ω 5 Ω = 4.88 (.192) 11.5 pf 39 pf RF OUT 12.5 pf = 1.52 (.6) 4-86
7 Part Number Ordering Information Part Number No. of Devices Container AT-3648-TR1 1 7" Reel AT-3648-LK 25 Carrier Tape Package Dimensions SOIC-8 Surface Mount Plastic Package 1.27 (.5) 6x 3.8/4. (.1497/.1574) 5.84/6.2 (.23/.244) Pin 1 1./1.75 (.532/.688) 4.72/5. (.186/.197).38 ±.1 (.15 ±.4) x 45 /8.33/.51 (.13/.2) 8X.1/.25 (.4/.98) Note: 1. Dimensions are shown in millimeters (inches)..1 (.4).41/1.27 (.16/.5).19/.25 (.75/.98) 4-87
8 Tape Dimensions and Product Orientation For Package SOIC-8 REEL CARRIER TAPE USER FEED DIRECTION COVER TAPE t COVER TAPE D P 2 P 1 PITCHES CUMULATIVE TOLERANCE ON TAPE ±.2 MM (±.8) EMOSSMENT E K C A F W USER FEED DIRECTION T CENTER LINES OF CAVITY P 1 D 1 CAVITY PERFORATION DESCRIPTION SYMOL SIZE (mm) SIZE (INCHES) LENGTH WIDTH DEPTH PITCH OTTOM HOLE DIAMETER DIAMETER PITCH POSITION A K P 1 D 1 D P E 6.45 ± ± ±.1 8. ± min /- 4. ± ± ±.4.22 ±.4.83 ± ±.4.59 min /-.157 ±.4.69 ±.4 CARRIER TAPE WIDTH THICKNESS W t 8. ± ± ±.12.1 ±.5 COVER TAPE WIDTH TAPE THICKNESS C T 9.19 ±.1.51 ± ±.4.2 ±.4 DISTANCE ETWEEN CENTERLINE CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) F P ±.5 2. ± ±.2.79 ±
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