Description PART NUMBER (BRAND) ICM7555CBA (7555CBA) ICM7555IBA (7555IBA) ICM7555 (METAL CAN) TOP VIEW V DD AND CASE 8 1 DISCHARGE GND

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1 ovember 99 General urpose Timers Features Exact Equivalent in Most Cases for SE/E/ or TLC/ Low Supply Current - ICM µa - ICM µa Extremely Low Input Currents pa High Speed Operation MHz Guaranteed Supply Voltage ange V to V Temperature Stability %/ o C at o C ormal eset Function - o Crowbarring of Supply During Output Transition Can be Used with Higher Impedance Timing Elements than egular / for Longer C Time Constants Timing from Microseconds through Hours Operates in Both Astable and Monostable Modes Adjustable Duty Cycle High Output Source/Sink Driver can Drive TTL/CMOS Outputs have Very Low Offsets, HI and LO Applications recision Timing ulse Generation Sequential Timing Time Delay Generation ulse Width Modulation ulse osition Modulation Missing ulse Detector Description The ICM and ICM are CMOS C timers providing significantly improved performance over the standard SE/E/ and timers, while at the same time being direct replacements for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THESHOLD, and currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple COTOL for stable operation. Specifically, the ICM and ICM are stable controllers capable of producing accurate time delays or frequencies. The ICM is a dual ICM, with the two timers operating independently of each other, sharing only V+ and GD. In the one shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the regular bipolar / devices, the COTOL terminal need not be decoupled with a capacitor. The circuits are triggered and reset on falling (negative) waveforms, and the output inverter can source or sink currents large enough to drive TTL loads, or provide minimal offsets to drive CMOS loads. Ordering Information AT UMBE (BAD) ICMCBA (CBA) ICMIBA (IBA) TEM. AGE ( o C) ACKAGE KG. O. to Ld SOIC M. - to Ld SOIC M. ICMIA - to Ld DI E. ICMITV - to in Metal Can T.C ICMMTV (ote) - to in Metal Can T.C ICMID - to Ld DI E. ICMMJD (ote) - to Ld CEDI F. OTE: Add /B to part number if B processing is desired. inouts ICM (DI, SOIC) TO VIEW ICM (METAL CA) TO VIEW ICM (DI, CEDI) TO VIEW GD THESHOLD COTOL GD AD CASE THESHOLD COTOL THESH- OLD COTOL THESHOLD COTOL 9 GD CAUTIO: These devices are sensitive to electrostatic discharge; follow proper IC Handling rocedures. --ITESIL or -- Copyright Intersil Corporation File umber.

2 Absolute Maximum atings Supply Voltage V Input Voltage Trigger, Control Voltage, Threshold, eset (ote ) V+ +.V to GD -.V Output Current ma Operating Conditions Temperature ange ICMC o C to o C ICMI, ICMI o C to o C ICMM, ICMM o C to o C Thermal Information Thermal esistance (Typical, ote ) θ JA ( o C/W) θ JC ( o C/W) CEDI ackage Metal Can ackage Lead DI ackage /A Lead DI ackage /A SOIC ackage /A Maximum Junction Temperature (Hermetic ackage) o C Maximum Junction Temperature (lastic ackage) o C Maximum Storage Temperature ange o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC - Lead Tips Only) CAUTIO: Stresses above those listed in Absolute Maximum atings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. OTES:. Due to the SC structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than V+ +.V or less than V- -.V may cause destructive latchup. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple supply systems, the supply of the ICM/ must be turned on first.. θ JA is measured with the component mounted on an evaluation C board in free air. Electrical Specifications Applies to ICM and ICM, Unless Otherwise Specified (OTE ) - o C TO o C AAMETE SYMBOL TEST CODITIOS MI TY MAX MI TY MAX UITS Static Supply Current I DD ICM = V µa = V µa ICM = V µa = V µa Monostable Timing Accuracy A = K, C =.µf, = V % µs Drift with Temperature (ote ) = V ppm/ o C = V ppm/ o C = V ppm/ o C Drift with Supply (ote ) = V to V %/V Astable Timing Accuracy A = B = K, C =.µf, = V % µs Drift with Temperature (ote ) = V ppm/ o C = V ppm/ o C = V ppm/ o C Drift with Supply (ote ) = V to V %/V Threshold Voltage V TH = V - % Trigger Voltage V TIG = V - % Trigger Current I TIG = V na Threshold Current I TH = V na Control Voltage V CV = V - % eset Voltage V ST = V to V V eset Current I ST = V na -

3 Electrical Specifications Applies to ICM and ICM, Unless Otherwise Specified (OTE ) - o C TO o C AAMETE SYMBOL TEST CODITIOS MI TY MAX MI TY MAX UITS Discharge Leakage I DIS = V na Output Voltage V OL = V, I SIK = ma V = V, I SIK =.ma V V OH = V, I SOUCE =.ma V = V, I SOUCE =.ma V Discharge Output Voltage V DIS = V, I SIK = ma V = V, I SIK = ma V Supply Voltage (ote ) Functional Operation V Output ise Time (ote ) t L = M, C L = pf, = V ns Output Fall Time (ote ) t F L = M, C L = pf, = V ns Oscillator Frequency (ote ) f MAX = V, A = Ω, B = Ω, C = pf MHz OTES:. These parameters are based upon characterization data and are not tested.. Applies only to military temperature range product (M suffix). Functional Diagram THESHOLD COTOL COMAATO A + - FLI-FLO DIVES + - n COMAATO B GD OTE: This functional diagram reduces the circuitry down to its simplest equivalent components. Tie down unused inputs. = kω, ±% (Typ) TUTH TABLE THESHOLD SWITCH Don t Care Don t Care Low Low On > / (V+) > / (V+) High Low On < / (V+) > / (V+) High Stable Stable Don t Care < / (V+) High High Off OTE: will dominate all other inputs: will dominate over THESHOLD. -

4 Schematic Diagram THESHOLD COTOL GD = kω ±% (TY) Application Information General The ICM/ devices are, in most instances, direct replacements for the E/SE / devices. However, it is possible to effect economies in the external component count using the ICM/. Because the bipolar / devices produce large crowbar currents in the output driver, it is necessary to decouple the power supply lines with a good capacitor close to the device. The / devices produce no such transients. See Figure. The ICM/ produces supply current spikes of only ma - ma instead of ma - ma and supply decoupling is normally not necessary. Also, in most instances, the COTOL decoupling capacitors are not required since the input impedance of the CMOS comparators on chip are very high. Thus, for many applications capacitors can be saved using an ICM, and capacitors with an ICM. SULY CUET (ma) SE/E ICM/ TIME (ns) FIGUE. SULY CUET TASIET COMAED WITH A STADAD BIOLA DUIG A TASITIO -

5 ower Supply Considerations Although the supply current consumed by the ICM/ devices is very low, the total system supply current can be high unless the timing components are high impedance. Therefore, use high values for and low values for C in Figures and. Output Drive Capability The output driver consists of a CMOS inverter capable of driving most logic families including CMOS and TTL. As such, if driving CMOS, the output swing at all supply voltages will equal the supply voltage. At a supply voltage of.v or more the ICM/ will drive at least standard TTL loads. Astable Operation The circuit can be connected to trigger itself and free run as a multivibrator, see Figure A. The output swings from rail to rail, and is a true % duty cycle square wave. (Trip points and output swings are symmetrical). Less than a % frequency variation is observed, over a voltage range of +V to +V. Monostable Operation In this mode of operation, the timer functions as a one-shot, see Figure. Initially the external capacitor (C) is held discharged by a transistor inside the timer. Upon application of a negative pulse to pin, the internal flip-flop is set which releases the short circuit across the external capacitor and drives the high. The voltage across the capacitor now increases exponentially with a time constant t = A C. When the voltage across the capacitor equals / V+, the comparator resets the flip-flop, which in turn discharges the capacitor rapidly and also drives the to its low state. must return to a high state before the can return to a low state. t = -ln ( / ) A C =. A C ICM A THESHOLD COTOL f = C The timer can also be connected as shown in Figure B. In this circuit, the frequency is: V OTIOAL CAACITO FIGUE. MOOSTABLE OEATIO C f =. ( A + B ) C The duty cycle is controlled by the values of A and B, by the equation: GD D = ( A + B ) ( A + B ) THESHOLD FIGUE A. ASTABLE OEATIO C A COTOL K ALTE- ATE OTIOAL CAACITO Control Voltage The COTOL terminal permits the two trip voltages for the THESHOLD and internal comparators to be controlled. This provides the possibility of oscillation frequency modulation in the astable mode or even inhibition of oscillation, depending on the applied voltage. In the monostable mode, delay times can be changed by varying the applied voltage to the COTOL pin. The terminal is designed to have essentially the same trip voltage as the standard bipolar /, i.e.,.v to.v. At all supply voltages it represents an extremely high input impedance. The mode of operation of the function is, however, much improved over the standard bipolar / in that it controls only the internal flip-flop, which in turn controls simultaneously the state of the and pins. This avoids the multiple threshold problems sometimes encountered with slow falling edges in the bipolar devices. B C OTIOAL CAACITO FIGUE B. ALTEATE ASTABLE COFIGUATIO -

6 Typical erformance Curves MIIMUM ULSE WIDTH (ns) 9 = V = V = V LOWEST LEVEL OF ULSE (% ) SULY CUET (ICM) (µa) T A = - o C T A = o C SULY (V) SULY CUET (ICM) (µa) FIGUE. MIIMUM ULSE WIDTH EQUIED FO IG FIGUE. SULY CUET vs SULY SOUCE CUET (ma) = V = V = V SIK CUET (ma).. T A = - o C = V = V = V EFEECED TO (V) LOW (V) FIGUE. SOUCE CUET vs FIGUE. SIK CUET vs T A = o C SIK CUET (ma).. = V = V = V SIK CUET (ma).. = V = V = V..... LOW (V) FIGUE. SIK CUET vs..... LOW (V) FIGUE 9. SIK CUET vs -

7 Typical erformance Curves (Continued) OMALIZED FEQUECY DEVIATIO (%) A = B = kω C =.µf A = B = MΩ C = pf.... SULY (V) SIK CUET (ma).. = V = V = V..... LOW (V) FIGUE. OMALIZED FEQUECY STABILITY I THE ASTABLE MODE vs SULY FIGUE. CUET vs OAGATIO DELAY (ns) = V T A = o C T A = - o C LOWEST LEVEL OF ULSE (% ) FIGUE. OAGATIO DELAY vs LEVEL OF ULSE OMALIZED FEQUECY DEVIATIO (%) A = B = kω C =.µf = V = V TEMEATUE ( o C) = V FIGUE. OMALIZED FEQUECY STABILITY I THE ASTABLE MODE vs TEMEATUE CAACITACE (F). m m m µ µ µ n n n p ( A + B ) kω kω kω MΩ MΩ MΩ p p. K K K M M FEQUECY (Hz) FIGUE. FEE UIG FEQUECY vs A, B AD C CAACITACE (F). m m m µ µ µ n n n p p kω kω kω MΩ MΩ MΩ p n µ µ µ m m m TIME DELAY (s) FIGUE. TIME DELAY I THE MOOSTABLE MODE vs A AD C A -

8 All Intersil semiconductor products are manufactured, assembled and tested under ISO9 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. o license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site Sales Office Headquarters OTH AMEICA Intersil Corporation. O. Box, Mail Stop - Melbourne, FL 9 TEL: () - FAX: () - EUOE Intersil SA Mercure Center, ue de la Fusee Brussels, Belgium TEL: ().. FAX: ()... ASIA Intersil (Taiwan) Ltd. Taiwan Limited F-, o. Fu Hsing orth oad Taipei, Taiwan epublic of China TEL: () 9 FAX: () 9 -

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