CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423

Size: px
Start display at page:

Download "CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423"

Transcription

1 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Data sheet acquired from Harris Semiconductor SCHS1A September Revised May 000 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets Features Description [ /Title (CD7 HC13, CD7 HCT1 3, CD7 HC3, CD7 HCT 3) /Subject High peed Overriding Reset Terminates Output Pulse Triggering From the Leading or Trailing Edge Q and Q Buffered Outputs Separate Resets Wide Range of Output-Pulse Widths Schmitt Trigger on Both A and B Inputs Fanout (Over Temperature Range) - Standard Outputs LSTTL Loads - Bus Driver Outputs LSTTL Loads Wide Operating Temperature Range o C to 15 o C Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types - V to V Operation - High Noise Immunity: N IL = 30%, N IH = 30%of at = 5V HCT Types -.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, V IL = 0.8V (Max), V IH = V (Min) - CMOS Input Compatibility, I l 1µA at V OL, V OH Pinout CD5HC13, CD5HCT13 (CERDIP) CD7HC13, CD7HCT13, CD7HC3, CD7HCT3 (PDIP, SOIC) TOP VIEW The HC13, HCT13, CD7HC3 and CD7HCT3 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 13 types can be triggered by a negative to positive reset pulse; whereas the 3 types do not have this feature. An external resistor (R X ) and an external capacitor (C X ) control the timing and the accuracy for the circuit. Adjustment of Rx and C X provides a wide range of output pulse widths from the Q and Q terminals. Pulse triggering on the A and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses. Once triggered, the output pulse width may be extended by retriggering inputs A and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A) and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A, B, and R) must be terminated high or low. The minimum value of external resistance, Rx is typically 5kΩ. The minimum value external capacitance, C X, is 0pF. The calculation for the pulse width is = 0.5 R X C X at = 5V. Ordering Information PART NUMBER TEMP. RANGE ( o C) PACKAGE CD5HC13F -55 to 15 1 Ld CERDIP CD5HC13F3A -55 to 15 1 Ld CERDIP CD7HC13E -55 to 15 1 Ld PDIP CD7HC13M -55 to 15 1 Ld SOIC CD5HCT13F3A -55 to 15 1 Ld CERDIP CD7HCT13E -55 to 15 1 Ld PDIP CD7HCT13M -55 to 15 1 Ld SOIC 1A 1 1 CD7HC3E -55 to 15 1 Ld PDIP 1B 1R 1Q R X C X 1C X 1Q CD7HC3M -55 to 15 1 Ld SOIC CD7HCT3E -55 to 15 1 Ld PDIP Q 5 1 Q CD7HCT3M -55 to 15 1 Ld SOIC C X R X C X R B A NOTES: 1. When ordering, use the entire part number. Add the suffix 9 to obtain the variant in the tape and reel.. Wafer or die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright 000, Texas Instruments Incorporated 1

2 Functional Diagram CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 1Cx 1Rx A 1B 1 1Cx 1RxCx MONO Q 1Q 1R 3 R 11 A 9 5 Q B 10 MONO 1 Q Cx RxCx 7 Cx Rx TRUTH TABLE INPUTS OUTPUTS A B R Q Q CD7HC/HCT13 H X H L H X L H L H L H H H X X L L H L H CD7HC/HCT3 H X H L H X L H L H L H H H X X L L H NOTE: H = High Level, L = Low Level, X = Don t Care.

3 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Absolute Maximum Ratings DC Supply, V to 7V DC Input Diode Current, I IK For V I < -0.5V or V I > + 0.5V ±0mA DC Output Diode Current, I OK For V O < -0.5V or V O > + 0.5V ±0mA DC Output Source or Sink Current per Output Pin, I O For V O > -0.5V or V O < + 0.5V ±5mA DC or Ground Current, I CC or I ±50mA Thermal Information Thermal Resistance (Typical, Note 3) θ JA ( o C/W) PDIP Package SOIC Package Maximum Junction Temperature o C Maximum Storage Temperature Range o C to 150 o C Maximum Lead Temperature (Soldering 10s) o C (SOIC - Lead Tips Only) Operating Conditions Temperature Range (T A ) o C to 15 o C Supply Range, HC Types V to V HCT Types V to 5.5V DC Input or Output, V I, V O V to Input Rise and Fall Time V ns (Max).5V ns (Max) V ns (Max) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θ JA is measured with the component mounted on an evaluation PC board in free air. DC Electrical Specifications PARAMETER HC TYPES High Level Input Low Level Input High Level Output CMOS Loads High Level Output TTL Loads Low Level Output CMOS Loads Low Level Output TTL Loads Input Leakage Current Quiescent Device Current SYMBOL TEST CONDITIONS 5 o C -0 o C TO 85 o C -55 o C TO 15 o C V I (V) I O (ma) (V) MIN TYP MAX MIN MAX MIN MAX V IH V V V V IL V V V V OH V IH or V IL V V V V V V V OL V IH or V IL V V V I I I CC or or V V V ±0.1 - ±1 - ±1 µa µa 3

4 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 DC Electrical Specifications (Continued) PARAMETER HCT TYPES High Level Input Low Level Input High Level Output CMOS Loads High Level Output TTL Loads Low Level Output CMOS Loads Low Level Output TTL Loads Input Leakage Current Quiescent Device Current Additional Quiescent Device Current Per Input Pin: 1 Unit Load SYMBOL V IH to 5.5 V IL to V V V OH V IH or V IL V V V OL V IH or V IL V I I I CC I CC TEST CONDITIONS 5 o C -0 o C TO 85 o C -55 o C TO 15 o C V I (V) I O (ma) (V) MIN TYP MAX MIN MAX MIN MAX and or V ±0.1 - ±1 - ±1 µa µa -.5 to 5.5 NOTE: For dual-supply systems theoretical worst case (V I =.V, = 5.5V) specification is 1.8mA. HCT Input Loading Table µa INPUT UNIT LOADS All 0.35 NOTE: Unit Load is I CC limit specified in DC Electrical Table, e.g. 30µA max at 5 o C. Prerequisite for Switching Specifications 5 o C -0 o C TO 85 o C -55 o C TO 15 o C PARAMETER SYMBOL (V) MIN TYP MAX MIN TYP MAX MIN TYP MAX HC TYPES Minimum Input, Pulse Width L A ns ns ns B H ns ns ns

5 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Prerequisite for Switching Specifications (Continued) 5 o C -0 o C TO 85 o C -55 o C TO 15 o C PARAMETER SYMBOL (V) MIN TYP MAX MIN TYP MAX MIN TYP MAX R L ns ns ns A and B Hold Time t H ns ns ns Reset Removal Time t REM ns ns ns Retrigger Time Number t rt ns R X = 10KΩ, C X = ns Output Pulse Width 5 Q or Q R X = 10KΩ, C X = 10nF µs HCT TYPES Minimum Input, Pulse Width L 5 A ns B H ns R L ns A and B Hold Time t H ns Reset Removal Time t REM ns Retrigger Time Number (Note ) R X = 10KΩ, C X = 0 t rt ns Output Pulse Width Q or Q µs R X = 10KΩ, C X = 10nF NOTE:. Time to trigger depends on the values of R X and C X. The output pulse width can only be extended when the time between the activegoing edges of the trigger input pulses meet the minimum retrigger time requirement. - 5

6 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Switching Specifications C L = 50pF, Input t r, t f = ns, R X = 10KΩ, C X = 0 PARAMETER SYMBOL TEST CONDITIONS (V) 5 o C -0 o C TO 85 o C -55 o C TO 15 o C MIN TYP MAX MIN MAX MIN MAX HC TYPES Trigger Propagation Delay t PHL C L = 50pF A, B, R to Q ns ns C L = 15pF ns C L = 50pF ns A, B, R to Q t PHL C L = 50pF ns ns C L = 15pF ns C L = 50pF ns Reset Propagation Delay t PHL, t PLH C L = 50pF ns R to Q or Q ns ns Output Transition Time t THL, t TLH C L = 50pF ns ns ns Output Pulse Width R X = 10KΩ, C X = 10pF µs Pulse Width Match Between Circuits In the Same Package R X = 10KΩ, C X = 10pF - ± % Power Dissipation Capacitance (Notes 5, ) C PD C L = 15pF pf Input Capacitance C IN C L = 50pF pf NOTES: 5. C PD is used to determine the dynamic power consumption, per multivibrator.. P D =(C PD +C X )V CC fi (C L V CC fo ) where f i = input frequency, f O = Output Frequency, C L = Output Load Capacitance, C X = External Capacitance = Supply assuming f i «I

7 CD5/7HC13, CD5/7HCT13, CD7HC3, CD7HCT3 Test Circuits and Waveforms A A B R tw B = LOW A = HIGH B R B = LOW A = HIGH Q Q FIGURE 1. OUTPUT PULSE CONTROL USING RESET INPUT (R) PULSE FOR 13 FIGURE. OUTPUT PULSE CONTROL USING RESET INPUT (R) FOR 3 A B B A t rt (R = HIGH) Q NOTE: Output pulse control using retrigger pulse for 13 and 3. FIGURE 3. TRIGGERING OF ONE SHOT BY INPUT A OR INPUT B FOR A PERIOD OUTPUT PULSE WIDTH (µs) R X = 100kΩ R X = 10kΩ DC SUPPLY VOLTAGE ( ) = 5V AMBIENT TEMPERATURE (T A ) = 5 o C EXTERNAL CAPACITANCE (C X ) - pf K FACTOR EXTERNAL CAPACITANCE (C X ) = 10nF EXTERNAL RESISTANCE (R X ) = 10kΩ TO 100kΩ AMBIENT TEMPERATURE (T A ) = 5 o C HCT DC SUPPLY VOLTAGE ( ) - VOLTS FIGURE. TYPICAL OUTPUT PULSE WIDTH AS A FUNCTION OF C X FOR R X = 10kΩ AND 100kΩ FIGURE 5. TYPICAL K FACTOR AS A FUNCTION OF 7

8 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 000, Texas Instruments Incorporated

CD74HC123, CD74HCT123, CD74HC423, CD74HCT423

CD74HC123, CD74HCT123, CD74HC423, CD74HCT423 Data sheet acquired from Harris Semiconductor SCHS1 September 1997 CD7HC13, CD7HCT13, CD7HC3, CD7HCT3 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets Features Description

More information

CD54/74HC221, CD74HCT221

CD54/74HC221, CD74HCT221 Data sheet acquired from Harris Semiconductor SCHS166B November 1997 - Revised May 2000 CD54/74HC221, CD74HCT221 High Speed CMOS Logic Dual Monostable Multivibrator with Reset Features Description [ /Title

More information

CD54/74HC02, CD54/74HCT02

CD54/74HC02, CD54/74HCT02 Data sheet acquired from Harris Semiconductor SCHS125A March 1998 - Revised May 2000 CD54/74HC02, CD54/74HCT02 High Speed CMOS Logic Quad Two-Input NOR Gate [ /Title (CD74H C02, CD74H CT02) /Subject High

More information

CD54HC4538, CD74HC4538, CD74HCT4538

CD54HC4538, CD74HC4538, CD74HCT4538 Data sheet acquired from Harris Semiconductor SCHS123 June 1998 CD54HC4538, CD74HC4538, CD74HCT4538 High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator Features Description [ /Title

More information

CD54/74HC10, CD54/74HCT10

CD54/74HC10, CD54/74HCT10 Data sheet acquired from Harris Semiconductor SCHS128A August 1997 - Revised May 2000 CD54/74HC10, CD54/74HCT10 High Speed CMOS Logic Triple 3-Input NAND Gate [ /Title (CD74 HC10, CD74 HCT10 ) /Subject

More information

CD74HC221, CD74HCT221

CD74HC221, CD74HCT221 Data sheet acquired from Harris Semiconductor SCHS66A November 997 - Revised April 999 CD74HC22, CD74HCT22 High Speed CMOS Logic Dual Monostable Multivibrator with Reset Features Description [ /Title (CD74

More information

CD54/74HC139, CD54/74HCT139

CD54/74HC139, CD54/74HCT139 Data sheet acquired from Harris Semiconductor SCHS148B September 1997 - Revised May 2000 CD54/74HC139, CD54/74HCT139 High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer [ /Title (CD74 HC139, CD74

More information

CD54/74HC74, CD54/74HCT74

CD54/74HC74, CD54/74HCT74 CD54/74HC74, CD54/74HCT74 Data sheet acquired from Harris Semiconductor SCHS124A January 1998 - Revised May 2000 Dual D Flip-Flop with Set and Reset Positive-Edge Trigger Features Description [ /Title

More information

CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High Speed CMOS Logic Octal Buffer/Line Drivers, Three-State

CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High Speed CMOS Logic Octal Buffer/Line Drivers, Three-State Data sheet acquired from Harris Semiconductor SCHS167A November 1997 - Revised May 2000 CD54/74HC240, CD54/74HCT240, HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High Speed CMOS Logic Octal Buffer/Line

More information

CD74HC534, CD74HCT534, CD74HC564, CD74HCT564

CD74HC534, CD74HCT534, CD74HC564, CD74HCT564 Data sheet acquired from Harris Semiconductor SCHS188 January 1998 CD74HC534, CD74HCT534, CD74HC564, CD74HCT564 High Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

More information

CD54/74HC175, CD54/74HCT175

CD54/74HC175, CD54/74HCT175 CD54/74HC175, CD54/74HCT175 Data sheet acquired from Harris Semiconductor SCHS160A August 1997 - evised May 2000 High Speed CMOS Logic uad D-Type Flip-Flop with eset [ /Title (CD74 HC175, CD74 HCT17 5)

More information

CD74HC73, CD74HCT73. Dual J-K Flip-Flop with Reset Negative-Edge Trigger. Features. Description. Ordering Information. Pinout

CD74HC73, CD74HCT73. Dual J-K Flip-Flop with Reset Negative-Edge Trigger. Features. Description. Ordering Information. Pinout Data sheet acquired from Harris Semiconductor SCHS134 February 1998 CD74HC73, CD74HCT73 Dual J-K Flip-Flop with Reset Negative-Edge Trigger [ /Title (CD74 HC73, CD74 HCT73 ) /Subject Dual -K liplop Features

More information

CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052, CD74HCT4052, CD54/74HC4053, CD74HCT4053

CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052, CD74HCT4052, CD54/74HC4053, CD74HCT4053 Data sheet acquired from Harris Semiconductor SCHS122B November 1997 - Revised May 2000 CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052, CD74HCT4052, CD54/74HC4053, CD74HCT4053 High Speed CMOS Logic Analog

More information

CD74HC4067, CD74HCT4067

CD74HC4067, CD74HCT4067 Data sheet acquired from Harris Semiconductor SCHS209 February 1998 CD74HC4067, CD74HCT4067 High-Speed CMOS Logic 16-Channel Analog Multiplexer/Demultiplexer [ /Title (CD74 HC406 7, CD74 HCT40 67) /Subject

More information

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 Data sheet acquired from Harris Semiconductor SCHS174B February 1998 - Revised May 2003 CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset [ /Title (CD74

More information

CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541

CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541 CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541 Data sheet acquired from Harris Semiconductor SCHS189C January 1998 - Revised July 2004 High-Speed CMOS Logic Octal Buffer and Line Drivers, Three-State

More information

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description Data sheet acquired from Harris Semiconductor SCHS166F November 1997 - Revised October 2003 CD54HC221, CD74HC221, CD74HCT221 High-Speed CMOS Logic Dual Monostable Multivibrator with Reset Features Description

More information

CD74AC86, CD54/74ACT86

CD74AC86, CD54/74ACT86 Data sheet acquired from Harris Semiconductor SCHSA September 998 - Revised May 000 CD7AC86, CD/7ACT86 Quad -Input Exclusive-OR Gate [ /Title (CD7 AC86, CD7 ACT86 ) /Subject Quad -Input xclu- ive- R ate)

More information

CD74HC374, CD74HCT374, CD74HC574, CD74HCT574

CD74HC374, CD74HCT374, CD74HC574, CD74HCT574 ata sheet acquired from Harris Semiconductor SCHS183 February 1998 C74HC374, C74HCT374, C74HC574, C74HCT574 High Speed CMOS Logic Octal -Type Flip-Flop, Three-State Positive-Edge Triggered [ /Title (C74

More information

CD54/74AC245, CD54/74ACT245

CD54/74AC245, CD54/74ACT245 CD54/74AC245, CD54/74ACT245 Data sheet acquired from Harris Semiconductor SCHS245B September 1998 - Revised October 2000 Octal-Bus Transceiver, Three-State, Non-Inverting Features Description [ /Title

More information

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State Description Features

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State Description Features CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 [ /Title (CD74H C173, CD74H CT173) /Subject (High Speed CMOS Logic Quad D- Type Data sheet acquired from Harris Semiconductor SCHS158E February 1998 - Revised

More information

CD74HC374, CD74HCT374, CD74HC574, CD74HCT574

CD74HC374, CD74HCT374, CD74HC574, CD74HCT574 ata sheet acquired from Harris Semiconductor SCHS183 February 1998 C74HC374, C74HCT374, C74HC574, C74HCT574 High Speed CMOS Logic Octal -Type Flip-Flop, Three-State Positive-Edge Triggered Features escription

More information

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 C54/74HC374, C54/74HCT374, C54/74HC574, C54/74HCT574 ata sheet acquired from Harris Semiconductor SCHS183B February 1998 - Revised May 2003 Features High-Speed CMOS Logic Octal -Type Flip-Flop, 3-State

More information

CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423

CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 Data sheet acquired from Harris Semiconductor SCHS142F September 1997 - Revised October 2003 High-Speed CMOS Logic Dual Retriggerable Monostable Multivibrators

More information

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 Data sheet acquired from Harris Semiconductor SCHS183C February 1998 - Revised May 2004 Features High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State

More information

CD54/74HC30, CD54/74HCT30

CD54/74HC30, CD54/74HCT30 CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121D August 1997 - Revised September 2003 High Speed CMOS Logic 8-Input NAND Gate [ /Title (CD54H C30, CD74H C30, CD74H CT30)

More information

CD54HC194, CD74HC194, CD74HCT194

CD54HC194, CD74HC194, CD74HCT194 Data sheet acquired from Harris Semiconductor SCHS164F September 1997 - Revised October 2003 CD54HC194, CD74HC194, CD74HCT194 High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register Features

More information

CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538

CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538 CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538 Data sheet acquired from Harris Semiconductor SCHS123E June 1998 - Revised October 2003 High-Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator

More information

CD54HC251, CD74HC251, CD54HCT251, CD74HCT251

CD54HC251, CD74HC251, CD54HCT251, CD74HCT251 Data sheet acquired from Harris Semiconductor SCHS169C November 1997 - Revised October 2003 CD54HC251, CD74HC251, CD54HCT251, CD74HCT251 High-Speed CMOS Logic 8-Input Multiplexer, Three-State [ /Title

More information

CD74HCT4514, CD74HCT LINE TO 16-LINE DECODERS/DEMULTIPLEXERS WITH INPUT LATCHES

CD74HCT4514, CD74HCT LINE TO 16-LINE DECODERS/DEMULTIPLEXERS WITH INPUT LATCHES 4.5-V to 5.5-V V CC Operation Fanout (Over Temperature Range) Standard s... 0 LSTTL Loads Bus-Driver s... 5 LSTTL Loads Wide Operating Temperature Range of 55 C to 25 C Balanced Propagation Delays and

More information

CD54HC75, CD74HC75, CD54HCT75, CD74HCT75

CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 Data sheet acquired from Harris Semiconductor SCHS135F March 1998 - Revised October 2003 Dual 2-Bit Bistable Transparent Latch [ /Title (CD74 HC75, CD74 HCT75 )

More information

CD54HC139, CD74HC139, CD54HCT139, CD74HCT139

CD54HC139, CD74HC139, CD54HCT139, CD74HCT139 Data sheet acquired from Harris Semiconductor SCHS148D September 1997 - Revised October 2003 CD54HC139, CD74HC139, CD54HCT139, CD74HCT139 High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer [

More information

CD54HC164, CD74HC164, CD54HCT164, CD74HCT164

CD54HC164, CD74HC164, CD54HCT164, CD74HCT164 Data sheet acquired from Harris Semiconductor SCHS155C October 1997 - Revised August 2003 CD54HC164, CD74HC164, CD54HCT164, CD74HCT164 High-Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register

More information

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description Data sheet acquired from Harris Semiconductor SCHS166F November 1997 - Revised October 2003 CD54HC221, CD74HC221, CD74HCT221 High-Speed CMOS Logic Dual Monostable Multivibrator with Reset Features Description

More information

CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520

CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 Data sheet acquired from Harris Semiconductor SCHS216D November 1997 - Revised October 2003 High-Speed CMOS Logic Dual Synchronous Counters [ /Title (CD74

More information

CD54HC109, CD74HC109, CD54HCT109, CD74HCT109

CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E March 1998 - Revised October 2003 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger [ /Title

More information

CD54HC166, CD74HC166, CD54HCT166, CD74HCT166

CD54HC166, CD74HC166, CD54HCT166, CD74HCT166 CD54HC166, CD74HC166, CD54HCT166, CD74HCT166 Data sheet acquired from Harris Semiconductor SCHS157C February 1998 - Revised October 2003 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

More information

CD54/74HC4046A, CD54/74HCT4046A

CD54/74HC4046A, CD54/74HCT4046A CD5/7HC6A, CD5/7HCT6A Data sheet acquired from Harris Semiconductor SCHSC February 99 - Revised March High-Speed CMOS Logic Phase-Locked-Loop with VCO [ /Title (CD7 HC 6A, CD7 HCT 6A) /Subject (High- Speed

More information

CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060

CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 Data sheet acquired from Harris Semiconductor SCHS207G February 1998 - Revised October 2003 High-Speed CMOS Logic 14-Stage Binary Counter with Oscillator

More information

CD54HC283, CD74HC283, CD54HCT283, CD74HCT283

CD54HC283, CD74HC283, CD54HCT283, CD74HCT283 CD54HC283, CD74HC283, CD54HCT283, CD74HCT283 [ /Title (CD74 HC283, CD74 HCT28 3) /Subject (High Speed CMOS Logic 4-Bit Binary Full Adder Data sheet acquired from Harris Semiconductor SCHS176D November

More information

CD54HC194, CD74HC194, CD74HCT194

CD54HC194, CD74HC194, CD74HCT194 Data sheet acquired from Harris Semiconductor SCHS164G September 1997 - Revised May 2006 CD54HC194, CD74HC194, CD74HCT194 High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register Features Description

More information

CD54HC10, CD74HC10, CD54HCT10, CD74HCT10

CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 Data sheet acquired from Harris Semiconductor SCHS128C August 1997 - Revised September 2003 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 High-Speed CMOS Logic Triple 3-Input NAND Gate [ /Title (CD74 HC10,

More information

CD54HC132, CD74HC132, CD54HCT132, CD74HCT132

CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger [ /Title (CD74

More information

CD4538 Dual Precision Monostable

CD4538 Dual Precision Monostable CD4538 Dual Precision Monostable General Description The CD4538BC is a dual, precision monostable multivibrator with independent trigger and reset controls. The device is retriggerable and resettable,

More information

MM74HC132 Quad 2-Input NAND Schmitt Trigger

MM74HC132 Quad 2-Input NAND Schmitt Trigger Quad 2-Input NAND Schmitt Trigger General Description The utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability

More information

MM74HC221A Dual Non-Retriggerable Monostable Multivibrator

MM74HC221A Dual Non-Retriggerable Monostable Multivibrator September 1983 Revised January 2004 MM74HC221A Dual Non-Retriggerable Monostable Multivibrator General Description The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate

More information

CD54HC73, CD74HC73, CD74HCT73

CD54HC73, CD74HC73, CD74HCT73 CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E February 1998 - Revised September 2003 Dual J-K Flip-Flop with Reset Negative-Edge Trigger [ /Title (CD74 HC73, CD74

More information

CD54HC280, CD74HC280, CD54HCT280, CD74HCT280

CD54HC280, CD74HC280, CD54HCT280, CD74HCT280 Data sheet acquired from Harris Semiconductor SCHS175D November 1997 - Revised October 2003 Features CD54HC280, CD74HC280, CD54HCT280, CD74HCT280 High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker

More information

ISO-9001 AS9120certi cation ClassQ Military

ISO-9001 AS9120certi cation ClassQ Military Datasheet RochesterElectronics ManufacturedComponents Rochester branded components are manufactured using eitherdie/wafers purchasedfrom theoriginalsuppliers orrochesterwafers recreated from the originalip.

More information

CD54/74HC297, CD74HCT297

CD54/74HC297, CD74HCT297 C5/7HC297, C7HCT297 ata sheet acquired from Harris Semiconductor SCHS177A November 1997 - evised May 2000 High-Speed CMOS Logic igital Phase-Locked-Loop [ /Title (C7 HC297, C7 HCT29 7) /Subject Highpeed

More information

SN75150 DUAL LINE DRIVER

SN75150 DUAL LINE DRIVER Meets or Exceeds the Requirement of TIA/EIA-232-F and ITU Recommendation V.28 Withstands Sustained Output Short Circuit to Any Low-Impedance Voltage Between 25 V and 25 V 2-µs Maximum Transition Time Through

More information

CD54HC147, CD74HC147, CD74HCT147

CD54HC147, CD74HC147, CD74HCT147 CD54HC147, CD74HC147, CD74HCT147 Data sheet acquired from Harris Semiconductor SCHS149F September 1997 - Revised November 2003 High-Speed CMOS Logic 10- to 4-Line Priority Encoder [ /Title (CD74 HC147,

More information

CD54HC14, CD74HC14, CD54HCT14, CD74HCT14

CD54HC14, CD74HC14, CD54HCT14, CD74HCT14 CD54HC14, CD74HC14, CD54HCT14, CD74HCT14 Data sheet acquired from Harris Semiconductor SCHS129F January 1998 - Revised May 2005 High-Speed CMOS Logic Hex Inverting Schmitt Trigger [ /Title (CD74H C14,

More information

CD74HC7046A, CD74HCT7046A

CD74HC7046A, CD74HCT7046A Data sheet acquired from Harris Semiconductor SCHS February 99 CD7HC706A, CD7HCT706A Phase-Locked Loop with VCO and Lock Detector [ /Title (CD7 HC70 6A, CD7 HCT70 6A) /Subject Phaseocked oop Features Center

More information

CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541

CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541 CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541 Data sheet acquired from Harris Semiconductor SCHS189C January 1998 - Revised July 2004 High-Speed CMOS Logic Octal Buffer and Line Drivers, Three-State

More information

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273

CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 Data sheet acquired from Harris Semiconductor SCHS174B February 1998 - Revised May 2003 CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset [ /Title (CD74

More information

CD54HC297, CD74HC297, CD74HCT297

CD54HC297, CD74HC297, CD74HCT297 C54HC297, C74HC297, C74HCT297 ata sheet acquired from Harris Semiconductor SCHS177B November 1997 - Revised May 2003 High-Speed CMOS Logic igital Phase-Locked Loop [ /Title (C74 HC297, C74 HCT29 7) /Subject

More information

CD54HC74, CD74HC74, CD54HCT74, CD74HCT74

CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 Data sheet acquired from Harris Semiconductor SCHS124D January 1998 - Revised September 2003 Dual D Flip-Flop with Set and Reset Positive-Edge Trigger Features

More information

CD4538BC Dual Precision Monostable

CD4538BC Dual Precision Monostable CD4538BC Dual Precision Monostable General Description The CD4538BC is a dual, precision monostable multivibrator with independent trigger and reset controls. The device is retriggerable and resettable,

More information

CD54HC194, CD74HC194, CD74HCT194

CD54HC194, CD74HC194, CD74HCT194 Data sheet acquired from Harris Semiconductor SCHS164G September 1997 - Revised May 2006 CD54HC194, CD74HC194, CD74HCT194 High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register Features Description

More information

MAX232, MAX232I DUAL EIA-232 DRIVER/RECEIVER

MAX232, MAX232I DUAL EIA-232 DRIVER/RECEIVER Operates With Single -V Power Supply LinBiCMOS Process Technology Two Drivers and Two Receivers ± 0-V Input Levels Low Supply Current...8 ma Typical Meets or Exceeds TIA/EIA-22-F and ITU Recommendation

More information

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description

CD54HC221, CD74HC221, CD74HCT221. High-Speed CMOS Logic Dual Monostable Multivibrator with Reset. Features. Description Data sheet acquired from Harris Semiconductor SCHS166F November 1997 - Revised October 2003 CD54HC221, CD74HC221, CD74HCT221 High-Speed CMOS Logic Dual Monostable Multivibrator with Reset Features Description

More information

IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the

More information

SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS

SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 2-V to 5.5-V V CC Schmitt-Trigger Circuitry On A, B, and CLR Inputs for Slow Input Traition Rates Edge Triggered From Active-High or Active-Low

More information

CD54HC4015, CD74HC4015

CD54HC4015, CD74HC4015 CD54HC4015, CD74HC4015 Data sheet acquired from Harris Semiconductor SCHS198C November 1997 - Revised May 2003 High Speed CMOS Logic Dual 4-Stage Static Shift Register [ /Title (CD74 HC401 5) /Subject

More information

MM74HC132 Quad 2-Input NAND Schmitt Trigger

MM74HC132 Quad 2-Input NAND Schmitt Trigger Quad 2-Input NAND Schmitt Trigger General Description The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well

More information

SN75158 DUAL DIFFERENTIAL LINE DRIVER

SN75158 DUAL DIFFERENTIAL LINE DRIVER SN78 Meets or Exceeds the Requirements of ANSI EIA/TIA--B and ITU Recommendation V. Single -V Supply Balanced-Line Operation TTL Compatible High Output Impedance in Power-Off Condition High-Current Active-Pullup

More information

MM74HCU04 Hex Inverter

MM74HCU04 Hex Inverter MM74HCU04 Hex Inverter General Description The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard

More information

CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal Buffer/Line Drivers, Three-State

CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal Buffer/Line Drivers, Three-State Data sheet acquired from Harris Semiconductor SCHS167E November 1997 - Revised October 2004 CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal

More information

DM96S02 Dual Retriggerable Resettable Monostable Multivibrator

DM96S02 Dual Retriggerable Resettable Monostable Multivibrator January 1992 Revised June 1999 DM96S02 Dual Retriggerable Resettable Monostable Multivibrator General Description The DM96S02 is a dual retriggerable and resettable monostable multivibrator. This one-shot

More information

SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS High-Current -State s Drive Bus Lines, Buffer Memory Address Registers, or Drive up to LSTTL Loads True s Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers

More information

CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075

CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G August 1997 - Revised June 2006 High-Speed CMOS Logic Triple 3-Input OR Gate [ /Title (CD74H C4075,

More information

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 Single Chip With Easy Interface Between UART and Serial Port Connector Less Than 9-mW Power Consumption Wide Driver Supply

More information

CD4047BC Low Power Monostable/Astable Multivibrator

CD4047BC Low Power Monostable/Astable Multivibrator Low Power Monostable/Astable Multivibrator General Description The CD4047B is capable of operating in either the monostable or astable mode. It requires an external capacitor (between pins 1 and 3) and

More information

UNISONIC TECHNOLOGIES CO., LTD U74HC123

UNISONIC TECHNOLOGIES CO., LTD U74HC123 UNISONIC TECHNOLOGIES CO., LTD U74HC123 DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET SOP-16 DESCRIPTION The U74HC123 is high-speed Si-gate CMOS device and is pin compatible with low power Schottky

More information

CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060

CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 Data sheet acquired from Harris Semiconductor SCHS207G February 1998 - Revised October 2003 High-Speed CMOS Logic 14-Stage Binary Counter with Oscillator

More information

PRODUCT PREVIEW SN54AHCT257, SN74AHCT257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS. description

PRODUCT PREVIEW SN54AHCT257, SN74AHCT257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS. description Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink

More information

CD54HC40103, CD74HC40103, CD74HCT40103

CD54HC40103, CD74HC40103, CD74HCT40103 CD54HC40103, CD74HC40103, CD74HCT40103 Data sheet acquired from Harris Semiconductor SCHS221D November 1997 - Revised October 2003 High-Speed CMOS Logic 8-Stage Synchronous Down Counters [ /Title (CD74H

More information

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574

CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 Data sheet acquired from Harris Semiconductor SCHS183C February 1998 - Revised May 2004 Features High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State

More information

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 Single Chip With Easy Interface Between UART and Serial-Port Connector Less Than 9-mW Power Consumption Wide Driver Supply

More information

CD54HC112, CD74HC112, CD54HCT112, CD74HCT112

CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H March 1998 - Revised October 2003 Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger [ /Title

More information

SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS Converts TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays s Fully Compatible With Most TTL Circuits

More information

SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT

SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT and Open-Drain Accept Voltages up to 5.5 V Supports 5-V V CC Operation description This single inverter buffer/driver is designed for 1.65-V to 5.5-V V CC operation. DBV OR DCK PACKAGE (TOP VIEW) NC A

More information

SN54LVC14A, SN74LVC14A HEX SCHMITT-TRIGGER INVERTERS

SN54LVC14A, SN74LVC14A HEX SCHMITT-TRIGGER INVERTERS Typical V OLP ( Ground Bounce) 2 V at V CC = 3.3 V, T A = 25 C s Accept Voltages to 5.5 V Latch-Up Performance Exceeds 100 ma Per JESD

More information

CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050

CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 Data sheet acquired from Harris Semiconductor SCHS205I February 1998 - Revised February 2005 High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

More information

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 CD54HC173, CD74HC173, CD54HCT173, CD74HCT173 Data sheet acquired from Harris Semiconductor SCHS158E February 1998 - Revised October 2003 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State [ /Title

More information

SN54ACT00, SN74ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SN54ACT00, SN74ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCAS AUGUST 99 REVISED MAY 99 Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) -µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin

More information

CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075

CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G August 1997 - Revised June 2006 High-Speed CMOS Logic Triple 3-Input OR Gate [ /Title (CD74H C4075,

More information

MM74HC00 Quad 2-Input NAND Gate

MM74HC00 Quad 2-Input NAND Gate Quad 2-Input NAND Gate General Description The MM74HC00 NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard

More information

CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A

CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A CD5HC6A, CD7HC6A, CD5HCT6A, CD7HCT6A Data sheet acquired from Harris Semiconductor SCHSE February 99 - Revised May 3 High-Speed CMOS Logic Phase-Locked Loop with VCO [ /Title (CD7 HC 6A, CD7 HCT 6A) /Subject

More information

ORDERING INFORMATION PACKAGE

ORDERING INFORMATION PACKAGE Member of Texas Instruments Widebus Family Latch-Up Performance Exceeds 250 ma Per JESD 17 ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) Bus Hold on Data

More information

Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s) DUAL MONOSTABLE MULTIVIBRATOR RETRIGGERABLE/RESETTABLE CAPABILITY TRIGGER AND RESET PROPAGATION DELAYS INDEPENDENT OF R X, C X TRIGGERING FROM LEADING OR TRAILING EDGE Q AND Q BUFFERED OUTPUT AVAILABLE

More information

HCF4538B DUAL MONOSTABLE MULTIVIBRATOR

HCF4538B DUAL MONOSTABLE MULTIVIBRATOR DUAL MONOSTABLE MULTIVIBRATOR RETRIGGERABLE/RESETTABLE CAPABILITY TRIGGER AND RESET PROPAGATION DELAYS INDEPENDENT OF R X, C X TRIGGERING FROM LEADING OR TRAILING EDGE Q AND Q BUFFERED OUTPUT AVAILABLE

More information

CD54HC4017, CD74HC4017

CD54HC4017, CD74HC4017 CD54HC4017, CD74HC4017 Data sheet acquired from Harris Semiconductor SCHS200D November 1997 - Revised October 2003 High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs [ /Title (CD74 HC401

More information

ULN2804A DARLINGTON TRANSISTOR ARRAY

ULN2804A DARLINGTON TRANSISTOR ARRAY HIGH-VOLTAGE, HIGH-CURRENT 500-mA-Rated Collector Current (Single ) High-Voltage s...50 V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications Compatible With ULN2800A-Series

More information

CD74HC4538-Q1 HIGH-SPEED CMOS LOGIC DUAL RETRIGGERABLE PRECISION MONOSTABLE MULTIVIBRATOR

CD74HC4538-Q1 HIGH-SPEED CMOS LOGIC DUAL RETRIGGERABLE PRECISION MONOSTABLE MULTIVIBRATOR Qualified for Automotive Applications Retriggerable/Resettable Capability Trigger and Reset Propagation Delays Independent of R X, C X Triggering From the Leading or Trailing Edge Q and Q Buffered Outputs

More information

SN74ALVCH V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74ALVCH V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS Member of the Texas Instruments Widebus Family EPIC (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 200 Per MIL-STD-883, Method 3015; Exceeds 20 Using Machine Model (C =

More information

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic

More information

SN54HC175, SN74HC175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

SN54HC175, SN74HC175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR Contain Four Flip-Flops With Double-Rail Outputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline

More information

SN54HC373, SN74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SN54HC373, SN74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS Eight High-Current Latches in a Single Package High-Current -State True s Can Drive up to LSTTL Loads Full Parallel Access for Loading Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline

More information