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1 Distributed by: The content and copyrights of the attached material are the property of its owner.

2 NE SA - SE GENERAL PURPOSE SINGLE BIPOLAR TIMERS LOW TURN OFF TIME MAXIMUM OPERATING FREQUENCY GREATER THAN 00kHz TIMING FROM MICROSECONDS TO HOURS OPERATES IN BOTH ASTABLE AND MONOSTABLE MODES HIGH OUTPUT CURRENT CAN SOURCE OR SINK 00mA ADJUSTABLE DUTY CYCLE TTL COMPATIBLE TEMPERATURE STABILITY OF 0.00% PER C DESCRIPTION The NE monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 00mA. ORDER CODE Package Part Number Temperature Range N D NE 0 C, 0 C SA -0 C, C SE - C, C N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) N DIP8 (Plastic Package) D SO8 (Plastic Micropackage) PIN CONNECTIONS (top view) - GND - Trigger - Output - Reset 8 - Control voltage - Threshold - Discharge 8 - cc June 00 /9

3 NE-SA-SE BLOCK DIAGRAM + CC kω THRESHOLD CONTROL OLTAGE COMP R DISCHARGE FLIP-FLOP kω Q TRIGGER COMP S INHIBIT/ RESET OUT kω RESET S S SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter alue Unit CC Supply oltage 8 T j Junction Temperature 0 C T stg Storage Temperature Range - to 0 C OPERATING CONDITIONS /9 Symbol Parameter alue Unit CC SA Supply oltage NE SE. to. to. to 8 th, trig, cl, reset Maximum Input oltage CC T oper Operating Free Air Temperature Range for NE for SA for SE 0 to 0-0 to - to C

4 NE-SA-SE ELECTRICAL CHARACTERISTICS T amb = + C, CC = + to + (unless otherwise specified) Symbol Parameter Supply Current (RL ) - note ) Low Stage I CC = + CC CC = + High State CC = Timing Error (monostable) (R A = k to 0kΩ, C = 0.µF) Initial Accuracy - note ) Drift with Temperature Drift with Supply oltage Timing Error (astable) (R A, R B = kω to 0kΩ, C = 0.µF, CC = +) Initial Accuracy - see note Drift with Temperature Drift with Supply oltage Control oltage Level CL CC = + CC = + Threshold oltage th CC = + CC = + I th Threshold Current - note ) Trigger oltage trig CC = + CC = + SE NE - SA Min. Typ. Max. Min. Typ. Max.. Supply current when output is high is typically ma less.. Tested at CC = + and CC = +. This will determine the maximum value of R A + R B for + operation the max total is R = 0MΩ and for operation the max total R =.MΩ. Specified with trigger input high. No protection against excessive pin current is necessary, providing the package dissipation rating will not be exceeded. Time measured from a positive going input pulse from 0 to 0.8x cc into the threshold to the drop from high to low of the output trigger is tied to threshold Unit ma % ppm/ C %/ % ppm/ C %/ µa I trig Trigger Current ( trig = 0) µa reset Reset oltage ) Reset Current I reset reset = ma reset = OL OH I dis(off) dis(sat) t r t f Low Level Output oltage CC = + I O(sink) = ma I O(sink) = 0mA I O(sink) = 0mA I O(sink) = 00mA CC = + I O(sink) = 8mA I O(sink) = ma High Level Output oltage CC = + I O(sink) = 00mA I O(sink) = 0mA CC = + I O(sink) = 0mA Discharge Pin Leakage Current (output high) ( dis = Discharge pin Saturation oltage (output low) - note ) CC = +, I dis = ma CC = +, I dis =.ma Output rise Time Output Fall Time toff Turn off Time - note ) ( reset = CC ) na m ns µs /9

5 NE-SA-SE Figure : Minimum Pulse Width Required for Triggering Figure : Low Output oltage versus Output Sink Current Figure : Supply Current versus Supply oltage Figure : Low Output oltage versus Output Sink Current Figure : Delay Time versus Temperature Figure : Low Output oltage versus Output Sink Current /9

6 NE-SA-SE Figure : High Output oltage Drop versus Output APPLICATION INFORMATION MONOSTABLE OPERATION In the monostable mode, the timer functions as a one-shot. Referring to figure the external capacitor is initially held discharged by a transistor inside the timer. Figure : CC = to Reset R 8 Trigger NE C Figure 8 : Delay Time versus Supply oltage Output Control oltage 0.0µF Figure 9 : Propagation Delay versus oltage Level of Trigger alue The circuit triggers on a negative-going input signal when the level reaches / CC. Once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this interval. The duration of the output HIGH state is given by t =. R C and is easily determined by figure. Notice that since the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. Applying a negative pulse simultaneously to the reset terminal (pin ) and the trigger terminal (pin ) during the timing cycle discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. During the time the reset pulse in applied, the output is driven to its LOW state. When a negative trigger pulse is applied to pin, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentially with the time constant t = R C. When the voltage across the capacitor equals / CC, the comparator resets the flip-flop which then discharge the capacitor rapidly and drivers the output to its LOW state. Figure shows the actual waveforms generated in this mode of operation. When Reset is not used, it should be tied high to avoid any possibly or false triggering. /9

7 NE-SA-SE Figure : Figure : t = 0. ms / div INPUT =.0/div OUTPUT OLTAGE =.0/div CAPACITOR OLTAGE =.0/div R = 9.kΩ, C = 0.0µF, R L = kω Figure shows actual waveforms generated in this mode of operation. The charge time (output HIGH) is given by: t = 0.9 (R + R ) C and the discharge time (output LOW) by: t = 0.9 (R ) C Thus the total period T is given by: T = t + t = 0.9 (R + R) C The frequency of oscillation is then: f = --. = T ( R + R)C may be easily found by figure. The duty cycle is given by: R D = R + R Figure : C (µf) R= kω kω 0kΩ MΩ MΩ t = 0. ms / div OUTPUT OLTAGE =.0/div 0.00 µs 0 µs.0 ms ms 0 ms s (t d) CAPACITOR OLTAGE =.0/div ASTABLE OPERATION When the circuit is connected as shown in figure (pin and connected) it triggers itself and free runs as a multi vibrator. The external capacitor charges through R and R and discharges through R only. Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operation, C charges and discharges between / CC and / CC. As in the triggered mode, the charge and discharge times and therefore frequency are independent of the supply voltage. Figure : CC = to Figure : Free Running Frequency versus R, R and C C (µf) R = R =.8kΩ, C= 0.µF, R = kω L kω kω 0kΩ MΩ R + R = MΩ k k f o(hz) 8 R Output NE R 0.0µF Control oltage C /9

8 NE-SA-SE PULSE WIDTH MODULATOR Figure 8 : Linear Ramp When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin. Figure shows the circuit. Figure : Pulse Width Modulator CC Trigger Output LINEAR RAMP When the pull-up resistor, R A, in the monostable circuit is replaced by a constant current source, a linear ramp is generated. Figure shows a circuit configuration that will perform this function. Figure : NE 8 Modulation Input R A C CC = Time: 0µs/DI R + kω R = 0kΩ R E =.kω C = 0.0µF Top trace: input /DI Middle trace: output /DI Bottom trace: output /DI Bottom trace: capacitor voltage /DI 0% DUTY CYCLE OSCILLATOR For a 0% duty cycle the resistors R A and R E may be connected as in figure 9. The time period for the output high is the same as previous, t = 0.9 R A C For the output low it is t = [(R. RB)/(RA+RB)].C.Ln RB RA RB RA Thus the frequency of oscillation is: f = t + t Figure 9 : 0% Duty Cycle Oscillator CC CC CC Trigger NE 8 RE N0 or equiv. R NE 8 RB kω R A kω Output C 0.0µF R Out 0.0µF C 0.0µF Figure 8 shows waveforms generator by the linear ramp. The time interval is given by: T = (/ cc RE (R+R) C BE = 0. R cc - BE (R+R) Note that this circuit will not oscillate if R B is greater than / R A because the junction of R A and R B cannot bring pin down to / CC and trigger the lower comparator. ADDITIONAL INFORMATION Adequate power supply by passing is necessary to protect associated circuitry. Minimum recommended is 0.µF in parallel with µf electrolytic. /9

9 NE-SA-SE PACKAGE MECHANICAL DATA Plastic DIP-8 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A. 0.0 a B B b b D E e. 0.0 e e F I L. 0.0 Z P00F 8/9

10 NE-SA-SE PACKAGE MECHANICAL DATA SO-8 MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A A A B C D E e H h L k 8 (max.) ddd /C Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 00 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom 9/9

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