CA3080, CA3080A. 2MHz, Operational Transconductance Amplifier (OTA) Features. Applications. Pinouts. Ordering Information

Transcription

1 CA, CAA Data Sheet September 99 File Number. MHz, Operational Transconductance Amplifier (OTA) The CA and CAA types are GatableGain Blocks which utilize the unique operationaltransconductanceamplifier (OTA) concept described in Application Note AN, Applications of the CA and CAA High Performance Operational Transconductance Amplifiers. The CA and CAA types have differential input and a singleended, pushpull, class A output. In addition, these types have an amplifier bias input which may be used either for gating or for linear gain control. These types also have a high output impedance and their transconductance (g M ) is directly proportional to the amplifier bias current (I ABC ). The CA and CAA types are notable for their excellent slew rate (V/µs), which makes them especially useful for multiplexer and fast unitygain voltage followers. These types are especially applicable for multiplexer applications because power is consumed only when the devices are in the ON channel state. The CAA s characteristics are specifically controlled for applications such as samplehold, gaincontrol, multiplexing, etc. Ordering Information PART NUMBER (BRAND) TEMP. RANGE ( o C) PACKAGE CAA to Pin Metal Can T.C CAAE to Ld PDIP E. CAAM (A) CAAM9 (A) PKG. NO. to Ld SOIC M. to Ld SOIC Tape and Reel M. CAE to Ld PDIP E. CAM () CAM9 () to Ld SOIC M. to Ld SOIC Tape and Reel M. Features Slew Rate (Unity Gain, Compensated) V/µs Adjustable Power Consumption µW to µw Flexible Supply Voltage Range ±V to ±V Fully Adjustable Gain to g M R L Limit Tight g M Spread: CA : CAA : Extended g M Linearity Decades Applications Sample and Hold Multiplexer Voltage Follower Pinouts NC INV. NONINV. V INV. NONINV. CA (PDIP, SOIC) TOP VIEW CA (METAL CAN) TOP VIEW V Multiplier Comparator TAB V NC V AMPLIFIER BIAS BIAS CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. INTERSIL or Copyright Intersil Corporation 999

2 CA, CAA Absolute Maximum Ratings Supply Voltage (Between V and V Terminal) V Differential Input Voltage V Input Voltage V to V Input Signal Current ma Amplifier Bias Current (I ABC ) ma Output Short Circuit Duration (Note ) No Limitation Operating Conditions Temperature Range CA o C to o C CAA o C to o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) PDIP Package N/A SOIC Package N/A Metal Can Package Maximum Junction Temperature (Metal Can) o C Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Short circuit may be applied to ground or to either supply.. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications For Equipment Design, V SUPPLY = ±V, Unless Otherwise Specified CA CAA PARAMETER TEST CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage I ABC = µa.. mv I ABC = µa.. mv Full mv Input Offset Voltage Change I ABC = µa to µa.. mv Input Offset Voltage Temp. Drift I ABC = µa Full. µv/ o C Input Offset Voltage Positive I ABC = µa µv/v Sensitivity Negative µv/v Input Offset Current I ABC = µa.... µα Input Bias Current I ABC = µa µa Full µa Differential Input Current I ABC =, V DIFF = V.. na Amplifier Bias Voltage I ABC = µa.. V Input Resistance I ABC = µa kω Input Capacitance I ABC = µa, f = MHz.. pf InputtoOutput Capacitance I ABC = µa, f = MHz.. pf CommonMode InputVoltage Range I ABC = µa to. to. to. to. V Forward Transconductance I ABC = µa 9 9 µs (Large Signal) Full µs Output Capacitance I ABC = µa, f = MHz.. pf Output Resistance I ABC = µa MΩ Peak Output Current I ABC = µa, R L = Ω µa I ABC = µa, R L = Ω µa Full µa

3 Q D CA, CAA Electrical Specifications For Equipment Design, V SUPPLY = ±V, Unless Otherwise Specified (Continued) CA CAA PARAMETER TEST CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS Peak Output Voltage Positive I ABC = µa, R L =.. V Negative.. V Positive I ABC = µa, R L =.. V Negative.. V Amplifier Supply Current I ABC = µa.... ma Device Dissipation I ABC = µa mw Magnitude of Leakage Current I ABC =, V TP =.. na I ABC =, V TP = V.. na Propagation Delay I ABC = µa ns CommonMode Rejection Ratio I ABC = µa db OpenLoop Bandwidth I ABC = µa MHz Slew Rate Uncompensated V/µs Compensated V/µs Schematic Diagram D D V Q Q Q D Q 9 INVERTING NON INVERTING AMPLIFIER BIAS Q Q D Q Q Q Q V D Typical Applications V = V V S = ±V Ω.µF kω 9pF Ω CA, A kω LOAD (SCOPE PROBE) MΩ pf V/DIV..µF kω V = V V/DIV..µF TIME (.µs/div.) FIGURE. SCHEMATIC DIAGRAM OF THE CA AND CAA IN A UNITYGAIN VOLTAGE FOLLOWER CONFIGURATION AND ASSOCIATED WAVEFORM

4 CA, CAA Typical Applications (Continued) pf.kω VOLTAGECONTROLLED SOURCE kω kω MΩ.V.V kω.v SYMMETRY MAX FREQ. SET.V CAA.kΩ.V kω.kω Ω Ω FREQ. ADJUST.9 pf C.kΩ pf C EXTERNAL SWEEPING MIN FREQ. SET.V BUFFER VOLTAGE FOLLOWER.V HIGH FREQ. SHAPE pf C CA.V.µF. µf.v kω pf kω CENTERING kω C.MΩ.V kω THRESHOLD DETECTOR CA kω kω C.V.V N9 HIGHFREQ. LEVEL ADJUST FIGURE.,,/ SINGLECONTROL FUNCTION GENERATOR MHz TO Hz NOTE: A SquareWave Signal Modulates The External Sweeping Input to Produce Hz and MHz, showing the,,/ frequency range of the function generator. FIGURE A. TWOTONE SIGNAL FROM THE FUNCTION GENERATOR NOTE: The bottom trace is the sweeping signal and the top trace is the actual generator output. The center trace displays the MHz signal via delayed oscilloscope triggering of the upper swept output signal. FIGURE B. TRIPLETRACE OF THE FUNCTION GENERATOR SWEEPING TO MHz FIGURE. FUNCTION GENERATOR DYNAMIC CHARACTERISTICS WAVEFORMS

5 CA, CAA Typical Applications (Continued).kΩ V = V.µF CAA N.kΩ Ω.µF pf kω SAMPLE V kω STORAGE AND PHASE COMPENSATION NETWORK SLEW RATE (IN SAMPLE MODE) =.V/µs ACQUISITION TIME = µs (NOTE) HOLD V NOTE: Time required for output to settle within ±mv of a V step. V = V FIGURE. SCHEMATIC DIAGRAM OF THE CAA IN A SAMPLEHOLD CONFIGURATION STROBE kω N9 SAMPLE V HOLD N9.µF kω CAA.µF kω V kω CA kω V.µF. µf.kω kω pf pf Ω kω V.µF pf SIMULATED LOAD NOT REQUIRED FIGURE. SAMPLE AND HOLD CIRCUIT

6 CA, CAA Typical Applications (Continued) Top Trace: Bottom Trace: Center Trace: Output Signal V/Div., µs/div. Input Signal V/Div., µs/div. Difference of Input and Output Signals Through Tektronix Amplifier A mv/div., µs/div. FIGURE. LARGE SIGNAL RESPONSE AND SETTLING TIME FOR CIRCUIT SHOWN IN FIGURE Top Trace: System Output; mv/div., ns/div. Bottom Trace: Sampling Signal; V/Div., ns/div. FIGURE. SAMPLING RESPONSE FOR CIRCUIT SHOWN IN FIGURE Top Trace: Bottom Trace: Output; mv/div., ns/div. Input; mv/div., ns/div. FIGURE. AND RESPONSE FOR CIRCUIT SHOWN IN FIGURE THERMOCOUPLE.K K K CAA K µf CA9 K W LOAD MT V AC G MT Hz K K.K N9 N9 R F 9 NOTE: All resistors / watt, unless otherwise specified. FIGURE 9. THERMOCOUPLE TEMPERATURE CONTROL WITH CA9 ZERO VOLTAGE SWITCH AS THE AMPLIFIER

7 CA, CAA Typical Applications (Continued) R K SAMPLE.V CONTROL AMPLIFIER CAA (OTA) R K.V R K SAMPLE READOUT AMPLIFIER CA C.V C.µF C. µf R K C L e.g. pf (TYP) SAMPLE V HOLD. STROBE C.µF R K C pf R NULLING STORAGE AND PHASE COMPENSATION R K pf.v R K C.µF FIGURE. SCHEMATIC DIAGRAM OF THE CAA IN A SAMPLEHOLD CIRCUIT WITH BIMOS AMPLIFIER Top Trace: Center Trace: Bottom Trace: Output; V/Div., µs/div. Differential Comparison of Input and Output mv/div., µs/div. Input; V/Div., µs/div. Top Trace: Bottom Trace: Output mv/div., ns/div. Input mv/div., ns/div. FIGURE. LARGESIGNAL RESPONSE FOR CIRCUIT SHOWN IN FIGURE FIGURE. SMALLSIGNAL RESPONSE FOR CIRCUIT SHOWN IN FIGURE

8 CA, CAA Typical Applications (Continued) V = V mv mv IN Ω CA,A kω I ABC = µa.mω OUT N9 V = V t PLH tphl FIGURE. PROPAGATION DELAY TEST CIRCUIT AND ASSOCIATED WAVEFORMS Typical Performance Curves OFFSET VOLTAGE (mv) SUPPLY VOLTS: V S = ±V o C o 9 o C C o C o C 9 o C o C o C o C o C. OFFSET (na) SUPPLY VOLTS: V S = ±V o C o C. o C.. FIGURE. OFFSET VOLTAGE vs AMPLIFIER BIAS FIGURE. OFFSET vs AMPLIFIER BIAS BIAS (na) SUPPLY VOLTS: V S = ±V o C o C o C PEAK (µa) SUPPLY VOLTS: V S = ±V LOAD RESISTANCE = Ω o C o C o C.. FIGURE. BIAS vs AMPLIFIER BIAS.. FIGURE. PEAK vs AMPLIFIER BIAS

9 CA, CAA Typical Performance Curves (Continued) PEAK VOLTAGE (V) COMMON MODE VOLTAGE (V)... SUPPLY VOLTS: V S = ±V T A = o C LOAD RESISTANCE = V CMR V OM V OM. V CMR. FIGURE. PEAK VOLTAGE vs AMPLIFIER BIAS AMPLIFIER SUPPLY (µa). SUPPLY VOLTS: V S = ±V o C o C, o C o C o C o C. FIGURE 9. AMPLIFIER SUPPLY vs AMPLIFIER BIAS DEVICE POWER DISSIPATION (µw) T A = o C V S = ±V V S = ±V V S = ±V. FORWARD TRANSCONDUCTANCE (µs) SUPPLY VOLTS: V S = ±V o C o C o C. FIGURE. TOTAL POWER DISSIPATION vs AMPLIFIER BIAS FIGURE. TRANSCONDUCTANCE vs AMPLIFIER BIAS V V TEST POINT (V TP ) V CA, A MAGNITUDE OF LEAKAGE (na). SUPPLY VOLTS: V S = ±V V = V = V = V. TEMPERATURE ( o C) V FIGURE. LEAKAGE TEST CIRCUIT FIGURE. LEAKAGE vs TEMPERATURE 9

10 CA, CAA Typical Performance Curves (Continued) V DIFF = ±V V = V CA, A V = V DIFFERENTIAL (pa) SUPPLY VOLTS: V S = ±V o C o C DIFFERENTIAL VOLTAGE (V) FIGURE. DIFFERENTIAL TEST CIRCUIT FIGURE. vs DIFFERENTIAL VOLTAGE SUPPLY VOLTS: V S = ±V T A = o C 9 SUPPLY VOLTS: V S = ±V RESISTANCE (MΩ)... AMPLIFIER BIAS VOLTAGE (mv) o C o C o C. FIGURE. RESISTANCE vs AMPLIFIER BIAS FIGURE. AMPLIFIER BIAS VOLTAGE vs AMPLIFIER BIAS AND CAPACITANCE (pf) SUPPLY VOLTS: V S = ±V f = MHz T A = o C. C O C I RESISTANCE (MΩ) SUPPLY VOLTS: V S = ±V T A = o C. FIGURE. AND CAPACITANCE vs AMPLIFIER BIAS FIGURE 9. RESISTANCE vs AMPLIFIER BIAS

11 CA, CAA Typical Performance Curves (Continued) V.µF CA, A.µF TO CAPACITANCE (pf) f = MHz T A = o C V POSITIVE AND NEGATIVE SUPPLY VOLTAGE (V) FIGURE. TO CAPACITANCE TEST CIRCUIT FIGURE. TO CAPACITANCE vs SUPPLY VOLTAGE All Intersil semiconductor products are manufactured, assembled and tested under ISO9 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box, Mail Stop Melbourne, FL 9 TEL: () FAX: () EUROPE Intersil SA Mercure Center, Rue de la Fusee Brussels, Belgium TEL: ().. FAX: ()... ASIA Intersil (Taiwan) Ltd. F, No. Fu Hsing North Road Taipei, Taiwan Republic of China TEL: () 9 FAX: () 9