OBSOLETE PRODUCT RECOMMENDED REPLACEMENT PART

Transcription

1 CA-46 General Purpose NPN Transistor Array OBSOLETE PRODUCT RECOMMENDED REPLACEMENT PART HFA46 DATASHEET FN4 Rev 6. December, The CA46 consists of five general purpose silicon NPN transistors on a common monolithic substrate. Two of the transistors are internally connected to form a differentially connected pair. The transistors of the CA46 are well suited to a wide variety of applications in low power systems in the DC through VHF range. They may be used as discrete transistors in conventional circuits. However, in addition, they provide the very significant inherent integrated circuit advantages of close electrical and thermal matching. Ordering Information PART NUMBER (BRAND) Pinout TEMP. RANGE ( o C) CA46 (PDIP, SOIC) TOP VIEW PACKAGE PKG. NO. CA46 - to 4 Ld PDIP E4. CA46M (46) CA46M96 (46) - to 4 Ld SOIC M4. - to 4 Ld SOIC Tape and Reel M4. Features Two Matched Transistors - V BE Match mv - I IO Match A (Max) Low Noise Figure dB (Typ) at khz General Purpose Monolithic Transistors Operation From DC to MHz Wide Operating Current Range Full Military Temperature Range Applications Three Isolated Transistors and One Differentially Connected Transistor Pair for Low Power Applications at Frequencies from DC Through the VHF Range Custom Designed Differential Amplifiers Temperature Compensated Amplifiers See Application Note, AN96 Application of the CA8 Integrated-Circuit Transistor Array for Suggested Applications DIFFERENTIAL PAIR Q Q Q Q 4 9 SUBSTRATE 7 Q 8 FN4 Rev 6. Page of 6 December,

2 CA-46 Absolute Maximum Ratings Collector-to-Emitter Voltage (V CEO ) V Collector-to-Base Voltage (V CBO ) V Collector-to-Substrate Voltage (V CIO, Note ) V Emitter-to-Base Voltage (V EBO ) V Collector Current (I C ) ma Operating Conditions Temperature Range o C to o C Thermal Information Thermal Resistance (Typical, Note ) JA ( o C/W) JC ( o C/W) PDIP Package N/A SOIC Package N/A Maximum Power Dissipation (Any One Transistor) mw Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. The collector of each transistor of the CA46 is isolated from the substrate by an integral diode. The substrate (Terminal ) must be connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications, characteristics apply for each transistor in CA46 as specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS DC CHARACTERISTICS Collector-to-Base Breakdown Voltage V (BR)CBO I C = A, I E = 6 - V Collector-to-Emitter Breakdown Voltage V (BR)CEO I C = ma, I B = 4 - V Collector-to-Substrate Breakdown Voltage V (BR)CIO I C = A, I CI = 6 - V Emitter-to-Base Breakdown Voltage V (BR)EBO I E = A, I C = 7 - V Collector Cutoff Current (Figure ) I CBO V CB = V, I E = -. 4 na Collector Cutoff Current (Figure ) I CEO V CE = V, I B = - See Fig.. A Forward Current Transfer Ratio (Static Beta) h FE I C = ma (Note ) (Figure ) I C = ma I C = A Input Offset Current for Matched Pair Q and Q. I IO - I IO (Note ) (Figure 4), I C = ma -. A Base-to-Emitter Voltage (Note ) (Figure ) V BE I E = ma V I E = ma V Magnitude of Input Offet Voltage for Differential Pair V BE - V BE (Note ) (Figures, 7), I C = ma -.4 mv Magnitude of Input Offset Voltage for Isolated Transistors V BE - V BE4, V BE4 - V BE, V BE - V BE (Note ) (Figures, 7) Temperature Coefficient of Base-to-Emitter Voltage (Figure 6) V BE T, I C = ma -.4 mv, I C = ma mv/ o C Collector-to-Emitter Saturation Voltage V CES I B = ma, I C = ma -. - V Temperature Coefficient: Magnitude of Input Offset Voltage (Figure 7) DYNAMIC CHARACTERISTICS V IO T, I C = ma -. - V/ o C Low Frequency Noise Figure (Figure 9) NF f = khz,, I C = A, Source Resistance = k -. - db Low Frequency, Small Signal Equivalent Circuit Characteristics Forward Current Transfer Ratio (Figure ) h FE f = khz,, I C = ma Short Circuit Input Impedance (Figure ) h IE f = khz,, I C = ma -. - k Open Circuit Output Impedance (Figure ) h OE f = khz,, I C = ma S FN4 Rev 6. Page of 6 December,

3 CA-46 Electrical Specifications, characteristics apply for each transistor in CA46 as specified (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Open Circuit Reverse Voltage Transfer Ratio h RE f = khz,, I C = ma -.8 x (Figure ) Admittance Characteristics Forward Transfer Admittance (Figure ) Y FE f = khz,, I C = ma - - j. - - Input Admittance (Figure ) Y IE f = khz,, I C = ma -. + j Output Admittance (Figure 4) Y OE f = khz,, I C = ma -. + j. - - Reverse Transfer Admittance (Figure ) Y RE f = khz,, I C = ma - See Fig Gain Bandwidth Product (Figure 6) f T, I C = ma - MHz Emitter-to-Base Capacitance C EB V EB = V, I E = pf Collector-to-Base Capacitance C CB V CB = V, I C = pf Collector-to-Substrate Capacitance C CI V CS = V, I C = pf NOTE:. Actual forcing current is via the emitter for this test. Typical Performance Curves COLLECTOR CUTOFF CURRENT (na) I E = V CB = V V CB = V V CB = V -4 7 COLLECTOR CUTOFF CURRENT (na) I B = V CE = V V CE = V 7 FIGURE. TYPICAL COLLECTOR-TO-BASE CUTOFF CUR- RENT vs TEMPERATURE FOR EACH TRANSISTOR FIGURE. TYPICAL COLLECTOR-TO-EMITTER CUTOFF CURRENT vs TEMPERATURE FOR EACH TRANSISTOR STATIC FORWARD CURRENT TRANSFER RATIO (h FE ) h FE h FE OR h FE h FE h FE BETA RATIO INPUT OFFSET CURRENT ( A)..... EMITTER CURRENT (ma) FIGURE. TYPICAL STATIC FORWARD CURRENT TRANSFER RATIO AND BETA RATIO FOR Q AND Q vs EMITTER CURRENT.... FIGURE 4. TYPICAL INPUT OFFSET CURRENT FOR MATCHED TRANSISTOR PAIR Q Q vs COLLECTOR CURRENT FN4 Rev 6. Page of 6 December,

4 CA-46 Typical Performance Curves (Continued) BASE-TO-EMITTER VOLTAGE (V) V BE INPUT OFFSET VOLTAGE.4... EMITTER CURRENT (ma) INPUT OFFSET VOLTAGE (mv) BASE-TO-EMITTER VOLTAGE (V) I E = ma I E = ma I E =.ma FIGURE. TYPICAL STATIC BASE-TO-EMITTER VOLTAGE CHARACTERISTICS AND INPUT OFFSET VOLT- AGE FOR DIFFERENTIAL PAIR AND PAIRED ISO- LATED TRANSISTORS vs EMITTER CURRENT FIGURE 6. TYPICAL BASE-TO-EMITTER VOLTAGE CHARACTERISTIC vs TEMPERATURE FOR EACH TRANSISTOR INPUT OFFSET VOLTAGE (mv) I E = ma I E = ma I E =.ma NOISE FIGURE (db) R S = f =.khz f = khz f = khz FIGURE 7. TYPICAL INPUT OFFSET VOLTAGE CHARACTERIS- TICS FOR DIFFERENTIAL PAIR AND PAIRED ISOLATED TRANSISTORS vs TEMPERATURE... FIGURE 8. TYPICAL NOISE FIGURE vs COLLECTOR CURRENT R S = R S = NOISE FIGURE (db) f = khz f = khz f =.khz NOISE FIGURE (db) f = khz f = khz f =.khz.. FIGURE 9. TYPICAL NOISE FIGURE vs COLLECTOR CURRENT.. FIGURE. TYPICAL NOISE FIGURE vs COLLECTOR CURRENT FN4 Rev 6. Page 4 of 6 December,

5 CA-46 Typical Performance Curves (Continued) NORMALIZED h PARAMETERS. f = khz h RE h IE h FE = h IE =.k h RE =.88 x -4 h OE =.6 S AT ma h RE h OE h FE h IE.... FORWARD TRANSFER CONDUCTANCE (g FE ) OR SUSCEPTANCE (b FE ) (ms) 4,, I C = ma g FE - b FE -. FIGURE. TYPICAL NORMALIZED FORWARD CURRENT TRANSFER RATIO, SHORT CIRCUIT INPUT IMPEDANCE, OPEN CIRCUIT OUTPUT IMPEDANCE, AND OPEN CIRCUIT REVERSE VOLTAGE TRANSFER RATIO vs COLLECTOR CURRENT FIGURE. TYPICAL FORWARD TRANSFER ADMITTANCE vs FREQUENCY INPUT CONDUCTANCE (g IE ) OR SUSCEPTANCE (b IE ) (ms) 6,, I C = ma 4 b IE g IE. OUTPUT CONDUCTANCE (g OE ) OR SUSCEPTANCE (b OE ) (ms) 6 4,, I C = ma b OE g OE. FIGURE. TYPICAL INPUT ADMITTANCE vs FREQUENCY FIGURE 4. TYPICAL OUTPUT ADMITTANCE vs FREQUENCY REVERSE TRANSFER CONDUCTANCE (g RE ) OR SUSCEPTANCE (b RE ) (ms) ,, I C = ma g RE IS SMALL AT FREQUENCIES LESS THAN MHz b RE -. GAIN BANDWIDTH PRODUCT (MHz) FIGURE. TYPICAL REVERSE TRANSFER ADMITTANCE vs FREQUENCY FIGURE 6. TYPICAL GAIN BANDWIDTH PRODUCT vs COLLECTOR CURRENT FN4 Rev 6. Page of 6 December,

6 CA-46 Copyright Intersil Americas LLC -. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN4 Rev 6. Page 6 of 6 December,