CA741, CA741C, CA1458, CA1558, LM741, LM741C, LM1458

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1 OBSOLETE PRODUCT NO RECOMMENDED REPLACEMENT CA, CAC, CA, CA, LM, LMC, LM Data Sheet May File Number. tle M le l, h s raal pli li.9mhz Single and Dual, High Gain Operational Amplifiers for Military, Industrial and Commercial Applications The CA, CA (dual types); CAC, CA (single types); highgain operational amplifiers for use in military, industrial, and commercial applications. These monolithic silicon integrated circuit devices provide output short circuit protection and latchfree operation. These types also feature wide common mode and differential mode signal ranges and have low offset voltage nulling capability when used with an appropriately valued potentiometer. A kω potentiometer is used for offset nulling types CAC, CA (see Figure ). Types CA, CA have no specific terminals for offset nulling. Each type consists of a differential input amplifier that effectively drives a gain and level shifting stage having a complementary emitter follower output. The manufacturing process make it possible to produce IC operational amplifiers with low burst popcorn noise characteristics. Technical Data on LM Branded types is identical to the corresponding CA Branded types. Pinouts INV. NONINV. CA, CAC (CAN) NC V OUT V CA, CAC, LM, LMC (PDIP) INV. NONINV. V NC V Features InputBiasCurrent... na (Max) InputOffsetCurrent...nA (Max) Applications Comparator Multivibrator DC Amplifier Summing Amplifier Integrator or Differentiator Narrow Band or Band Pass Filter Part Number Information PART NUMBER TEMP. RANGE ( o C) PACKAGE PKG. NO. CAE to Ld PDIP E. CACE to Ld PDIP E. CAE to Ld PDIP E. CAE to Ld PDIP E. CAT to Pin Metal Can T.C CACT to Pin Metal Can T.C CAT to Pin Metal Can T.C LMN to LdPDIP E. LMCN to Ld PDIP E. LMN to Ld PDIP E. (A) INV. (A) NONINV. (A) CA (METAL CAN) A V B (B) INV. (B) NONINV. (B) V CA, CA, LM (PDIP) (A) INV. (A) NONINV. (A) V A B V (B) INV. (B) NONINV. (B) CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. INTERSIL or Intersil and Design is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc.

2 CA, CAC, CA, CA, LM, LMC, LM Absolute Maximum Ratings Supply Voltage CAC, CA, LMC, LM (Note ) V CA,CA,LM(Note)... V DifferentialInputVoltage... V InputVoltage... ±V SUPPLY Offset Terminal to V Terminal Voltage (CAC, CA).... ±.V OutputShortCircuitDuration... Indefinite Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) PDIPPackage... N/A CanPackage... MaximumJunctionTemperature(CanPackage)... o C Maximum Junction Temperature (Plastic Package) o C MaximumStorageTemperatureRange... o Cto o C Maximum Lead Temperature (Soldering s) o C Operating Conditions Temperature Range CA,CA,LM... o Cto o C CAC, CA, LMC, LM (Note ).... o Cto o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Values apply for each section of the dual amplifiers.. All types in any package style can be operated over the temperature range of o Cto o C, although the published limits for certain electrical specification apply only over the temperature range of o Cto o C.. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Typical Values Intended Only for Design Guidance, V SUPPLY = ±V PARAMETER SYMBOL TEST CONDITIONS TYPICAL VALUE (ALL TYPES) UNITS Input Capacitance C I. pf Offset Voltage Adjustment Range ± mv Output Resistance R O Ω Output Short Circuit Current ma Transient Response Unity Gain, V I =mv,r L =kω, Rise Time t r C L pf. µs Overshoot O.S.. % Slew Rate (Closed Loop) SR R L kω. V/µs Gain Bandwidth Product GBWP R L =kω.9 MHz Electrical Specifications For Equipment Design, V SUPPLY = ±V PARAMETER TEST CONDITIONS TEMP ( o C) (NOTE ) CA, CA, LM (NOTE ) CAC, CA, LMC, LM MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage R S kω mv Full. mv Input Common Mode Voltage Range ± ± V Full ± ± V Common Mode Rejection Ratio R S kω 9 db Full 9 db Power Supply Rejection Ratio R S kω µv/v Full µv/v Input Resistance.. MΩ

3 CA, CAC, CA, CA, LM, LMC, LM Electrical Specifications For Equipment Design, V SUPPLY = ±V (Continued) PARAMETER TEST CONDITIONS TEMP ( o C) (NOTE ) CA, CA, LM (NOTE ) CAC, CA, LMC, LM MIN TYP MAX MIN TYP MAX UNITS Input Bias Current na Full na na na Input Offset Current na Full na na na Large Signal Voltage Gain R L kω, V O = ±V,,,, V/V Full,, V/V Output Voltage Swing R L kω ± ± V Full ± ± V R L kω ± ± V Full ± ± ± ± V Supply Current.... ma. ma.. ma Device Power Dissipation mw mw mw NOTE:. Values apply for each section of the dual amplifiers. Test Circuits INVERTING NONINVERTING kω V IN C L R L V OUT V FIGURE. VOLTAGE CIRCUIT FOR CAC, CA, LMC, AND LM FIGURE. TRANSIENT RESPONSE TEST CIRCUIT FOR ALL TYPES

4 CA, CAC, CA, CA, LM, LMC, LM Schematic Diagram (Notes, ) CAC, CA, LMC, LM AND FOR EACH AMPLIFIER OF THE CA, CA, AND LM V D D INVERTING Q C pf R.K Q Q NONINVERTING Q Q R 9K Q Q R 9 Q Q D R.K Q Q R Q Q Q 9 Q R K R K R K R K D Q R K R K Q V NOTES:. See Pinouts for Terminal Numbers of Respective Types.. All Resistance Values are in Ohms. Typical Performance Curves COMMON MODE RANGE (V) T A = o C SWING (V PP ) T A = o C R L kω DC SUPPLY (V, V) DC SUPPLY (V, V) FIGURE. COMMON MODE VOLTAGE RANGE vs SUP PLY VOLTAGE FOR ALL TYPES FIGURE. VOLTAGE vs SUPPLY VOLTAGE FOR ALL TYPES

5 CA, CAC, CA, CA, LM, LMC, LM Typical Performance Curves (Continued) DC SUPPLY VOLTS (V =, V = ) T A = o C, C L = pf (mv) 9% % RISE TIME TIME (µs) FIGURE. TRANSIENT RESPONSE FOR CAC AND CA Metallization Mask Layout CACH (..) (..) 9 (.9.) CAH 9 (..) (..) 9 (..) NOTE: Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils ( inch).

6 CA, CAC, CA, CA, LM, LMC, LM All Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems. Intersil Corporation s quality certifications can be viewed at website Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site Sales Office Headquarters NORTH AMERICA Intersil Corporation Palm Bay Rd. Palm Bay, FL 9 TEL: () FAX: () EUROPE Intersil SA Mercure Center,RuedelaFusee Brussels, Belgium TEL: ().. FAX: ()... ASIA Intersil Ltd. F, 9, Sec., Chienkuo North, Taipei, Taiwan Republic of China TEL: FAX: 9

CA3046. General Purpose NPN Transistor Array. Features. Applications. Ordering Information. Pinout. Data Sheet May 2001 File Number 341.

CA3046. General Purpose NPN Transistor Array. Features. Applications. Ordering Information. Pinout. Data Sheet May 2001 File Number 341. CA Data Sheet May File Number. General Purpose NPN Transistor Array The CA consists of five general purpose silicon NPN transistors on a common monolithic substrate. Two of the transistors are internally