CA555, CA555C, LM555, LM555C, NE555

Size: px

Start display at page:

Download "CA555, CA555C, LM555, LM555C, NE555"

Curtis Black
5 years ago
Views:

1 May 99 SEMICONDUCTOR CA, CAC, LM, LMC, NE Timers for Timing Delays and Oscillator Application in Commercial, Industrial and Military Equipment Features Accurate Timing From Microseconds Through Hours Astable and Monostable Operation Adjustable Duty Cycle Output Capable of Sourcing or Sinking up to ma Output Capable of Driving TTL Devices Normally ON and OFF Outputs High Temperature Stability %/ o C Directly Interchangeable with SE, NE, MC, and MC Applications Precision Timing Sequential Timing Time Delay Generation Ordering Information PART NUMBER (BRAND) TEMP. RANGE ( o C) Pulse Generation Pulse Detector Pulse Width and Position Modulation PACKAGE PKG. NO. CAE - to Ld PDIP E. CAM () - to Ld SOIC M. CAM9 () - to Ld SOIC M. CAT - to Pin Metal Can T.C CACE to Ld PDIP E. CACM (C) to Ld SOIC M. CACM9 (C) to Ld SOIC M. CACT to Pin Metal Can T.C LMN - to Ld PDIP E. LMCN to Ld PDIP E. NEN to Ld PDIP E. NOTE: Denotes Tape and Reel Description The CA and CAC are highly stable timers for use in precision timing and oscillator applications. As timers, these monolithic integrated circuits are capable of producing accurate time delays for periods ranging from microseconds through hours. These devices are also useful for astable oscillator operation and can maintain an accurately controlled free running frequency and duty cycle with only two external resistors and one capacitor. The circuits of the CA and CAC may be triggered by the falling edge of the waveform signal, and the output of these circuits can source or sink up to a ma current or drive TTL circuits. These types are direct replacements for industry types in packages with similar terminal arrangements e.g. SE and NE, MC and MC, respectively. The CA type circuits are intended for applications requiring premium electrical performance. The CAC type circuits are intended for applications requiring less stringent electrical characteristics. Pinouts CA, CAC (PDIP, SOIC) LM, LMC, NE (PDIP) TOP VIEW Functional Block Diagram GND CA, CAC (METAL CAN) TOP VIEW GND TAB COMPAR COMPAR FLIP-FLOP GND CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright Harris Corporation 99 - File Number.

2 CA, CAC, LM, LMC, NE Absolute Maximum Ratings DC Supply Voltage V Operating Conditions Temperature Range CA, LM o C to CAC, LMC, NE o C to o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) Metal Can Package PDIP Package N/A SOIC Package N/A Maximum Junction Temperature (Hermetic Package) o C Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications T A =, = V to V Unless Otherwise Specified CA, LM CAC, LMC, NE PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS DC Supply Voltage V DC Supply Current (Low State), (Note ) I+ = V, R L = - - ma = V, R L = - - ma Threshold Voltage V TH - ( / ) - - ( / ) - V Trigger Voltage = V V = V V Trigger Current µa Threshold Current (Note ) I TH µa Reset Voltage V Reset Current ma Control Voltage Level = V V = V V Output Voltage V OL = V, I SINK = ma V Low State I SINK = ma V = V, I SINK = ma V I SINK = ma V I SINK = ma V I SINK = ma V Output Voltage V OH = V, I SOURCE = ma V High State = V, I SOURCE = ma V I SOURCE = ma V Timing Error (Monostable) R, R = kω to kω, % Frequency Drift with Temperature C =.µf Tested at = V, = V ppm/ o C Drift with Supply Voltage %/V -

3 CA, CAC, LM, LMC, NE Electrical Specifications T A =, = V to V Unless Otherwise Specified (Continued) CA, LM CAC, LMC, NE PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Output Rise Time t R ns Output Fall Time t F ns NOTES:. When the output is in a high state, the DC supply current is typically ma less than the low state value.. The threshold current will determine the sum of the values of R and R to be used in Figure (astable operation); the maximum total R + R = MΩ. Schematic Diagram COMPARATOR COMPARATOR FLIP-FLOP.K.K K K.K D D Q Q Q Q Q 9 Q K.9K Q Q Q Q K Q Q 9 Q Q K Q K K Q.K Q D Q Q D.K Q Q V- NOTE: Resistance values are in ohms. Typical Applications Reset Timer (Monostable Operation) Figure shows the CA connected as a reset timer. In this mode of operation capacitor C T is initially held discharged by a transistor on the integrated circuit. Upon closing the start switch, or applying a negative trigger pulse to terminal, the integral timer flip-flop is set and releases the short circuit across C T which drives the output voltage high (relay energized). The action allows the voltage across the capacitor to increase exponentially with the constant t = R C T. When the voltage across the capacitor equals /, the comparator resets the flip-flop which in turn discharges the capacitor rapidly and drives the output to its low state. -

4 CA, CAC, LM, LMC, NE R EO CA K C T.K.µF N RELAY COIL V CAPACITANCE (µf).. T A = = V R = kω kω kω MΩ MΩ S START NOTE: All resistance values are in ohms. FIGURE. TIMER (MONOSTABLE OPERATION) Since the charge rate and threshold level of the comparator are both directly proportional to, the timing interval is relatively independent of supply voltage variations. Typically, the timing varies only.% for a V change in. Applying a negative pulse simultaneously to the reset terminal () and the trigger terminal () during the timing cycle discharges C T and causes the timing cycle to restart. Momentarily closing only the reset switch during the timing interval discharges C T, but the timing cycle does not restart. Figure shows the typical waveforms generated during this mode of operation, and Figure gives the family of time delay curves with variations in R and C T. SWITCH S OPEN V INPUT (TERMINAL ) SWITCH S CLOSED.V CAPACITOR (TERMINALS, ) V (TERMINAL ) FIGURE. TYPICAL WAVEFORMS FOR TIMER t D. - - Repeat Cycle Timer (Astable Operation) Figure shows the CA connected as a repeat cycle timer. In this mode of operation, the total period is a function of both R and R. T =.9 (R + R ) C T = t + t where t =.9 (R + R ) C T and t =.9 (R ) C T the duty cycle is: - - TIME DELAY(s) - FIGURE. TIME DELAY vs RESISTANCE AND CAPACITANCE R R C T CA EO.µF RELAY COIL Typical waveforms generated during this mode of operation are shown in Figure. Figure gives the family of curves of free running frequency with variations in the value of (R +R ) and C T. V FIGURE. REPEAT CYCLE TIMER (ASTABLE OPERATION) t = R + R t + t R + R -

5 CA, CAC, LM, LMC, NE V t t T A =, = V.V CAPACITANCE (µf). MΩ MΩ kω kω R + R = kω..v Top Trace: Output voltage (V/Div. and.ms/div.) Bottom Trace: Capacitor voltage (V/Div. and.ms/div.) FIGURE. TYPICAL WAVEFORMS FOR REPEAT CYCLE TIMER. - FREQUENCY (Hz) FIGURE. FREE RUNNING FREQUENCY OF REPEAT CYCLE TIMER WITH VARIATION IN CAPACITANCE AND RESISTANCE Typical Performance Curves MINIMUM PULSE WIDTH (ns) T A = - o C o C o C.... MINIMUM (PULSE) (x ) (NOTE) NOTE: Where x is the decimal multiplier of the supply voltage. FIGURE. MINIMUM PULSE WIDTH vs MINIMUM SUPPLY - (V)..... T A = - o C SOURCE CURRENT (ma) V V FIGURE 9. DROP (HIGH STATE) vs SOURCE CURRENT SUPPLY CURRENT (ma) - LOW STATE (V) 9. SUPPLY (V). FIGURE. SUPPLY CURRENT vs SUPPLY.... = V FIGURE. LOW STATE vs SINK CURRENT. T A = - o C T A = SINK CURRENT (ma) o C -

6 CA, CAC, LM, LMC, NE Typical Performance Curves (Continued) - LOW STATE (V)... = V T A = - o C - LOW STATE (V)... = V - o C T A = - o C. SINK CURRENT (ma). SINK CURRENT (ma) FIGURE. LOW STATE vs SINK CURRENT FIGURE. LOW STATE vs SINK CURRENT. T A = NORMALIZED DELAY TIME NORMALIZED DELAY TIME SUPPLY (V) FIGURE. DELAY TIME vs SUPPLY TEMPERATURE ( o C) FIGURE. DELAY TIME vs TEMPERATURE PROPAGATION DELAY TIME (ns) T A = - o C o C o C.... MINIMUM (PULSE) (x ) (NOTE) NOTE: Where x is the decimal multiplier of the supply voltage. FIGURE. PROPAGATION DELAY TIME vs -

7 This datasheet has been downloaded from: Free Download Daily Updated Database % Free Datasheet Search Site % Free IC Replacement Search Site Convenient Electronic Dictionary Fast Search System All Datasheets Cannot Be Modified Without Permission Copyright Each Manufacturing Company

Features. Applications

Features. Applications LM555 Timer General Description The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the