HA-2640, HA Features. 4MHz, High Supply Voltage Operational Amplifiers. Applications. Ordering Information. Pinouts

Transcription

1 HA-264, HA-2645 Data Sheet January 3, 26 FN MHz, High Supply Voltage Operational Amplifiers HA-264 and HA-2645 are monolithic operational amplifiers which are designed to deliver unprecedented dynamic specifications for a high voltage internally compensated device. These dielectrically isolated devices offer very low values for offset voltage and offset current coupled with large output voltage swing and common mode input voltage. For maximum reliability, these amplifiers offer unconditional output overload protection through current limiting and a chip temperature sensing circuit. This sensing device turns the amplifier off, when the chip reaches a certain temperature level. These amplifiers deliver ±35V common mode input voltage range, ±35V output voltage swing, and up to ±4V supply range for use in such designs as regulators, power supplies, and industrial control systems. 4MHz gain bandwidth and 5V/µs slew rate make these devices excellent components for high performance signal conditioning applications. Outstanding input and output voltage swings coupled with a low 5nA offset current make these amplifiers excitation designs. Features Output Voltage Swing ±35V Supply Voltage ±V to ±4V Offset Current nA Bandwidth MHz Slew Rate V/µs Common Mode Input Voltage Range ±35V Output Overload Protection Applications Industrial Control Systems Power Supplies High Voltage Regulators Resolver Excitation Signal Conditioning Ordering Information PART NUMBER PART MARKING TEMP. RANGE ( o C) PACKAGE PKG. DWG. # HA HA to 25 8 Pin Metal Can T8.C HA HA to 25 8 Ld CERDIP F8.3A HA HA to 75 8 Pin Metal Can T8.C HA HA to 75 8 Ld CERDIP F8.3A Pinouts HA-264/2645 (CERDIP) TOP VIEW HA-264/2645 (METAL CAN) TOP VIEW COMP 8 8 COMP 7 -IN +IN OUT -IN OUT 4 5 +IN (TO-99 CASE VOLTAGE = FLOATING) CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures INTERSIL or Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2, 24, 26. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

2 Absolute Maximum Ratings Voltage Between and Terminals V Differential Input Voltage Range V Output Current Full Short Circuit Protection Operating Conditions Temperature Range HA o C to 25 o C HA o C to 75 o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) CERDIP Package Metal Can Package Maximum Junction Temperature o C Maximum Storage Temperature Range o C to 5 o C Maximum Lead Temperature (Soldering s) o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V SUPPLY = ±4V, R L = 5kΩ, Unless Otherwise Specified TEMP HA HA PARAMETER TEST CONDITIONS ( o C) MIN TYP MAX MIN TYP MAX UNITS INPUT CHARACTERISTICS Offset Voltage mv Full mv Average Offset Voltage Drift Full µv/ o C Bias Current na Full na Offset Current na Full na Input Resistance (Note 2) MΩ Common Mode Range Full ± ± V TRANSFER CHARACTERISTICS Large Signal Voltage Gain V OUT = ±3V kv/v Full kv/v Common Mode Rejection Ratio V CM = ±2V Full db Minimum Stable Gain V/V Unity Gain Bandwidth V OUT = 9mV MHz OUTPUT CHARACTERISTICS Output Voltage Swing Full ± ± V Output Current R L = kω 25 ±2 ±5 - ± ±2 - ma Output Resistance Open Loop Ω Full Power Bandwidth (Note 3) V OUT = ±35V khz TRANSIENT RESPONSE A V = +, C L = 5pF, R L = 5kΩ Rise Time V OUT = ±2mV ns Overshoot V OUT = ±2mV % Slew Rate 25 ±3 ±5 - ±2.5 ±5 - V/µs POWER SUPPLY CHARACTERISTICS Supply Current ma Supply Voltage Range Full ± - ±4 ± - ±4 V Power Supply Rejection Ratio V S = ±V to ±4V Full db NOTES: 2. This parameter is based upon design calculations. 3. Full Power Bandwidth guaranteed based upon slew rate measurement: FPBW = S.R./2πV PEAK ; V PEAK = 35V. 2 FN294.5

3 Schematic Diagram 8 COMP 7 R 25 R R 5 R 6 R 7 R 8 R 9 R 2 C R 2 R 22 D 7 Q Q 7 Q Q Q 5 Q 3 Q 4 C 4 Q 46 C 3 Q 53 Q 55 R 25 Q 6 Q 8 Q 29 Q 35 D 3 Q 3 Q 4 Q 3 Q 5 Q 7 R 4 Q9 Q Q R 2 R 3 Q 4 D 2 Q 6 Q 8 Q3 D 3 Q 2 Q 9 D 4 D 5 D 6 D 7 Q 6 Q 2 D 8 D 9 Q 2 Q 22 R Q 23 Q 24 Q 32 Q 33 D R Q 36 Q 37 Q 25 Q 26 Q 27 D Q 38 Q 39 C 2 Q 4 Q 42 R 3 R 5 R 4 Q 43 D 2 R 27 R 26 Q 44 Q 48 R 6 Q 47 Q 49 R7 R 8 Q 5 Q 56 Q 52 Q 5 R 9 Q 54 R 2 Q 57 Q 59 D 5 R 23 6 V OUT R 24 D 6 Q 6 Q IN 2 -IN 5 Test Circuits and Waveform 8 7 COMP CAP IN + - 5K 5pF OUT 3 kω 4 5 FIGURE. SLEW RATE AND TRANSIENT RESPONSE TEST CIRCUIT NOTE: Tested offset adjustment range is V OS +mv minimum referred to output. Typical range is ±2mV with R T = kω. FIGURE 2. SUGGESTED V OS ADJUSTMENT AND COMPENSATION HOOK UP 3 FN294.5

4 Test Circuits and Waveform (Continued) Vertical = V/Div., Horizontal = 5µs/Div. NOTE: R L = 5kΩ, C L = 5pF, T A = 25 o C, V S = ±4V FIGURE 3. VOLTAGE FOLLOWER PULSE RESPONSE Typical Performance Curves V S = ±4V, T A = 25 o C, Unless Otherwise Specified 25 CURRENT (na) BIAS CURRENT OFFSET CURRENT INPUT NOISE VOLTAGE (nv/ Hz) INPUT NOISE VOLTAGE INPUT NOISE CURRENT. INPUT NOISE CURRENT (pa/ Hz) TEMPERATURE ( o C) K FREQUENCY (Hz) K. K FIGURE 4. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE FIGURE 5. INPUT NOISE CHARACTERISTICS NORMALIZED VALUE REFERRED TO 25 o C SLEW RATE TEMPERATURE ( o C) BANDWIDTH OPEN LOOP VOLTAGE GAIN (db) GAIN PHASE K K K M M 27 FREQUENCY (Hz) PHASE ANGLE (DEGREES) FIGURE 6. NORMALIZED AC PARAMETERS vs TEMPERATURE FIGURE 7. OPEN LOOP FREQUENCY RESPONSE 4 FN294.5

5 Typical Performance Curves V S = ±4V, T A = 25 o C, Unless Otherwise Specified (Continued) NORMALIZED VALUE REFERRED TO ±3V.2. SLEW RATE. BANDWIDTH SUPPLY VOLTAGE (±V) OPEN LOOP GAIN (db) 2 AUT pF,pF K K K M M FREQUENCY (Hz) C COMP C L = pf pf 3pF pf FIGURE 8. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE AT 25 o C FIGURE 9. OPEN LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM COMPENSATION PIN TO GROUND OUTPUT VOLTAGE SWING (V P-P ).. V SUPPLY = ±4V V SUPPLY = ±2V V SUPPLY = ±V OUTPUT VOLTAGE (V) A V =, V SUPPLY = ±4V V IN = +35V A V =, V SUPPLY = ±2V V IN = +5V -55 o C 25 o C 25 o C o C 25 o C 25 o C o C 25 o C -55 o C o C 25 o C -55 o C A V =, V SUPPLY = ±2V V IN = -5V. K K K M -3 AV =, V SUPPLY = ±4V V IN = -35V -4 FREQUENCY (Hz) OUTPUT LOAD CURRENT (ma) FIGURE. OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE. OUTPUT CURRENT CHARACTERISTIC SUPPLY CURRENT (ma) I CC -I CC SUPPLY VOLTAGE (±V) OUTPUT VOLTAGE SWING (±V) V OUT -V OUT SUPPLY VOLTAGE (±V) FIGURE 2. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 3. OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE 5 FN294.5

6 Die Characteristics SUBSTRATE POTENTIAL (Powered Up): Unbiased TRANSISTOR COUNT: 76 PROCESS: HV2 Bipolar Dielectric Isolation Metallization Mask Layout HA-264, HA-2645 COMP -IN +IN OUT 6 FN294.5

7 Metal Can Packages (Can) ØD ØD F Q A REFERENCE PLANE Øb A A L L2 L Øb Øb ØD2 NOTES:. (All leads) Øb applies between L and L2. Øb applies between L2 and.5 from the reference plane. Diameter is uncontrolled in L and beyond.5 from the reference plane. 2. Measured from maximum diameter of the product. 3. α is the basic spacing from the centerline of the tab to terminal and β is the basic spacing of each lead or lead position (N - places) from α, looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y4.5M Controlling dimension: INCH. Øe BASE AND SEATING PLANE BASE METAL SECTION A-A Øb2 2 β e LEAD FINISH N α k k C L T8.C MIL-STD-835 MACY-X8 (A) 8 LEAD METAL CAN PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A Øb Øb Øb ØD ØD ØD e.2 BSC 5.8 BSC - e. BSC 2.54 BSC - F k k L L L Q α 45 o BSC 45 o BSC 3 β 45 o BSC 45 o BSC 3 N Rev. 5/8/94 7 FN294.5

8 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) BASE PLANE SEATING PLANE S b2 ccc M bbb S b C A - B C A - B S D A A e D S NOTES:. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b and c apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (, N, N/2, and N/2+) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y4.5M Controlling dimension: INCH E L M c ea/2 S D S aaa M C A - B LEAD FINISH BASE METAL b M (b) SECTION A-A -D- -A- Q -C- A -Bα S ea c D S (c) F8.3A MIL-STD-835 GDIP-T8 (D-4, CONFIGURATION A) 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A b b b b c c D E e. BSC 2.54 BSC - ea.3 BSC 7.62 BSC - ea/2.5 BSC 3.8 BSC - L Q S α 9 o 5 o 9 o 5 o - aaa bbb ccc M , 3 N Rev. 4/94 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9 quality systems. Intersil Corporation s quality certifications can be viewed at Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 8 FN294.5