DATASHEET HA Features. Applications. Pinout. Ordering Information. Quad, 3.5MHz, Operational Amplifier. FN2922 Rev 5.00 Page 1 of 8.

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1 DATASHEET HA-4741 Quad, 3.5MHz, Operational Amplifier HA-4741, which contains four amplifiers on a monolithic chip, provides a new measure of performance for general purpose operational amplifiers. Each amplifier in the HA-4741 has operating specifications that equal or exceed those of the 741-type amplifier in all categories of performance. HA-4741 is well suited to applications requiring accurate signal processing by virtue of its low values of input offset voltage (.5mV), input bias current (6nA) and input voltage noise (9nV/ Hz at 1kHz). 3.5MHz bandwidth, coupled with high open-loop gain, allow the HA-4741 to be used in designs requiring amplification of wide band signals, such as audio amplifiers. Audio application is further enhanced by the HA-4741 s negligible output crossover distortion. These excellent dynamic characteristics also make the HA-4741 ideal for a wide range of active filter designs. Performance integrity of multi-channel designs is assured by a high level of amplifier-to-amplifier isolation (69dB at 1kHz). A wide range of supply voltages ( 2V to 2V) can be used to power the HA-4741, making it compatible with almost any system including battery-powered equipment. HA-4741/883 product and data sheets available upon request. Ordering Information PART NUMBER TEMP. RANGE ( C) PACKAGE PKG. DWG. # HA to Ld CERDIP F14.3 HA to Ld PDIP E14.3 Features FN2922 Rev 5. July 24 Slew Rate V/ s Bandwidth MHz Input Voltage Noise nV/ Hz Input Offset Voltage mV Input Bias Current nA Supply Range V to 2V No Crossover Distortion Standard Quad Pinout Applications Universal Active Filters D3 Communications Filters Audio Amplifiers Battery-Powered Equipment Pinout OUT1 -IN1 +IN1 HA-4741 (PDIP, CERDIP) TOP VIEW V+ +IN2 -IN2 OUT OUT4 -IN4 +IN4 V- +IN3 -IN3 OUT3 FN2922 Rev 5. Page 1 of 8 July 24

2 Absolute Maximum Ratings T A = 25 C Unless Otherwise Stated Supply Voltage Between V+ and V- Terminals V Differential Input Voltage V Input Voltage V SUPPLY Output Short Circuit Duration (Note 3) Indefinite Operating Conditions Temperature Range: HA C to 125 C HA C to 75 C Thermal Information Thermal Resistance (Typical, Note 2) JA ( C/W) JC ( C/W) CERDIP Package PDIP Package N/A Maximum Junction Temperature (Ceramic Package, Note 1) C Maximum Junction Temperature (Plastic Packages, Note 1) C Maximum Storage Temperature Range C to 15 C Maximum Lead Temperature (Soldering 1s) C (Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175 C for the ceramic package, and below 15 C for the plastic packages. 2. JA is measured with the component mounted on an evaluation PC board in free air. 3. One amplifier may be shorted to ground indefinitely. Electrical Specifications V SUPPLY = 15V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP. ( C) HA HA MIN TYP MAX MIN TYP MAX UNITS INPUT CHARACTERISTICS Offset Voltage mv Full mv Average Offset Voltage Drift Full V/ C Bias Current na Full na Offset Current na Full na Common Mode Range Full V Differential Input Resistance M Input Voltage Noise f = 1kHz nv/ Hz TRANSFER CHARACTERISTICS Large Signal Voltage Gain V OUT = 1V, R L =2k kv/v Full kv/v Common Mode Rejection Ratio db Full db Channel Separation (Note 4) db Small Signal Bandwidth MHz OUTPUT CHARACTERISTICS Output Voltage Swing R L = 1k Full V Output Voltage Swing R L = 2k Full V Full Power Bandwidth (Notes 5, 6) khz Output Current V OUT = 1V Full ma Output Resistance FN2922 Rev 5. Page 2 of 8 July 24

3 Electrical Specifications V SUPPLY = 15V, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP. ( C) HA HA MIN TYP MAX MIN TYP MAX UNITS TRANSIENT RESPONSE R L = 2k, C L = 5pF Rise / Fall Time V OUT = to 2mV ns Overshoot % Slew Rate V OUT = 5V V/ s POWER SUPPLY CHARACTERISTICS Supply Current ma Power Supply Rejection Ratio V S = 5V Full db NOTES: 4. Referred to input; f = 1kHz, R S = 1k, V IN = 1mV PEAK. 5. V OUT = 1V, R L = 2k. 6. Full power bandwidth guaranteed based upon slew rate measurement: FPBW = S.R./2 V PEAK. Test Circuit and Waveforms + - V OUT V IN 5pF 2k FIGURE 1. SMALL AND LARGE SIGNAL TEST CIRCUIT +5V INPUT 2mV -5V +5V OUTPUT -5V Volts = 5V/Div., Time = 5 s/div. FIGURE 2. LARGE SIGNAL RESPONSE Volts = 4mV/Div., Time = 1ns/Div. FIGURE 3. SMALL SIGNAL RESPONSE FN2922 Rev 5. Page 3 of 8 July 24

4 Schematic Diagram V+ R 1 3K Q 1 Q 2 Q 3 +V IN Q 13 Q 15 -V IN Q4 Q 5 Q 12 R 6 8 R 8 15 R 7 8 V OUT T 1 Q 7 C 1 Q1 R 5 3K Q 14 Q 6 D 1 Q 8 R K R 3 18K Q 9 R 4 2K Q 11 V- Typical Performance Curves V SUPPLY = 15V, T A = 25 C, Unless Otherwise Specified OPEN-LOOP VOLTAGE GAIN (db) GAIN PHASE R L = 2K C L = 5pF K 1K 1K 1M 1M FREQUENCY (Hz) PHASE (DEGREES) OUTPUT VOLTAGE SWING (V P-P ) V O = 28V V O = 18V V O = 8V V O = 2V V S = 15V V S = 1V V S = 5V V S = 2V (VOLTAGE FOLLOWER) R L = C L = 5pF 1 1K 1K 1K 1M FREQUENCY (Hz) FIGURE 4. OPEN LOOP FREQUENCY RESPONSE FIGURE 5. OUTPUT VOLTAGE SWING vs FREQUENCY NORMALIZED AC PARAMETERS REFERRED TO VALUE AT 15V SLEW RATE BANDWIDTH BANDWIDTH SUPPLY VOLTAGE (V) FIGURE 6. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE NORMALIZED VALUE REFERRED TO 25 C SLEW RATE BANDWIDTH TEMPERATURE ( C) FIGURE 7. NORMALIZED AC PARAMETERS vs TEMPERATURE FN2922 Rev 5. Page 4 of 8 July 24

5 Typical Performance Curves V SUPPLY = 15V, T A = 25 C, Unless Otherwise Specified (Continued) INPUT NOISE VOLTAGE (nv/ Hz) VOLTAGE NOISE CURRENT NOISE INPUT NOISE CURRENT (pa/ Hz) PHASE MARGIN (DEGREES) R L = 2K UNITY GAIN BANDWIDTH (MHz) 1 1 1K 1K 1K FREQUENCY (Hz) FIGURE 8. INPUT NOISE vs FREQUENCY , 1, LOAD CAPACITANCE (pf) FIGURE 9. SMALL SIGNAL BANDWIDTH AND PHASE MARGIN vs LOAD CAPACITANCE 3 1 OUTPUT VOLTAGE (V P-P ) CURRENT (na) OFFSET CURRENT BIAS CURRENT 1 1K 1K 1K LOAD RESISTANCE ( ) TEMPERATURE ( C) FIGURE 1. MAXIMUM OUTPUT VOLTAGE SWING vs LOAD RESISTANCE FIGURE 11. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE 2 POWER CONSUMPTION (mw) V S = 15 V S = 1 V S = TEMPERATURE ( C) FIGURE 12. POWER CONSUMPTION vs TEMPERATURE FN2922 Rev 5. Page 5 of 8 July 24

6 Die Characteristics DIE DIMENSIONS: 87 mils x 75 mils x 19 mils 221 m x 191 m x 483 m METALLIZATION: Type: Al, 1% Cu Thickness: 16kÅ 2kÅ PASSIVATION: Type: Nitride (Si 3 N 4 ) over Silox (SiO 2, 5% Phos.) Silox Thickness: 12kÅ 2kÅ Nitride Thickness: 3.5kÅ 1.5kÅ SUBSTRATE POTENTIAL (POWERED UP): V- TRANSISTOR COUNT: 72 PROCESS: Junction Isolated Bipolar/JFET Metallization Mask Layout HA IN4 +IN4 V- +IN3 -IN3 OUT4 OUT3 OUT1 OUT2 -IN1 +IN1 V+ +IN2 -IN2 FN2922 Rev 5. Page 6 of 8 July 24

7 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) BASE PLANE SEATING PLANE S1 b2 ccc M bbb S b C A - B Q -C- A -B- C A - B S D A A e D S -D- -A- NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M Controlling dimension: INCH. E L M c1 ea/2 S D S aaa M C A - B LEAD FINISH BASE METAL b1 M (b) SECTION A-A S ea c D S (c) F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A) 14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A b b b b c c D E e.1 BSC 2.54 BSC - ea.3 BSC 7.62 BSC - ea/2.15 BSC 3.81 BSC - L Q S o 15 o 9 o 15 o - aaa bbb ccc M , 3 N Rev. 4/94 FN2922 Rev 5. Page 7 of 8 July 24

8 Dual-In-Line Plastic Packages (PDIP) INDEX AREA BASE PLANE SEATING PLANE D1 B1 -C- -A- N N/2 B D e D1 E1 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication No Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed.1 inch (.25mm). 6. E and e A are measured with the leads constrained to be perpendicular to datum -C-. 7. e B and e C are measured at the lead tips with the leads unconstrained. e C must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed.1 inch (.25mm). 9. N is the maximum number of terminal positions. 1. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of inch ( mm). -B- A1.1 (.25) M C A A2 L B S A e C E C L e A C e B E14.3 (JEDEC MS-1-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A A A B B C D D E E e.1 BSC 2.54 BSC - e A.3 BSC 7.62 BSC 6 e B L N Rev. 12/93 Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN2922 Rev 5. Page 8 of 8 July 24