CD Features. 5V Low Power Subscriber DTMF Receiver. Pinouts. Ordering Information. Functional Diagram

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Cecil Small
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1 Data Sheet February 1 File Number 1.4 5V Low Power Subscriber DTMF Receiver The complete dual tone multiple frequency (DTMF) receiver detects a selectable group of 1 or 1 standard digits. No front-end pre-filtering is needed. The only externally required components are an inexpensive.57545mhz TV colorburst crystal (for frequency reference) and a bias resistor. Extremely high system density is possible through the use of the Alternate Time Base () output of a crystal connected receiver to drive the time bases of up to additional receivers. This is a monolithic integrated circuit fabricated with low power, complementary symmetry CMOS processing. It only requires a single power supply. The employs state-of-the-art switched-capacitor filter technology, resulting in approximately 40 poles of filtering and digital circuitry on the same CMOS chip. The analog input is preprocessed by 0Hz reject and bandsplitting filters and then zero-cross detected to provide AGC. Eight bandpass filters detect the individual tones. Digital processing is used to measure the tone and pause durations and provides the correctly coded and timed digital outputs. The outputs interface directly to standard CMOS circuitry and are threestate enabled to facilitate bus oriented architectures. Ordering Information PART NUMBER TEMP. RANGE ( o C) PACKAGE PKG. NO. E 0 to Ld PDIP E14. Features No Front End Band Splitting Filters Required Single Low Tolerance 5V Supply Three-State Outputs for Microprocessor Based Systems Detects all 1 Standard DTMF Digits Uses Inexpensive.57545MHz Crystal Excellent Speech Immunity Output in 4-Bit Hexadecimal Code Excellent Latch-Up Immunity Pinouts D (PDIP) TOP VIEW 1 4 NC D4 1 D8 1 X 8 Functional Diagram 7 X PREPROCESSOR/ BANDSPLIT FILTER CLOCK GERATOR LOW B/P HIGH B/P CHIP CLOCKS VOLTAGE REG./REF. DETECTORS AND SIGNAL- PROCESSG CIRCUITS NC D D4 D8 4 8 NOTE: Pin numbers are for PDIP. 7 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. or Copyright Intersil Corporation 1

2 Absolute Maximum Ratings (Note 1) DC Supply Voltage ( ) (Referenced to Terminal) V Power Dissipation T A = 5 o C (Derate above T A = 5 o C at.5mw/ o C mW Input Voltage Range All Inputs Except Analog In ( 0.5V) to -0.5V Analog in Voltage Range ( 0.5V) to ( -V) DC Current into any Input or Output ±0mA Thermal Information Maximum Junction Temperature o C Maximum Storage Temperature Range o C to 150 o C Maximum Lead Temperature (Soldering s) o C Operating Conditions Temperature Range o C to 70 o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications 0 o C T A 70 o C, = 5V ±% PARAMETER TEST CONDITIONS M TYP MAX UNITS Frequency Detect Bandwidth ±(1.5 + Hz) ±. ±.5 % of f O Amplitude for Detection Each Tone - (Note ) - - dbm Referenced to 00Ω Minimum Acceptable Twist High Tone db Twist = Low Tone 0Hz Tolerance V RMS Dial Tone Tolerance Precise Dial Tone db Referenced to Lower Amplitude Tone Talk Off MITEL Tape #CM Hits Digital Outputs (except ) 0 Level, 400µA Load V 1 Level, 00µA Load V Digital Inputs 0 Level 0-0. V 1 Level V Supply Current T A = 5 o C - 0 ma Noise Tolerance MITEL Tape #CM71 (Note ) db Referenced to Lowest Amplitude Tone Input Impedance V ( -) 0kΩ//15pF 00kΩ - NOTES: 1. Unused inputs must be connected to or as appropriate.. Bandwidth limited (khz) Gaussian noise.. Lower minimum available, please contact sales office. (-dbm = 1.45mV RMS, -dbm = 0.15mV RMS ) 8

3 Functional Block Diagram BANDPASS PREPROCESSOR BAND SPLIT 0Hz 7 PRE EMP BS1 REJECT ZERO CROSSG DETECTORS AMPLITUDE DETECTORS BS 41 TIMG CIRCUITRY X 8 CLOCK GERATOR CHIP CLOCKS DATA STROBE 1M POWER REGULATOR VOLTAGE REF DECODER REGISTER 1 D 14 D4 1 D8 DATA CLEAR 4 8 NOTE: Pin numbers are for plastic DIP. System Functions Analog In The Analog In pin accepts the analog input. It is internally biased so that the input signal may be either AC or DC coupled, as long as it does not exceed the positive supply voltage. Proper input coupling is illustrated below. AUDIO PUT (+4dBm OR 1.V RMS MAXIMUM) 1500pF 0.01µF kω 70kΩ OPTIONAL HIGH FREQUCY NOISE FILTER (f C =.khz) 7 E (ON CHIP) pf >0kΩ The is designed to accept sinusoidal input waveforms, but will operate satisfactorily with any input that has the correct fundamental frequency with harmonics that are at least 0dB below the fundamental. Crystal Oscillator The contains an on-board inverter with sufficient gain to provide oscillation when connected to a low cost television color-burst (.57545MHz) crystal. The crystal oscillator is enabled by tying high. The crystal is connected between X and. A 1MΩ resistor is also connected between these pins in this mode. is a clock frequency output. Other devices may use the same frequency reference by tying their pins to the output of a crystal connected device. X and of the auxiliary devices must then be tied high and low, respectively. Up to ten devices may be run from a single crystal connected as shown in Figure. FIGURE 1.

4 X.57545MHz 1M X CONNECTED TO UP TO DEVICES FIGURE. CRYSTAL OSCILLATOR Outputs, D, D4, D8 and Outputs, D, D4, D8 are CMOS push-pull when enabled ( high) and open circuited (high impedance) when disabled by pulling low. These digital outputs provide the hexadecimal code corresponding to the detected digit. The digital outputs become valid after a tone pair has been detected and they are then cleared when a valid pause is timed. The table below describes the hexadecimal codes. TABLE 1. CODES DIGIT D8 D4 D * # A B C D signals a detection by going high after a valid tone pair is sensed and decoded at the output pins, D, D4, and D8. remains high until a valid pause occurs. N/C Pin This pin has no internal connection and should be left floating. DTMF Dialing Matrix Digital Inputs and Outputs All digital inputs and outputs of the DTMF receivers are represented by the schematic below. Only the analog in pin is different, and is described above. Care must be exercised not to exceed the voltage or current ratings on these pins as listed in the maximum ratings section. Input Filter COL 0 Hz COL 1 1Hz COL 1477Hz FIGURE. PUTS AND S COL 1Hz ROW 0 7Hz 1 A ROW 1 770Hz 4 5 B ROW 85Hz 7 8 C ROW 41Hz * 0 # D NOTE: Column is for special applications and is not normally used in telephone dialing. PUT CMOS CIRCUITRY The will tolerate total input noise of a maximum of 1dB below the lowest amplitude tone. For most telephone applications, the combination of the high frequency attenuation of the telephone line and internal band limiting make special circuitry at the input to these receivers unnecessary. However, noise near the 5kHz internal sampling frequency will be aliased (folded back) into the audio spectrum, so if excessive noise is present above 8kHz, the simple RC filter shown below may be used to band limit the incoming signal. The cut off frequency is.khz. NOISY SIGNAL 70kΩ µF kω FIGURE 4. FILTER FOR USE EXTREME HIGH FREQUCY PUT NOISE VIRONMT 70

5 Noise will also be reduced by placing a grounded trace around X and pins on the circuit board layout when using a crystal. It is important to note that is not intended to drive an additional device. X may be driven externally; in this case, leave floating. Timing Waveforms PARAMETER SYMBOL M TYP MAX UNITS Tone Time For Detection t ON ms For Rejection t ON ms Pause Time For Detection t OFF ms For Rejection t OFF ms TONE BURST 1 t ON t OFF Detect Time t D 5-4 ms PUT t R PAUSE TONE BURST Release Time t R 5 50 ms Data Setup Time t SU µs Data Hold Time t H ms, D D4, D8 t D t SU t H Output Enable Time C L = 50pF, R L = 1kΩ Output Disable Time C L = 5pF, R L = 500Ω ns ns Output Rise Time C L = 50pF ns FIGURE 5. Output Fall Time C L = 50pF ns All Intersil semiconductor products are manufactured, assembled and tested under ISO000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 88, Mail Stop 5-04 Melbourne, FL 0 TEL: (407) FAX: (407) For information regarding Intersil Corporation and its products, see web site EUROPE Intersil SA Mercure Center 0, Rue de la Fusee 0 Brussels, Belgium TEL: ().74.1 FAX: () ASIA Intersil (Taiwan) Ltd. 7F-, No. 1 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (88) 71 FAX: (88)

CD V Low Power Subscriber DTMF Receiver. Description. Features. Ordering Information. Pinouts CD22204 (PDIP) TOP VIEW. Functional Diagram

CD V Low Power Subscriber DTMF Receiver. Description. Features. Ordering Information. Pinouts CD22204 (PDIP) TOP VIEW. Functional Diagram Semiconductor January Features No Front End Band Splitting Filters Required Single Low Tolerance V Supply Three-State Outputs for Microprocessor Based Systems Detects all Standard DTMF Digits Uses Inexpensive.4MHz